Gabe Black 06ff83e1b9 X86: Implement a basic prefetch instruction.		2009-02-25 10:19:22 -08:00
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alpha	CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.	2009-02-25 10:16:15 -08:00
mips	CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.	2009-02-25 10:16:15 -08:00
sparc	CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.	2009-02-25 10:16:15 -08:00
x86	X86: Implement a basic prefetch instruction.	2009-02-25 10:19:22 -08:00
isa_parser.py	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs	2008-09-10 14:26:15 -04:00
isa_specific.hh	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs	2008-09-10 14:26:15 -04:00
micro_asm.py	Microcode: Fix a silent typo error in the microcode assembler.	2008-10-09 00:07:38 -07:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	CPU: Create a microcode ROM object in the CPU which is defined by the ISA.	2008-10-12 15:59:21 -07:00