2b0438a11e
This patch changes the CPU and cache configurations used in the ARM SE and FS regressions to make them more representative, and also get better code coverage by exercising different replacement policies and use an L2 prefetcher.
133 lines
5.5 KiB
Python
133 lines
5.5 KiB
Python
# Copyright (c) 2012 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Andreas Sandberg
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from abc import ABCMeta, abstractmethod
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import m5
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from m5.objects import *
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from m5.proxy import *
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m5.util.addToPath('../configs/common')
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import FSConfig
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from Caches import *
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from base_config import *
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from O3_ARM_v7a import *
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class ArmSESystemUniprocessor(BaseSESystemUniprocessor):
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"""Syscall-emulation builder for ARM uniprocessor systems.
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A small tweak of the syscall-emulation builder to use more
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representative cache configurations.
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"""
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def __init__(self, **kwargs):
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BaseSESystem.__init__(self, **kwargs)
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def create_caches_private(self, cpu):
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# The atomic SE configurations do not use caches
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if self.mem_mode == "timing":
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# Use the more representative cache configuration
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cpu.addTwoLevelCacheHierarchy(O3_ARM_v7a_ICache(),
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O3_ARM_v7a_DCache(),
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O3_ARM_v7aL2())
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class LinuxArmSystemBuilder(object):
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"""Mix-in that implements create_system.
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This mix-in is intended as a convenient way of adding an
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ARM-specific create_system method to a class deriving from one of
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the generic base systems.
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"""
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def __init__(self, machine_type):
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"""
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Arguments:
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machine_type -- String describing the platform to simulate
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"""
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self.machine_type = machine_type
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def create_system(self):
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system = FSConfig.makeArmSystem(self.mem_mode,
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self.machine_type, None, False)
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# We typically want the simulator to panic if the kernel
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# panics or oopses. This prevents the simulator from running
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# an obviously failed test case until the end of time.
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system.panic_on_panic = True
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system.panic_on_oops = True
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self.init_system(system)
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return system
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class LinuxArmFSSystem(LinuxArmSystemBuilder,
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BaseFSSystem):
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"""Basic ARM full system builder."""
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def __init__(self, machine_type='RealView_PBX', **kwargs):
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"""Initialize an ARM system that supports full system simulation.
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Note: Keyword arguments that are not listed below will be
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passed to the BaseFSSystem.
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Keyword Arguments:
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machine_type -- String describing the platform to simulate
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"""
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BaseSystem.__init__(self, **kwargs)
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LinuxArmSystemBuilder.__init__(self, machine_type)
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def create_caches_private(self, cpu):
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# Use the more representative cache configuration
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cpu.addTwoLevelCacheHierarchy(O3_ARM_v7a_ICache(),
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O3_ARM_v7a_DCache(),
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O3_ARM_v7aL2())
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class LinuxArmFSSystemUniprocessor(LinuxArmSystemBuilder,
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BaseFSSystemUniprocessor):
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"""Basic ARM full system builder for uniprocessor systems.
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Note: This class is a specialization of the ArmFSSystem and is
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only really needed to provide backwards compatibility for existing
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test cases.
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"""
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def __init__(self, machine_type='RealView_PBX', **kwargs):
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BaseFSSystemUniprocessor.__init__(self, **kwargs)
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LinuxArmSystemBuilder.__init__(self, machine_type)
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class LinuxArmFSSwitcheroo(LinuxArmSystemBuilder, BaseFSSwitcheroo):
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"""Uniprocessor ARM system prepared for CPU switching"""
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def __init__(self, machine_type='RealView_PBX', **kwargs):
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BaseFSSwitcheroo.__init__(self, **kwargs)
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LinuxArmSystemBuilder.__init__(self, machine_type)
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