gem5/src/arch/x86
Gabe Black 0554885eb9 X86: When decoding a memory only inst, fault on reg encodings, don't assert.
This change makes the decoder figure out if an instruction that only supports
memory is using a register encoding and decodes directly to "Unknown" which will
behave appropriately. This prevents other parts of the instruction creation
process from seeing the mismatch and asserting.
2011-04-23 15:02:29 -07:00
..
bios includes: sort all includes 2011-04-15 10:44:06 -07:00
insts trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
isa X86: When decoding a memory only inst, fault on reg encodings, don't assert. 2011-04-23 15:02:29 -07:00
linux includes: sort all includes 2011-04-15 10:44:06 -07:00
regs X86: Create a directory for files that define register indexes. 2010-08-23 16:14:24 -07:00
cpuid.cc Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
cpuid.hh X86: Sometimes CPUID depends on ecx, so pass that in. 2010-05-02 00:40:17 -07:00
emulenv.cc copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
emulenv.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
faults.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
faults.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
interrupts.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
interrupts.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
intmessage.hh includes: sort includes again 2009-05-17 14:34:52 -07:00
isa.cc x86: minor checkpointing bug fixes 2010-08-17 05:20:39 -07:00
isa.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
isa_traits.hh X86: Define a noop ExtMachInst. 2010-08-23 09:44:19 -07:00
kernel_stats.hh copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
locked_mem.hh Stub implementation for x86 2007-03-05 16:08:18 +00:00
microcode_rom.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
mmapped_ipr.hh Spelling: Fix the a spelling error by changing mmaped to mmapped. 2011-03-01 23:18:47 -08:00
nativetrace.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
nativetrace.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
pagetable.cc x86: Add checkpointing capability to arch components 2011-02-06 22:14:17 -08:00
pagetable.hh copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
pagetable_walker.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
pagetable_walker.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
predecoder.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
predecoder.hh trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
predecoder_tables.cc copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
process.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
process.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
registers.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
remote_gdb.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
remote_gdb.hh copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
SConscript X86: On a bad microopc, return a microop that returns a fault that panics. 2011-02-13 17:42:56 -08:00
SConsopts copyright: This file need not have had the more restrictive copyright. 2009-02-09 20:10:15 -08:00
stacktrace.cc X86: Fix X86_FS compilation. 2010-11-08 12:43:38 -08:00
stacktrace.hh trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
system.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
system.hh sim: revamp unserialization procedure 2010-08-17 05:17:06 -07:00
tlb.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
tlb.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
types.cc X86: Change the copyright holder to AMD. 2010-08-27 15:35:36 -07:00
types.hh mips: cleanup ISA-specific code 2011-03-26 09:23:52 -04:00
utility.cc Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
utility.hh ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. 2010-10-31 00:07:20 -07:00
vtophys.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
vtophys.hh x86: implements vtophys 2011-02-06 22:14:17 -08:00
x86_traits.hh copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
X86LocalApic.py IntDev: packet latency fix 2011-02-06 22:14:17 -08:00
X86NativeTrace.py CPU: Separate out native trace into ISA (in)dependent code and SimObjects. 2009-07-19 23:54:56 -07:00
X86System.py Loader: Make the load address mask be a parameter of the system rather than a constant. 2010-08-23 11:18:39 -05:00
X86TLB.py copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00