04745696b6
SConscript:
Added new CPU files to build.
arch/alpha/isa_desc:
Changed rduniq and wruniq to be nonspeculative because the uniq register is not renamed.
arch/isa_parser.py:
Added new CPU exec method.
base/statistics.hh:
Minor change for namespace conflict. Probably can change back one the new CPU files are cleaned up.
base/traceflags.py:
Added new CPU trace flags.
cpu/static_inst.hh:
Changed static inst to use a file that defines the execute functions.
--HG--
extra : convert_revision : bd4ce34361308280168324817fc1258dd253e519
33 lines
850 B
C++
33 lines
850 B
C++
#ifndef __CPU_POLICY_HH__
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#define __CPU_POLICY_HH__
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#include "cpu/beta_cpu/fetch.hh"
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#include "cpu/beta_cpu/decode.hh"
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#include "cpu/beta_cpu/rename.hh"
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#include "cpu/beta_cpu/iew.hh"
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#include "cpu/beta_cpu/commit.hh"
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#include "cpu/beta_cpu/inst_queue.hh"
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#include "cpu/beta_cpu/regfile.hh"
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#include "cpu/beta_cpu/free_list.hh"
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#include "cpu/beta_cpu/rename_map.hh"
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#include "cpu/beta_cpu/rob.hh"
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template<class Impl>
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struct SimpleCPUPolicy
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{
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typedef PhysRegFile<Impl> RegFile;
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typedef SimpleFreeList FreeList;
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typedef SimpleRenameMap RenameMap;
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typedef ROB<Impl> ROB;
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typedef InstructionQueue<Impl> IQ;
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typedef SimpleFetch<Impl> Fetch;
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typedef SimpleDecode<Impl> Decode;
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typedef SimpleRename<Impl> Rename;
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typedef SimpleIEW<Impl, IQ> IEW;
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typedef SimpleCommit<Impl> Commit;
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};
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#endif //__CPU_POLICY_HH__
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