b25ea094d4
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Restructure the existing sources in preparation of the addition of the * new Master Port. * Refractor names to allow for distinction of the slave and master port. * Replace the Makefile by a SConstruct. Testing Done: The examples provided in util/tlm (now util/tlm/examples/slave_port) still compile and run error free. Reviewed at http://reviews.gem5.org/r/3527/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
102 lines
3.3 KiB
C++
102 lines
3.3 KiB
C++
/*
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* Copyright (c) 2015, University of Kaiserslautern
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* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Matthias Jung
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* Christian Menard
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*/
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#ifndef PAYLOAD_EVENT_H_
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#define PAYLOAD_EVENT_H_
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// TLM includes
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#include <tlm.h>
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// gem5 includes
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#include <sim/eventq.hh>
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namespace Gem5SystemC {
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/**
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* A 'Fake Payload Event Queue', similar to the TLM PEQs. This helps the
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* transactors to schedule events in gem5.
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*/
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template <typename OWNER>
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class PayloadEvent : public Event
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{
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public:
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OWNER& port;
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const std::string eventName;
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void (OWNER::*handler)(PayloadEvent<OWNER>* pe,
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tlm::tlm_generic_payload& trans,
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const tlm::tlm_phase& phase);
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protected:
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tlm::tlm_generic_payload* t;
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tlm::tlm_phase p;
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void process() { (port.*handler)(this, *t, p); }
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public:
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const std::string name() const { return eventName; }
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PayloadEvent(OWNER& port_,
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void (OWNER::*handler_)(PayloadEvent<OWNER>* pe,
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tlm::tlm_generic_payload& trans,
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const tlm::tlm_phase& phase),
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const std::string& event_name)
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: port(port_)
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, eventName(event_name)
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, handler(handler_)
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{
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}
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/// Schedule an event into gem5
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void notify(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase,
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const sc_core::sc_time& delay)
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{
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assert(!scheduled());
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t = &trans;
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p = phase;
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/**
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* Get time from SystemC as this will always be more up to date
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* than gem5's
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*/
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Tick nextEventTick = sc_core::sc_time_stamp().value() + delay.value();
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port.owner.wakeupEventQueue(nextEventTick);
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port.owner.schedule(this, nextEventTick);
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}
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};
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}
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#endif
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