036a8ceb8d
code into a function that can be called by the AlphaConsole class. AlphaConsole will pass in its address. arch/alpha/ev5.hh: Move Phys2K0Seg to ev5.hh and fixup the TSUNAMI uncacheable bits so that they will be converted correctly. dev/alpha_access.h: Do not hard code the location of the AlphaConsole dev/alpha_console.cc: fixup #includes tell the system where the alpha console is sim/system.hh: Provide a function that will tell the system where the AlphaAccess structure (device) lives --HG-- extra : convert_revision : 92d70ca926151a32eebe9925de597459ac58013e
173 lines
4.7 KiB
C++
173 lines
4.7 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __SYSTEM_HH__
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#define __SYSTEM_HH__
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#include <string>
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#include <vector>
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#include "base/statistics.hh"
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#include "cpu/pc_event.hh"
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#include "kern/system_events.hh"
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#include "sim/sim_object.hh"
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class BaseCPU;
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class ExecContext;
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class GDBListener;
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class MemoryController;
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class ObjectFile;
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class PhysicalMemory;
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class Platform;
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class RemoteGDB;
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class SymbolTable;
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namespace Kernel { class Binning; }
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class System : public SimObject
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{
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public:
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MemoryController *memctrl;
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PhysicalMemory *physmem;
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Platform *platform;
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PCEventQueue pcEventQueue;
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uint64_t init_param;
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std::vector<ExecContext *> execContexts;
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/** kernel Symbol table */
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SymbolTable *kernelSymtab;
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/** console symbol table */
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SymbolTable *consoleSymtab;
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/** pal symbol table */
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SymbolTable *palSymtab;
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/** Object pointer for the kernel code */
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ObjectFile *kernel;
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/** Object pointer for the console code */
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ObjectFile *console;
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/** Object pointer for the PAL code */
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ObjectFile *pal;
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/** Begining of kernel code */
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Addr kernelStart;
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/** End of kernel code */
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Addr kernelEnd;
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/** Entry point in the kernel to start at */
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Addr kernelEntry;
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Kernel::Binning *kernelBinning;
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#ifdef DEBUG
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/** Event to halt the simulator if the console calls panic() */
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BreakPCEvent *consolePanicEvent;
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#endif
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public:
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std::vector<RemoteGDB *> remoteGDB;
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std::vector<GDBListener *> gdbListen;
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bool breakpoint();
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public:
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struct Params
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{
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std::string name;
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Tick boot_cpu_frequency;
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MemoryController *memctrl;
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PhysicalMemory *physmem;
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uint64_t init_param;
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bool bin;
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std::vector<std::string> binned_fns;
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bool bin_int;
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std::string kernel_path;
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std::string console_path;
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std::string palcode;
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std::string boot_osflags;
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std::string readfile;
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uint64_t system_type;
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uint64_t system_rev;
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};
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Params *params;
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System(Params *p);
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~System();
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void startup();
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public:
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/**
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* Set the m5AlphaAccess pointer in the console
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*/
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void setAlphaAccess(Addr access);
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/**
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* Returns the addess the kernel starts at.
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* @return address the kernel starts at
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*/
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Addr getKernelStart() const { return kernelStart; }
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/**
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* Returns the addess the kernel ends at.
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* @return address the kernel ends at
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*/
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Addr getKernelEnd() const { return kernelEnd; }
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/**
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* Returns the addess the entry point to the kernel code.
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* @return entry point of the kernel code
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*/
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Addr getKernelEntry() const { return kernelEntry; }
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int registerExecContext(ExecContext *xc);
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void replaceExecContext(ExecContext *xc, int xcIndex);
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void regStats();
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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public:
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////////////////////////////////////////////
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//
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// STATIC GLOBAL SYSTEM LIST
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//
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////////////////////////////////////////////
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static std::vector<System *> systemList;
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static int numSystemsRunning;
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static void printSystems();
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};
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#endif // __SYSTEM_HH__
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