gem5/configs/common
Nilay Vaish 03229f2575 Config: Add support for restoring using a timing CPU
Currently there is an assumption that restoration from a checkpoint will
happen by first restoring to an atomic CPU and then switching to a timing
CPU. This patch adds support for directly restoring to a timing CPU. It
adds a new option '--restore-with-cpu' which is used to specify the type
of CPU to which the checkpoint should be restored to. It defaults to
'atomic' which was the case before.
2012-01-11 13:50:18 -06:00
..
Benchmarks.py ARM: Update config files for Android/BBench images available on website. 2011-12-15 00:43:35 -05:00
CacheConfig.py configs: cache: add cache line size option 2011-02-23 14:26:55 -05:00
Caches.py O3: Remove hardcoded tgts_per_mshr in O3CPU.py. 2011-12-01 00:15:22 -08:00
cpu2000.py cpu2000: Add missing art benchmark to all 2012-01-09 18:08:20 -06:00
FSConfig.py ARM: Add support for running multiple systems 2012-01-09 18:08:20 -06:00
Options.py Config: Add support for restoring using a timing CPU 2012-01-11 13:50:18 -06:00
Simulation.py Config: Add support for restoring using a timing CPU 2012-01-11 13:50:18 -06:00
SysPaths.py make rcS files read from the m5 source directory, not /dist. 2006-11-08 14:10:25 -05:00