gem5/configs
Marc Orr bf80734b2c x86 isa: This patch attempts an implementation at mwait.
Mwait works as follows:
1. A cpu monitors an address of interest (monitor instruction)
2. A cpu calls mwait - this loads the cache line into that cpu's cache.
3. The cpu goes to sleep.
4. When another processor requests write permission for the line, it is
   evicted from the sleeping cpu's cache. This eviction is forwarded to the
   sleeping cpu, which then wakes up.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-11-06 05:42:22 -06:00
..
boot rcs scripts: remove bbench.rcS 2013-04-02 12:46:49 -04:00
common ruby: interface with classic memory controller 2014-11-06 05:42:21 -06:00
dram mem: Rename Bus to XBar to better reflect its behaviour 2014-09-20 17:18:32 -04:00
example ruby: interface with classic memory controller 2014-11-06 05:42:21 -06:00
ruby x86 isa: This patch attempts an implementation at mwait. 2014-11-06 05:42:22 -06:00
splash2 mem: Rename Bus to XBar to better reflect its behaviour 2014-09-20 17:18:32 -04:00
topologies config: topologies: slight code refactor 2014-02-23 19:16:15 -06:00