310 lines
14 KiB
Plaintext
310 lines
14 KiB
Plaintext
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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virtual_net_0: active, ordered
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virtual_net_1: active, ordered
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virtual_net_2: active, ordered
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virtual_net_3: active, ordered
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virtual_net_4: active, ordered
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virtual_net_5: inactive
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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Real time: Apr/28/2011 14:27:56
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 0
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Elapsed_time_in_minutes: 0
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Elapsed_time_in_hours: 0
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Elapsed_time_in_days: 0
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Virtual_time_in_seconds: 0.44
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Virtual_time_in_minutes: 0.00733333
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Virtual_time_in_hours: 0.000122222
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Virtual_time_in_days: 5.09259e-06
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Ruby_current_time: 342698
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Ruby_start_time: 0
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Ruby_cycles: 342698
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mbytes_resident: 38.9805
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mbytes_total: 221.645
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resident_ratio: 0.175922
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ruby_cycles_executed: [ 342699 ]
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Busy Controller Counts:
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L1Cache-0:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average: 1 | standard deviation: 0 | 0 8465 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 2 max: 377 count: 8464 average: 39.4889 | standard deviation: 72.9776 | 0 6734 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ]
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miss_latency_LD: [binsize: 2 max: 375 count: 1185 average: 110.608 | standard deviation: 87.0282 | 0 458 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 2 max: 377 count: 865 average: 62.2439 | standard deviation: 89.6671 | 0 592 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ]
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miss_latency_IFETCH: [binsize: 2 max: 285 count: 6414 average: 23.2806 | standard deviation: 57.2661 | 0 5684 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 3 count: 6734 average: 3 | standard deviation: 0 | 0 0 0 6734 ]
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miss_latency_Directory: [binsize: 2 max: 377 count: 1730 average: 181.521 | standard deviation: 26.4115 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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imcomplete_wCC_Times: 0
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miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average: 159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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imcomplete_dir_Times: 1729
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miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 458 average: 3 | standard deviation: 0 | 0 0 0 458 ]
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miss_latency_LD_Directory: [binsize: 2 max: 375 count: 727 average: 178.4 | standard deviation: 21.0913 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 592 average: 3 | standard deviation: 0 | 0 0 0 592 ]
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miss_latency_ST_Directory: [binsize: 2 max: 377 count: 273 average: 190.714 | standard deviation: 36.5384 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ]
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miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 5684 average: 3 | standard deviation: 0 | 0 0 0 5684 ]
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miss_latency_IFETCH_Directory: [binsize: 2 max: 285 count: 730 average: 181.192 | standard deviation: 25.9199 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 3456 average: 0 | standard deviation: 0 | 3456 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 3456 average: 0 | standard deviation: 0 | 3456 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 1730 average: 0 | standard deviation: 0 | 1730 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 1726 average: 0 | standard deviation: 0 | 1726 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 0
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system_time: 0
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page_reclaims: 11208
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page_faults: 3
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swaps: 0
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block_inputs: 1184
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block_outputs: 0
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Network Stats
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-------------
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total_msg_count_Control: 5190 41520
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total_msg_count_Data: 5178 372816
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total_msg_count_Response_Data: 5190 373680
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total_msg_count_Writeback_Control: 5178 41424
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total_msgs: 20736 total_bytes: 829440
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 2.52117
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links_utilized_percent_switch_0_link_0: 2.5235 bw: 16000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 2.51884 bw: 16000 base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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links_utilized_percent_switch_1: 2.52117
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links_utilized_percent_switch_1_link_0: 2.51884 bw: 16000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 2.5235 bw: 16000 base_latency: 1
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outgoing_messages_switch_1_link_0_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
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switch_2_inlinks: 2
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switch_2_outlinks: 2
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links_utilized_percent_switch_2: 2.52117
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links_utilized_percent_switch_2_link_0: 2.5235 bw: 16000 base_latency: 1
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links_utilized_percent_switch_2_link_1: 2.51884 bw: 16000 base_latency: 1
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outgoing_messages_switch_2_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
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Cache Stats: system.ruby.cpu_ruby_ports.dcache
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system.ruby.cpu_ruby_ports.dcache_total_misses: 1730
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system.ruby.cpu_ruby_ports.dcache_total_demand_misses: 1730
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system.ruby.cpu_ruby_ports.dcache_total_prefetches: 0
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system.ruby.cpu_ruby_ports.dcache_total_sw_prefetches: 0
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system.ruby.cpu_ruby_ports.dcache_total_hw_prefetches: 0
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system.ruby.cpu_ruby_ports.dcache_request_type_LD: 42.0231%
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system.ruby.cpu_ruby_ports.dcache_request_type_ST: 15.7803%
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system.ruby.cpu_ruby_ports.dcache_request_type_IFETCH: 42.1965%
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system.ruby.cpu_ruby_ports.dcache_access_mode_type_Supervisor: 1730 100%
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--- L1Cache ---
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- Event Counts -
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Load [1185 ] 1185
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Ifetch [6414 ] 6414
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Store [865 ] 865
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Data [1730 ] 1730
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Fwd_GETX [0 ] 0
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Inv [0 ] 0
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Replacement [1726 ] 1726
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Writeback_Ack [1726 ] 1726
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Writeback_Nack [0 ] 0
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- Transitions -
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I Load [727 ] 727
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I Ifetch [730 ] 730
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I Store [273 ] 273
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I Inv [0 ] 0
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I Replacement [0 ] 0
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II Writeback_Nack [0 ] 0
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M Load [458 ] 458
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M Ifetch [5684 ] 5684
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M Store [592 ] 592
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M Fwd_GETX [0 ] 0
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M Inv [0 ] 0
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M Replacement [1726 ] 1726
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MI Fwd_GETX [0 ] 0
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MI Inv [0 ] 0
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MI Writeback_Ack [1726 ] 1726
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MI Writeback_Nack [0 ] 0
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MII Fwd_GETX [0 ] 0
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IS Data [1457 ] 1457
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IM Data [273 ] 273
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Memory controller: system.dir_cntrl0.memBuffer:
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memory_total_requests: 3456
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memory_reads: 1730
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memory_writes: 1726
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memory_refreshes: 714
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memory_total_request_delays: 4411
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memory_delays_per_request: 1.27633
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memory_delays_in_input_queue: 1083
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memory_delays_behind_head_of_bank_queue: 8
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memory_delays_stalled_at_head_of_bank_queue: 3320
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memory_stalls_for_bank_busy: 1509
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memory_stalls_for_random_busy: 0
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memory_stalls_for_anti_starvation: 0
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memory_stalls_for_arbitration: 99
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memory_stalls_for_bus: 1677
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memory_stalls_for_tfaw: 0
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memory_stalls_for_read_write_turnaround: 35
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memory_stalls_for_read_read_turnaround: 0
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accesses_per_bank: 162 36 92 110 106 362 98 36 32 34 83 92 110 104 84 86 83 53 50 58 64 124 212 72 66 50 122 190 220 325 42 98
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--- Directory ---
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- Event Counts -
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GETX [1730 ] 1730
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GETS [0 ] 0
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PUTX [1726 ] 1726
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PUTX_NotOwner [0 ] 0
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DMA_READ [0 ] 0
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DMA_WRITE [0 ] 0
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Memory_Data [1730 ] 1730
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Memory_Ack [1726 ] 1726
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- Transitions -
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I GETX [1730 ] 1730
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I PUTX_NotOwner [0 ] 0
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I DMA_READ [0 ] 0
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I DMA_WRITE [0 ] 0
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M GETX [0 ] 0
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M PUTX [1726 ] 1726
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M PUTX_NotOwner [0 ] 0
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M DMA_READ [0 ] 0
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M DMA_WRITE [0 ] 0
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M_DRD GETX [0 ] 0
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M_DRD PUTX [0 ] 0
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M_DWR GETX [0 ] 0
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M_DWR PUTX [0 ] 0
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M_DWRI GETX [0 ] 0
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M_DWRI Memory_Ack [0 ] 0
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M_DRDI GETX [0 ] 0
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M_DRDI Memory_Ack [0 ] 0
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IM GETX [0 ] 0
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IM GETS [0 ] 0
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IM PUTX [0 ] 0
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IM PUTX_NotOwner [0 ] 0
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IM DMA_READ [0 ] 0
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IM DMA_WRITE [0 ] 0
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IM Memory_Data [1730 ] 1730
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MI GETX [0 ] 0
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MI GETS [0 ] 0
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MI PUTX [0 ] 0
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MI PUTX_NotOwner [0 ] 0
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MI DMA_READ [0 ] 0
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MI DMA_WRITE [0 ] 0
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MI Memory_Ack [1726 ] 1726
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ID GETX [0 ] 0
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ID GETS [0 ] 0
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ID PUTX [0 ] 0
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ID PUTX_NotOwner [0 ] 0
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ID DMA_READ [0 ] 0
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ID DMA_WRITE [0 ] 0
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ID Memory_Data [0 ] 0
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ID_W GETX [0 ] 0
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ID_W GETS [0 ] 0
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ID_W PUTX [0 ] 0
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ID_W PUTX_NotOwner [0 ] 0
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ID_W DMA_READ [0 ] 0
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ID_W DMA_WRITE [0 ] 0
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ID_W Memory_Ack |