de366a16f1
This patch adds support for simulating with multiple threads, each of which operates on an event queue. Each sim object specifies which eventq is would like to be on. A custom barrier implementation is being added using which eventqs synchronize. The patch was tested in two different configurations: 1. ruby_network_test.py: in this simulation L1 cache controllers receive requests from the cpu. The requests are replied to immediately without any communication taking place with any other level. 2. twosys-tsunami-simple-atomic: this configuration simulates a client-server system which are connected by an ethernet link. We still lack the ability to communicate using message buffers or ports. But other things like simulation start and end, synchronizing after every quantum are working. Committed by: Nilay Vaish
103 lines
3.3 KiB
C++
103 lines
3.3 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* Copyright (c) 2013 Advanced Micro Devices, Inc.
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* Copyright (c) 2013 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Steve Reinhardt
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*/
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#ifndef __SIM_CORE_HH__
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#define __SIM_CORE_HH__
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/** @file This header provides some core simulator functionality such as time
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* information, output directory and exit events
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*/
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#include <string>
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#include "base/types.hh"
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#include "sim/eventq.hh"
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/// The universal simulation clock.
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inline Tick curTick() { return _curEventQueue->getCurTick(); }
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const Tick retryTime = 1000;
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/// These are variables that are set based on the simulator frequency
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///@{
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namespace SimClock {
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extern Tick Frequency; ///< The number of ticks that equal one second
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namespace Float {
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/** These variables equal the number of ticks in the unit of time they're
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* named after in a double.
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* @{
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*/
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extern double s; ///< second
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extern double ms; ///< millisecond
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extern double us; ///< microsecond
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extern double ns; ///< nanosecond
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extern double ps; ///< picosecond
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/** @} */
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/** These variables the inverse of above. They're all < 1.
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* @{
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*/
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extern double Hz; ///< Hz
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extern double kHz; ///< kHz
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extern double MHz; ///< MHz
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extern double GHZ; ///< GHz
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/** @}*/
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} // namespace Float
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/** These variables equal the number of ticks in the unit of time they're
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* named after in a 64 bit integer.
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*
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* @{
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*/
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namespace Int {
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extern Tick s; ///< second
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extern Tick ms; ///< millisecond
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extern Tick us; ///< microsecond
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extern Tick ns; ///< nanosecond
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extern Tick ps; ///< picosecond
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/** @} */
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} // namespace Int
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} // namespace SimClock
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/** @} */
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void setClockFrequency(Tick ticksPerSecond);
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void setOutputDir(const std::string &dir);
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class Callback;
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void registerExitCallback(Callback *callback);
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void doExitCleanup();
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#endif /* __SIM_CORE_HH__ */
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