a928a438b8
Used cppclean to help identify useless includes and removed them. This involved erroneously included headers, but also cases where forward declarations could have been used rather than a full include.
241 lines
7.5 KiB
C++
241 lines
7.5 KiB
C++
/*
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* Copyright (c) 2013-2014 ARM Limited
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* Copyright (c) 2013 Cornell University
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Vasileios Spiliopoulos
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* Akash Bagdia
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* Andreas Hansson
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* Christopher Torng
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* Stephan Diestelhorst
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*/
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#include "sim/clock_domain.hh"
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#include <algorithm>
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#include <functional>
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#include "base/trace.hh"
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#include "debug/ClockDomain.hh"
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#include "params/ClockDomain.hh"
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#include "params/DerivedClockDomain.hh"
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#include "params/SrcClockDomain.hh"
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#include "sim/clocked_object.hh"
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#include "sim/voltage_domain.hh"
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void
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ClockDomain::regStats()
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{
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SimObject::regStats();
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using namespace Stats;
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// Expose the current clock period as a stat for observability in
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// the dumps
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currentClock
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.scalar(_clockPeriod)
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.name(params()->name + ".clock")
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.desc("Clock period in ticks")
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;
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}
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double
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ClockDomain::voltage() const
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{
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return _voltageDomain->voltage();
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}
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SrcClockDomain::SrcClockDomain(const Params *p) :
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ClockDomain(p, p->voltage_domain),
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freqOpPoints(p->clock),
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_domainID(p->domain_id),
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_perfLevel(p->init_perf_level)
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{
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VoltageDomain *vdom = p->voltage_domain;
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fatal_if(freqOpPoints.empty(), "DVFS: Empty set of frequencies for "\
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"domain %d %s\n", _domainID, name());
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fatal_if(!vdom, "DVFS: Empty voltage domain specified for "\
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"domain %d %s\n", _domainID, name());
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fatal_if((vdom->numVoltages() > 1) &&
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(vdom->numVoltages() != freqOpPoints.size()),
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"DVFS: Number of frequency and voltage scaling points do "\
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"not match: %d:%d ID: %d %s.\n", vdom->numVoltages(),
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freqOpPoints.size(), _domainID, name());
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// Frequency (& voltage) points should be declared in descending order,
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// NOTE: Frequency is inverted to ticks, so checking for ascending ticks
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fatal_if(!std::is_sorted(freqOpPoints.begin(), freqOpPoints.end()),
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"DVFS: Frequency operation points not in descending order for "\
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"domain with ID %d\n", _domainID);
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fatal_if(_perfLevel >= freqOpPoints.size(), "DVFS: Initial DVFS point %d "\
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"is outside of list for Domain ID: %d\n", _perfLevel, _domainID);
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clockPeriod(freqOpPoints[_perfLevel]);
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vdom->registerSrcClockDom(this);
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}
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void
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SrcClockDomain::clockPeriod(Tick clock_period)
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{
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if (clock_period == 0) {
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fatal("%s has a clock period of zero\n", name());
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}
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// Align all members to the current tick
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for (auto m = members.begin(); m != members.end(); ++m) {
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(*m)->updateClockPeriod();
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}
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_clockPeriod = clock_period;
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DPRINTF(ClockDomain,
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"Setting clock period to %d ticks for source clock %s\n",
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_clockPeriod, name());
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// inform any derived clocks they need to updated their period
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for (auto c = children.begin(); c != children.end(); ++c) {
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(*c)->updateClockPeriod();
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}
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}
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void
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SrcClockDomain::perfLevel(PerfLevel perf_level)
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{
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assert(validPerfLevel(perf_level));
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if (perf_level == _perfLevel) {
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// Silently ignore identical overwrites
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return;
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}
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DPRINTF(ClockDomain, "DVFS: Switching performance level of domain %s "\
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"(id: %d) from %d to %d\n", name(), domainID(), _perfLevel,
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perf_level);
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_perfLevel = perf_level;
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signalPerfLevelUpdate();
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}
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void SrcClockDomain::signalPerfLevelUpdate()
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{
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// Signal the voltage domain that we have changed our perf level so that the
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// voltage domain can recompute its performance level
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voltageDomain()->sanitiseVoltages();
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// Integrated switching of the actual clock value, too
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clockPeriod(clkPeriodAtPerfLevel());
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}
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void
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SrcClockDomain::serialize(CheckpointOut &cp) const
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{
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SERIALIZE_SCALAR(_perfLevel);
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ClockDomain::serialize(cp);
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}
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void
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SrcClockDomain::unserialize(CheckpointIn &cp)
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{
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ClockDomain::unserialize(cp);
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UNSERIALIZE_SCALAR(_perfLevel);
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}
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void
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SrcClockDomain::startup()
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{
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// Perform proper clock update when all related components have been
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// created (i.e. after unserialization / object creation)
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signalPerfLevelUpdate();
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}
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SrcClockDomain *
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SrcClockDomainParams::create()
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{
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return new SrcClockDomain(this);
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}
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DerivedClockDomain::DerivedClockDomain(const Params *p) :
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ClockDomain(p, p->clk_domain->voltageDomain()),
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parent(*p->clk_domain),
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clockDivider(p->clk_divider)
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{
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// Ensure that clock divider setting works as frequency divider and never
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// work as frequency multiplier
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if (clockDivider < 1) {
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fatal("Clock divider param cannot be less than 1");
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}
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// let the parent keep track of this derived domain so that it can
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// propagate changes
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parent.addDerivedDomain(this);
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// update our clock period based on the parents clock
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updateClockPeriod();
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}
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void
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DerivedClockDomain::updateClockPeriod()
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{
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// Align all members to the current tick
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for (auto m = members.begin(); m != members.end(); ++m) {
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(*m)->updateClockPeriod();
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}
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// recalculate the clock period, relying on the fact that changes
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// propagate downwards in the tree
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_clockPeriod = parent.clockPeriod() * clockDivider;
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DPRINTF(ClockDomain,
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"Setting clock period to %d ticks for derived clock %s\n",
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_clockPeriod, name());
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// inform any derived clocks
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for (auto c = children.begin(); c != children.end(); ++c) {
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(*c)->updateClockPeriod();
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}
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}
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DerivedClockDomain *
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DerivedClockDomainParams::create()
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{
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return new DerivedClockDomain(this);
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}
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