196 lines
6.1 KiB
C++
196 lines
6.1 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#include <Python.h>
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#include <string>
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#include "base/inifile.hh"
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#include "base/output.hh"
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#include "config/the_isa.hh"
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#if THE_ISA != NULL_ISA
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#include "dev/net/etherdevice.hh"
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#include "dev/net/etherobject.hh"
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#endif
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#include "python/swig/pyobject.hh"
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#include "mem/mem_object.hh"
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#include "mem/ruby/slicc_interface/AbstractController.hh"
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#include "sim/full_system.hh"
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#include "sim/sim_object.hh"
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using namespace std;
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#if THE_ISA != NULL_ISA
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EtherInt *
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lookupEthPort(SimObject *so, const std::string &name, int i)
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{
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EtherObject *eo = dynamic_cast<EtherObject *>(so);
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EtherDevice *ed = dynamic_cast<EtherDevice *>(so);
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if (eo == NULL && ed == NULL) {
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warn("error casting SimObject %s", so->name());
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return NULL;
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}
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EtherInt *p = NULL;
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if (eo)
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p = eo->getEthPort(name, i);
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else
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p = ed->getEthPort(name, i);
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return p;
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}
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#endif
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/**
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* Connect the described MemObject ports. Called from Python via SWIG.
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* The indices i1 & i2 will be -1 for regular ports, >= 0 for vector ports.
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* SimObject1 is the master, and SimObject2 is the slave
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*/
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int
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connectPorts(SimObject *o1, const std::string &name1, int i1,
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SimObject *o2, const std::string &name2, int i2)
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{
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#if THE_ISA != NULL_ISA
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EtherObject *eo1, *eo2;
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EtherDevice *ed1, *ed2;
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eo1 = dynamic_cast<EtherObject*>(o1);
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ed1 = dynamic_cast<EtherDevice*>(o1);
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eo2 = dynamic_cast<EtherObject*>(o2);
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ed2 = dynamic_cast<EtherDevice*>(o2);
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if ((eo1 || ed1) && (eo2 || ed2)) {
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EtherInt *p1 = lookupEthPort(o1, name1, i1);
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EtherInt *p2 = lookupEthPort(o2, name2, i2);
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if (p1 != NULL && p2 != NULL) {
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p1->setPeer(p2);
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p2->setPeer(p1);
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return 1;
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}
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}
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#endif
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// These could be MessageBuffers from the ruby memory system. If so, they
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// need not be connected to anything currently.
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MessageBuffer *mb1, *mb2;
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mb1 = dynamic_cast<MessageBuffer*>(o1);
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mb2 = dynamic_cast<MessageBuffer*>(o2);
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if (mb1 || mb2) {
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// No need to connect anything here currently. MessageBuffer
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// connections in Python only serve to print the connections in
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// the config output.
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// TODO: Add real ports to MessageBuffers and use MemObject connect
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// code below to bind MessageBuffer senders and receivers
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return 1;
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}
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MemObject *mo1, *mo2;
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mo1 = dynamic_cast<MemObject*>(o1);
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mo2 = dynamic_cast<MemObject*>(o2);
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if (mo1 == NULL || mo2 == NULL) {
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panic ("Error casting SimObjects %s and %s to MemObject", o1->name(),
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o2->name());
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}
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// generic master/slave port connection
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BaseMasterPort& masterPort = mo1->getMasterPort(name1, i1);
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BaseSlavePort& slavePort = mo2->getSlavePort(name2, i2);
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masterPort.bind(slavePort);
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return 1;
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}
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inline IniFile &
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inifile()
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{
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static IniFile inifile;
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return inifile;
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}
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/**
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* Convert a pointer to the Python object that SWIG wraps around a C++
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* SimObject pointer back to the actual C++ pointer. See main.i.
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*/
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extern "C" SimObject *convertSwigSimObjectPtr(PyObject *);
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// Python.h is notoriously not const-correct (for 2.4, anyway)... make
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// a little define here to reduce the noise and make it easier to
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// #ifdef away if Python.h gets fixed. Note there are a couple of
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// these in sim/main.cc as well that are handled without this define.
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#define PCC(s) const_cast<char *>(s)
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/** Single instance of PythonSimObjectResolver as its action is effectively
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* static but SimObjectResolver can use a non-persistent object */
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PythonSimObjectResolver pythonSimObjectResolver;
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SimObject *
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PythonSimObjectResolver::resolveSimObject(const string &name)
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{
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PyObject *module = PyImport_ImportModule(PCC("m5.SimObject"));
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if (module == NULL)
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panic("Could not import m5.SimObject");
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PyObject *resolver =
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PyObject_GetAttrString(module, PCC("resolveSimObject"));
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if (resolver == NULL) {
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PyErr_Print();
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panic("resolveSimObject: failed to find resolveSimObject");
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}
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PyObject *ptr = PyObject_CallFunction(resolver, PCC("(s)"), name.c_str());
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if (ptr == NULL) {
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PyErr_Print();
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panic("resolveSimObject: failure on call to Python for %s", name);
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}
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SimObject *obj = convertSwigSimObjectPtr(ptr);
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if (obj == NULL)
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panic("resolveSimObject: failure on pointer conversion for %s", name);
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Py_DECREF(module);
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Py_DECREF(resolver);
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Py_DECREF(ptr);
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return obj;
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}
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CheckpointIn *
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getCheckpoint(const std::string &cpt_dir)
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{
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return new CheckpointIn(cpt_dir, pythonSimObjectResolver);
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}
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