109cc2caa6
Change-Id: If19b9c593b48ded1ea848f2d3710d4369ec8a221 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
78 lines
3.5 KiB
Python
78 lines
3.5 KiB
Python
# Copyright (c) 2012-2013 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Andreas Sandberg
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from m5.params import *
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from m5.proxy import *
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from m5.SimObject import SimObject
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from Device import PioDevice
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from Platform import Platform
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class BaseGic(PioDevice):
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type = 'BaseGic'
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abstract = True
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cxx_header = "dev/arm/base_gic.hh"
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platform = Param.Platform(Parent.any, "Platform this device is part of.")
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class Pl390(BaseGic):
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type = 'Pl390'
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cxx_header = "dev/arm/gic_pl390.hh"
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dist_addr = Param.Addr(0x1f001000, "Address for distributor")
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cpu_addr = Param.Addr(0x1f000100, "Address for cpu")
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dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor")
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cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface")
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int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU")
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it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)")
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gem5_extensions = Param.Bool(False, "Enable gem5 extensions")
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class Gicv2mFrame(SimObject):
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type = 'Gicv2mFrame'
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cxx_header = "dev/arm/gic_v2m.hh"
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spi_base = Param.UInt32(0x0, "Frame SPI base number");
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spi_len = Param.UInt32(0x0, "Frame SPI total number");
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addr = Param.Addr("Address for frame PIO")
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class Gicv2m(PioDevice):
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type = 'Gicv2m'
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cxx_header = "dev/arm/gic_v2m.hh"
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pio_delay = Param.Latency('10ns', "Delay for PIO r/w")
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gic = Param.BaseGic(Parent.any, "Gic on which to trigger interrupts")
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frames = VectorParam.Gicv2mFrame([], "Power of two number of frames")
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