554ddc7c07
This patch simplifies the overall CPU by changing the TLB caches such that they do not forward snoops to the table walker port(s). Note that only ARM and X86 are affected. There is no reason for the ports to snoop as they do not actually take any action, and from a performance point of view we are better of not snooping more than we have to. Should it at a later point be required to snoop for a particular TLB design it is easy enough to add it back.
214 lines
7.4 KiB
C++
214 lines
7.4 KiB
C++
/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_X86_PAGE_TABLE_WALKER_HH__
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#define __ARCH_X86_PAGE_TABLE_WALKER_HH__
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#include <vector>
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#include "arch/x86/pagetable.hh"
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#include "arch/x86/tlb.hh"
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#include "base/types.hh"
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#include "mem/mem_object.hh"
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#include "mem/packet.hh"
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#include "params/X86PagetableWalker.hh"
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#include "sim/faults.hh"
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#include "sim/system.hh"
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class ThreadContext;
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namespace X86ISA
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{
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class Walker : public MemObject
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{
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protected:
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// Port for accessing memory
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class WalkerPort : public MasterPort
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{
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public:
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WalkerPort(const std::string &_name, Walker * _walker) :
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MasterPort(_name, _walker), walker(_walker)
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{}
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protected:
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Walker *walker;
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bool recvTimingResp(PacketPtr pkt);
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void recvReqRetry();
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};
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friend class WalkerPort;
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WalkerPort port;
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// State to track each walk of the page table
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class WalkerState
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{
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friend class Walker;
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private:
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enum State {
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Ready,
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Waiting,
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// Long mode
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LongPML4, LongPDP, LongPD, LongPTE,
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// PAE legacy mode
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PAEPDP, PAEPD, PAEPTE,
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// Non PAE legacy mode with and without PSE
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PSEPD, PD, PTE
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};
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protected:
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Walker *walker;
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ThreadContext *tc;
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RequestPtr req;
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State state;
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State nextState;
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int dataSize;
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bool enableNX;
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unsigned inflight;
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TlbEntry entry;
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PacketPtr read;
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std::vector<PacketPtr> writes;
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Fault timingFault;
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TLB::Translation * translation;
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BaseTLB::Mode mode;
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bool functional;
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bool timing;
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bool retrying;
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bool started;
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public:
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WalkerState(Walker * _walker, BaseTLB::Translation *_translation,
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RequestPtr _req, bool _isFunctional = false) :
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walker(_walker), req(_req), state(Ready),
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nextState(Ready), inflight(0),
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translation(_translation),
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functional(_isFunctional), timing(false),
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retrying(false), started(false)
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{
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}
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void initState(ThreadContext * _tc, BaseTLB::Mode _mode,
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bool _isTiming = false);
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Fault startWalk();
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Fault startFunctional(Addr &addr, unsigned &logBytes);
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bool recvPacket(PacketPtr pkt);
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bool isRetrying();
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bool wasStarted();
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bool isTiming();
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void retry();
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std::string name() const {return walker->name();}
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private:
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void setupWalk(Addr vaddr);
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Fault stepWalk(PacketPtr &write);
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void sendPackets();
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void endWalk();
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Fault pageFault(bool present);
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};
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friend class WalkerState;
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// State for timing and atomic accesses (need multiple per walker in
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// the case of multiple outstanding requests in timing mode)
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std::list<WalkerState *> currStates;
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// State for functional accesses (only need one of these per walker)
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WalkerState funcState;
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struct WalkerSenderState : public Packet::SenderState
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{
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WalkerState * senderWalk;
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WalkerSenderState(WalkerState * _senderWalk) :
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senderWalk(_senderWalk) {}
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};
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public:
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// Kick off the state machine.
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Fault start(ThreadContext * _tc, BaseTLB::Translation *translation,
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RequestPtr req, BaseTLB::Mode mode);
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Fault startFunctional(ThreadContext * _tc, Addr &addr,
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unsigned &logBytes, BaseTLB::Mode mode);
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BaseMasterPort &getMasterPort(const std::string &if_name,
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PortID idx = InvalidPortID);
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protected:
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// The TLB we're supposed to load.
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TLB * tlb;
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System * sys;
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MasterID masterId;
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// The number of outstanding walks that can be squashed per cycle.
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unsigned numSquashable;
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// Wrapper for checking for squashes before starting a translation.
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void startWalkWrapper();
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/**
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* Event used to call startWalkWrapper.
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**/
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EventWrapper<Walker, &Walker::startWalkWrapper> startWalkWrapperEvent;
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// Functions for dealing with packets.
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bool recvTimingResp(PacketPtr pkt);
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void recvReqRetry();
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bool sendTiming(WalkerState * sendingState, PacketPtr pkt);
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public:
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void setTLB(TLB * _tlb)
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{
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tlb = _tlb;
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}
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typedef X86PagetableWalkerParams Params;
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const Params *
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params() const
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{
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return static_cast<const Params *>(_params);
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}
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Walker(const Params *params) :
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MemObject(params), port(name() + ".port", this),
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funcState(this, NULL, NULL, true), tlb(NULL), sys(params->system),
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masterId(sys->getMasterId(name())),
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numSquashable(params->num_squash_per_cycle),
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startWalkWrapperEvent(this)
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{
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}
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};
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}
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#endif // __ARCH_X86_PAGE_TABLE_WALKER_HH__
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