gem5/src/arch/sparc/decoder.hh
Rekai Gonzalez Alberquilla d3d159749a isa: Add parameter to pick different decoder inside ISA
The decoder is responsible for splitting instructions in micro
operations (uops). Given that different micro architectures may split
operations differently, this patch allows to specify which micro
architecture each isa implements, so different cores in the system can
split instructions differently, also decoupling uop splitting
(microArch) from ISA (Arch). This is done making the decodification
calls templates that receive a type 'DecoderFlavour' that maps the
name of the operation to the class that implements it. This way there
is only one selection point (converting the command line enum to the
appropriate DecodeFeatures object). In addition, there is no explicit
code replication: template instantiation hides that, and the compiler
should be able to resolve a number of things at compile-time.
2015-10-09 14:50:54 -05:00

132 lines
3.7 KiB
C++

/*
* Copyright (c) 2012 Google
* All rights reserved.
*
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* neither the name of the copyright holders nor the names of its
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* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* Authors: Gabe Black
*/
#ifndef __ARCH_SPARC_DECODER_HH__
#define __ARCH_SPARC_DECODER_HH__
#include "arch/generic/decode_cache.hh"
#include "arch/sparc/registers.hh"
#include "arch/types.hh"
#include "cpu/static_inst.hh"
namespace SparcISA
{
class ISA;
class Decoder
{
protected:
// The extended machine instruction being generated
ExtMachInst emi;
bool instDone;
MiscReg asi;
public:
Decoder(ISA* isa = nullptr) : instDone(false), asi(0)
{}
void process() {}
void
reset()
{
instDone = false;
}
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
{
emi = inst;
// The I bit, bit 13, is used to figure out where the ASI
// should come from. Use that in the ExtMachInst. This is
// slightly redundant, but it removes the need to put a condition
// into all the execute functions
if (inst & (1 << 13)) {
emi |= (static_cast<ExtMachInst>(
asi << (sizeof(MachInst) * 8)));
} else {
emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5))
<< (sizeof(MachInst) * 8));
}
instDone = true;
}
bool
needMoreBytes()
{
return true;
}
bool
instReady()
{
return instDone;
}
void
setContext(MiscReg _asi)
{
asi = _asi;
}
void takeOverFrom(Decoder *old) {}
protected:
/// A cache of decoded instruction objects.
static GenericISA::BasicDecodeCache defaultCache;
public:
StaticInstPtr decodeInst(ExtMachInst mach_inst);
/// Decode a machine instruction.
/// @param mach_inst The binary instruction to decode.
/// @retval A pointer to the corresponding StaticInst object.
StaticInstPtr
decode(ExtMachInst mach_inst, Addr addr)
{
return defaultCache.decode(this, mach_inst, addr);
}
StaticInstPtr
decode(SparcISA::PCState &nextPC)
{
if (!instDone)
return NULL;
instDone = false;
return decode(emi, nextPC.instAddr());
}
};
} // namespace SparcISA
#endif // __ARCH_SPARC_DECODER_HH__