0deef376d9
This patch includes software engineering changes and some generic bug fixes
Joel Hestness and Yasuko Eckert made to McPAT 0.8. There are still known
issues/concernts we did not have a chance to address in this patch.
High-level changes in this patch include:
1) Making XML parsing modular and hierarchical:
- Shift parsing responsibility into the components
- Read XML in a (mostly) context-free recursive manner so that McPAT input
files can contain arbitrary component hierarchies
2) Making power, energy, and area calculations a hierarchical and recursive
process
- Components track their subcomponents and recursively call compute
functions in stages
- Make C++ object hierarchy reflect inheritance of classes of components
with similar structures
- Simplify computeArea() and computeEnergy() functions to eliminate
successive calls to calculate separate TDP vs. runtime energy
- Remove Processor component (now unnecessary) and introduce a more abstract
System component
3) Standardizing McPAT output across all components
- Use a single, common data structure for storing and printing McPAT output
- Recursively call print functions through component hierarchy
4) For caches, allow splitting data array and tag array reads and writes for
better accuracy
5) Improving the usability of CACTI by printing more helpful warning and error
messages
6) Minor: Impose more rigorous code style for clarity (more work still to be
done)
Overall, these changes greatly reduce the amount of replicated code, and they
improve McPAT runtime and decrease memory footprint.
855 lines
33 KiB
C++
855 lines
33 KiB
C++
/*****************************************************************************
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* McPAT/CACTI
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* SOFTWARE LICENSE AGREEMENT
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* Copyright 2012 Hewlett-Packard Development Company, L.P.
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* Copyright (c) 2010-2013 Advanced Micro Devices, Inc.
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* All Rights Reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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***************************************************************************/
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#include "wire.h"
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#include "cmath"
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// use this constructor to calculate wire stats
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Wire::Wire(
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enum Wire_type wire_model,
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double wl,
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int n,
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double w_s,
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double s_s,
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enum Wire_placement wp,
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double resistivity,
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TechnologyParameter::DeviceType *dt
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): wt(wire_model), wire_length(wl*1e-6), nsense(n), w_scale(w_s),
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s_scale(s_s),
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resistivity(resistivity), deviceType(dt) {
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wire_placement = wp;
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min_w_pmos = deviceType->n_to_p_eff_curr_drv_ratio * g_tp.min_w_nmos_;
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in_rise_time = 0;
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out_rise_time = 0;
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if (initialized != 1) {
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cout << "Wire not initialized. Initializing it with default values\n";
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Wire winit;
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}
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calculate_wire_stats();
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// change everything back to seconds, microns, and Joules
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repeater_spacing *= 1e6;
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wire_length *= 1e6;
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wire_width *= 1e6;
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wire_spacing *= 1e6;
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assert(wire_length > 0);
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assert(power.readOp.dynamic > 0);
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assert(power.readOp.leakage > 0);
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assert(power.readOp.gate_leakage > 0);
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}
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// the following values are for peripheral global technology
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// specified in the input config file
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Component Wire::global;
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Component Wire::global_5;
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Component Wire::global_10;
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Component Wire::global_20;
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Component Wire::global_30;
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Component Wire::low_swing;
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int Wire::initialized;
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double Wire::wire_width_init;
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double Wire::wire_spacing_init;
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Wire::Wire(double w_s, double s_s, enum Wire_placement wp, double resis,
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TechnologyParameter::DeviceType *dt) {
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w_scale = w_s;
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s_scale = s_s;
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deviceType = dt;
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wire_placement = wp;
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resistivity = resis;
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min_w_pmos = deviceType->n_to_p_eff_curr_drv_ratio * g_tp.min_w_nmos_;
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in_rise_time = 0;
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out_rise_time = 0;
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switch (wire_placement) {
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case outside_mat:
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wire_width = g_tp.wire_outside_mat.pitch;
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break;
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case inside_mat :
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wire_width = g_tp.wire_inside_mat.pitch;
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break;
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default:
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wire_width = g_tp.wire_local.pitch;
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break;
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}
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wire_spacing = wire_width;
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wire_width *= (w_scale * 1e-6 / 2) /* (m) */;
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wire_spacing *= (s_scale * 1e-6 / 2) /* (m) */;
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initialized = 1;
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init_wire();
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wire_width_init = wire_width;
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wire_spacing_init = wire_spacing;
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assert(power.readOp.dynamic > 0);
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assert(power.readOp.leakage > 0);
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assert(power.readOp.gate_leakage > 0);
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}
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Wire::~Wire() {
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}
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void
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Wire::calculate_wire_stats() {
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if (wire_placement == outside_mat) {
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wire_width = g_tp.wire_outside_mat.pitch;
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} else if (wire_placement == inside_mat) {
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wire_width = g_tp.wire_inside_mat.pitch;
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} else {
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wire_width = g_tp.wire_local.pitch;
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}
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wire_spacing = wire_width;
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wire_width *= (w_scale * 1e-6 / 2) /* (m) */;
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wire_spacing *= (s_scale * 1e-6 / 2) /* (m) */;
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if (wt != Low_swing) {
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// delay_optimal_wire();
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if (wt == Global) {
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delay = global.delay * wire_length;
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power.readOp.dynamic = global.power.readOp.dynamic * wire_length;
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power.readOp.leakage = global.power.readOp.leakage * wire_length;
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power.readOp.gate_leakage = global.power.readOp.gate_leakage * wire_length;
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repeater_spacing = global.area.w;
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repeater_size = global.area.h;
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area.set_area((wire_length / repeater_spacing) *
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compute_gate_area(INV, 1, min_w_pmos * repeater_size,
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g_tp.min_w_nmos_ * repeater_size,
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g_tp.cell_h_def));
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} else if (wt == Global_5) {
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delay = global_5.delay * wire_length;
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power.readOp.dynamic = global_5.power.readOp.dynamic * wire_length;
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power.readOp.leakage = global_5.power.readOp.leakage * wire_length;
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power.readOp.gate_leakage = global_5.power.readOp.gate_leakage * wire_length;
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repeater_spacing = global_5.area.w;
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repeater_size = global_5.area.h;
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area.set_area((wire_length / repeater_spacing) *
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compute_gate_area(INV, 1, min_w_pmos * repeater_size,
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g_tp.min_w_nmos_ * repeater_size,
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g_tp.cell_h_def));
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} else if (wt == Global_10) {
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delay = global_10.delay * wire_length;
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power.readOp.dynamic = global_10.power.readOp.dynamic * wire_length;
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power.readOp.leakage = global_10.power.readOp.leakage * wire_length;
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power.readOp.gate_leakage = global_10.power.readOp.gate_leakage * wire_length;
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repeater_spacing = global_10.area.w;
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repeater_size = global_10.area.h;
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area.set_area((wire_length / repeater_spacing) *
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compute_gate_area(INV, 1, min_w_pmos * repeater_size,
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g_tp.min_w_nmos_ * repeater_size,
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g_tp.cell_h_def));
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} else if (wt == Global_20) {
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delay = global_20.delay * wire_length;
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power.readOp.dynamic = global_20.power.readOp.dynamic * wire_length;
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power.readOp.leakage = global_20.power.readOp.leakage * wire_length;
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power.readOp.gate_leakage = global_20.power.readOp.gate_leakage * wire_length;
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repeater_spacing = global_20.area.w;
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repeater_size = global_20.area.h;
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area.set_area((wire_length / repeater_spacing) *
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compute_gate_area(INV, 1, min_w_pmos * repeater_size,
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g_tp.min_w_nmos_ * repeater_size,
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g_tp.cell_h_def));
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} else if (wt == Global_30) {
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delay = global_30.delay * wire_length;
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power.readOp.dynamic = global_30.power.readOp.dynamic * wire_length;
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power.readOp.leakage = global_30.power.readOp.leakage * wire_length;
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power.readOp.gate_leakage = global_30.power.readOp.gate_leakage * wire_length;
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repeater_spacing = global_30.area.w;
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repeater_size = global_30.area.h;
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area.set_area((wire_length / repeater_spacing) *
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compute_gate_area(INV, 1, min_w_pmos * repeater_size,
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g_tp.min_w_nmos_ * repeater_size,
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g_tp.cell_h_def));
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}
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out_rise_time = delay * repeater_spacing / deviceType->Vth;
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} else if (wt == Low_swing) {
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low_swing_model ();
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repeater_spacing = wire_length;
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repeater_size = 1;
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} else {
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assert(0);
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}
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}
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/*
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* The fall time of an input signal to the first stage of a circuit is
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* assumed to be same as the fall time of the output signal of two
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* inverters connected in series (refer: CACTI 1 Technical report,
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* section 6.1.3)
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*/
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double
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Wire::signal_fall_time () {
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/* rise time of inverter 1's output */
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double rt;
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/* fall time of inverter 2's output */
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double ft;
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double timeconst;
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timeconst = (drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def) +
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drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
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gate_C(min_w_pmos + g_tp.min_w_nmos_, 0)) *
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tr_R_on(min_w_pmos, PCH, 1);
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rt = horowitz (0, timeconst, deviceType->Vth / deviceType->Vdd,
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deviceType->Vth / deviceType->Vdd, FALL) /
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(deviceType->Vdd - deviceType->Vth);
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timeconst = (drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def) +
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drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
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gate_C(min_w_pmos + g_tp.min_w_nmos_, 0)) *
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tr_R_on(g_tp.min_w_nmos_, NCH, 1);
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ft = horowitz (rt, timeconst, deviceType->Vth / deviceType->Vdd,
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deviceType->Vth / deviceType->Vdd, RISE) / deviceType->Vth;
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return ft;
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}
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double Wire::signal_rise_time () {
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/* rise time of inverter 1's output */
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double ft;
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/* fall time of inverter 2's output */
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double rt;
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double timeconst;
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timeconst = (drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def) +
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drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
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gate_C(min_w_pmos + g_tp.min_w_nmos_, 0)) *
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tr_R_on(g_tp.min_w_nmos_, NCH, 1);
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rt = horowitz (0, timeconst, deviceType->Vth / deviceType->Vdd,
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deviceType->Vth / deviceType->Vdd, RISE) / deviceType->Vth;
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timeconst = (drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def) +
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drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
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gate_C(min_w_pmos + g_tp.min_w_nmos_, 0)) *
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tr_R_on(min_w_pmos, PCH, 1);
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ft = horowitz (rt, timeconst, deviceType->Vth / deviceType->Vdd,
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deviceType->Vth / deviceType->Vdd, FALL) /
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(deviceType->Vdd - deviceType->Vth);
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return ft; //sec
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}
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/* Wire resistance and capacitance calculations
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* wire width
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*
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* /__/
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* | |
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* | | height = ASPECT_RATIO*wire width (ASPECT_RATIO = 2.2, ref: ITRS)
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* |__|/
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*
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* spacing between wires in same level = wire width
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* spacing between wires in adjacent levels = wire width---this is incorrect,
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* according to R.Ho's paper and thesis. ILD != wire width
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*
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*/
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double Wire::wire_cap (double len /* in m */, bool call_from_outside) {
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//TODO: this should be consistent with the wire_res in technology file
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double sidewall, adj, tot_cap;
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double wire_height;
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double epsilon0 = 8.8542e-12;
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double aspect_ratio;
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double horiz_dielectric_constant;
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double vert_dielectric_constant;
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double miller_value;
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double ild_thickness;
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switch (wire_placement) {
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case outside_mat: {
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aspect_ratio = g_tp.wire_outside_mat.aspect_ratio;
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horiz_dielectric_constant = g_tp.wire_outside_mat.horiz_dielectric_constant;
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vert_dielectric_constant = g_tp.wire_outside_mat.vert_dielectric_constant;
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miller_value = g_tp.wire_outside_mat.miller_value;
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ild_thickness = g_tp.wire_outside_mat.ild_thickness;
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break;
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}
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case inside_mat : {
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aspect_ratio = g_tp.wire_inside_mat.aspect_ratio;
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horiz_dielectric_constant = g_tp.wire_inside_mat.horiz_dielectric_constant;
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vert_dielectric_constant = g_tp.wire_inside_mat.vert_dielectric_constant;
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miller_value = g_tp.wire_inside_mat.miller_value;
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ild_thickness = g_tp.wire_inside_mat.ild_thickness;
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break;
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}
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default: {
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aspect_ratio = g_tp.wire_local.aspect_ratio;
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horiz_dielectric_constant = g_tp.wire_local.horiz_dielectric_constant;
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vert_dielectric_constant = g_tp.wire_local.vert_dielectric_constant;
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miller_value = g_tp.wire_local.miller_value;
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ild_thickness = g_tp.wire_local.ild_thickness;
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break;
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}
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}
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if (call_from_outside) {
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wire_width *= 1e-6;
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wire_spacing *= 1e-6;
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}
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wire_height = wire_width / w_scale * aspect_ratio;
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/*
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* assuming height does not change. wire_width = width_original*w_scale
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* So wire_height does not change as wire width increases
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*/
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// capacitance between wires in the same level
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// sidewall = 2*miller_value * horiz_dielectric_constant * (wire_height/wire_spacing)
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// * epsilon0;
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sidewall = miller_value * horiz_dielectric_constant *
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(wire_height / wire_spacing)
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* epsilon0;
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// capacitance between wires in adjacent levels
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//adj = miller_value * vert_dielectric_constant *w_scale * epsilon0;
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//adj = 2*vert_dielectric_constant *wire_width/(ild_thickness*1e-6) * epsilon0;
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adj = miller_value * vert_dielectric_constant * wire_width /
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(ild_thickness * 1e-6) * epsilon0;
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//Change ild_thickness from micron to M
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//tot_cap = (sidewall + adj + (deviceType->C_fringe * 1e6)); //F/m
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tot_cap = (sidewall + adj + (g_tp.fringe_cap * 1e6)); //F/m
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if (call_from_outside) {
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wire_width *= 1e6;
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wire_spacing *= 1e6;
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}
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return (tot_cap*len); // (F)
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}
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double
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Wire::wire_res (double len /*(in m)*/) {
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double aspect_ratio;
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double alpha_scatter = 1.05;
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double dishing_thickness = 0;
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double barrier_thickness = 0;
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//TODO: this should be consistent with the wire_res in technology file
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//The whole computation should be consistent with the wire_res in technology.cc too!
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switch (wire_placement) {
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case outside_mat: {
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aspect_ratio = g_tp.wire_outside_mat.aspect_ratio;
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break;
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}
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case inside_mat : {
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aspect_ratio = g_tp.wire_inside_mat.aspect_ratio;
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break;
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}
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default: {
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aspect_ratio = g_tp.wire_local.aspect_ratio;
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break;
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}
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}
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return (alpha_scatter * resistivity * 1e-6 * len /
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((aspect_ratio*wire_width / w_scale - dishing_thickness -
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barrier_thickness)*
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(wire_width - 2*barrier_thickness)));
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}
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/*
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* Calculates the delay, power and area of the transmitter circuit.
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*
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* The transmitter delay is the sum of nand gate delay, inverter delay
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* low swing nmos delay, and the wire delay
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* (ref: Technical report 6)
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*/
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void
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Wire::low_swing_model() {
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double len = wire_length;
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double beta = pmos_to_nmos_sz_ratio();
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double inputrise = (in_rise_time == 0) ? signal_rise_time() : in_rise_time;
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/* Final nmos low swing driver size calculation:
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* Try to size the driver such that the delay
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* is less than 8FO4.
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* If the driver size is greater than
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* the max allowable size, assume max size for the driver.
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* In either case, recalculate the delay using
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* the final driver size assuming slow input with
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* finite rise time instead of ideal step input
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*
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* (ref: Technical report 6)
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*/
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double cwire = wire_cap(len); /* load capacitance */
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double rwire = wire_res(len);
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#define RES_ADJ (8.6) // Increase in resistance due to low driving vol.
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double driver_res = (-8 * g_tp.FO4 / (log(0.5) * cwire)) / RES_ADJ;
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double nsize = R_to_w(driver_res, NCH);
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nsize = MIN(nsize, g_tp.max_w_nmos_);
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nsize = MAX(nsize, g_tp.min_w_nmos_);
|
|
|
|
if (rwire*cwire > 8*g_tp.FO4) {
|
|
nsize = g_tp.max_w_nmos_;
|
|
}
|
|
|
|
// size the inverter appropriately to minimize the transmitter delay
|
|
// Note - In order to minimize leakage, we are not adding a set of inverters to
|
|
// bring down delay. Instead, we are sizing the single gate
|
|
// based on the logical effort.
|
|
double st_eff = sqrt((2 + beta / 1 + beta) * gate_C(nsize, 0) /
|
|
(gate_C(2 * g_tp.min_w_nmos_, 0)
|
|
+ gate_C(2 * min_w_pmos, 0)));
|
|
double req_cin = ((2 + beta / 1 + beta) * gate_C(nsize, 0)) / st_eff;
|
|
double inv_size = req_cin / (gate_C(min_w_pmos, 0) +
|
|
gate_C(g_tp.min_w_nmos_, 0));
|
|
inv_size = MAX(inv_size, 1);
|
|
|
|
/* nand gate delay */
|
|
double res_eq = (2 * tr_R_on(g_tp.min_w_nmos_, NCH, 1));
|
|
double cap_eq = 2 * drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
|
|
drain_C_(2 * g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def) +
|
|
gate_C(inv_size * g_tp.min_w_nmos_, 0) +
|
|
gate_C(inv_size * min_w_pmos, 0);
|
|
|
|
double timeconst = res_eq * cap_eq;
|
|
|
|
delay = horowitz(inputrise, timeconst, deviceType->Vth / deviceType->Vdd,
|
|
deviceType->Vth / deviceType->Vdd, RISE);
|
|
double temp_power = cap_eq * deviceType->Vdd * deviceType->Vdd;
|
|
|
|
inputrise = delay / (deviceType->Vdd - deviceType->Vth); /* for the next stage */
|
|
|
|
/* Inverter delay:
|
|
* The load capacitance of this inv depends on
|
|
* the gate capacitance of the final stage nmos
|
|
* transistor which in turn depends on nsize
|
|
*/
|
|
res_eq = tr_R_on(inv_size * min_w_pmos, PCH, 1);
|
|
cap_eq = drain_C_(inv_size * min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
|
|
drain_C_(inv_size * g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def) +
|
|
gate_C(nsize, 0);
|
|
timeconst = res_eq * cap_eq;
|
|
|
|
delay += horowitz(inputrise, timeconst, deviceType->Vth / deviceType->Vdd,
|
|
deviceType->Vth / deviceType->Vdd, FALL);
|
|
temp_power += cap_eq * deviceType->Vdd * deviceType->Vdd;
|
|
|
|
|
|
transmitter.delay = delay;
|
|
/* since it is a diff. model*/
|
|
transmitter.power.readOp.dynamic = temp_power * 2;
|
|
transmitter.power.readOp.leakage = deviceType->Vdd *
|
|
(4 * cmos_Isub_leakage(g_tp.min_w_nmos_, min_w_pmos, 2, nand) +
|
|
4 * cmos_Isub_leakage(g_tp.min_w_nmos_, min_w_pmos, 1, inv));
|
|
|
|
transmitter.power.readOp.gate_leakage = deviceType->Vdd *
|
|
(4 * cmos_Ig_leakage(g_tp.min_w_nmos_, min_w_pmos, 2, nand) +
|
|
4 * cmos_Ig_leakage(g_tp.min_w_nmos_, min_w_pmos, 1, inv));
|
|
|
|
inputrise = delay / deviceType->Vth;
|
|
|
|
/* nmos delay + wire delay */
|
|
cap_eq = cwire + drain_C_(nsize, NCH, 1, 1, g_tp.cell_h_def) * 2 +
|
|
nsense * sense_amp_input_cap(); //+receiver cap
|
|
/*
|
|
* NOTE: nmos is used as both pull up and pull down transistor
|
|
* in the transmitter. This is because for low voltage swing, drive
|
|
* resistance of nmos is less than pmos
|
|
* (for a detailed graph ref: On-Chip Wires: Scaling and Efficiency)
|
|
*/
|
|
timeconst = (tr_R_on(nsize, NCH, 1) * RES_ADJ) * (cwire +
|
|
drain_C_(nsize, NCH, 1, 1, g_tp.cell_h_def) * 2) +
|
|
rwire * cwire / 2 +
|
|
(tr_R_on(nsize, NCH, 1) * RES_ADJ + rwire) *
|
|
nsense * sense_amp_input_cap();
|
|
|
|
/*
|
|
* since we are pre-equalizing and overdriving the low
|
|
* swing wires, the net time constant is less
|
|
* than the actual value
|
|
*/
|
|
delay += horowitz(inputrise, timeconst, deviceType->Vth /
|
|
deviceType->Vdd, .25, 0);
|
|
#define VOL_SWING .1
|
|
temp_power += cap_eq * VOL_SWING * .400; /* .4v is the over drive voltage */
|
|
temp_power *= 2; /* differential wire */
|
|
|
|
l_wire.delay = delay - transmitter.delay;
|
|
l_wire.power.readOp.dynamic = temp_power - transmitter.power.readOp.dynamic;
|
|
l_wire.power.readOp.leakage = deviceType->Vdd *
|
|
(4 * cmos_Isub_leakage(nsize, 0, 1, nmos));
|
|
|
|
l_wire.power.readOp.gate_leakage = deviceType->Vdd *
|
|
(4 * cmos_Ig_leakage(nsize, 0, 1, nmos));
|
|
|
|
//double rt = horowitz(inputrise, timeconst, deviceType->Vth/deviceType->Vdd,
|
|
// deviceType->Vth/deviceType->Vdd, RISE)/deviceType->Vth;
|
|
|
|
delay += g_tp.sense_delay;
|
|
|
|
sense_amp.delay = g_tp.sense_delay;
|
|
out_rise_time = g_tp.sense_delay / (deviceType->Vth);
|
|
sense_amp.power.readOp.dynamic = g_tp.sense_dy_power;
|
|
sense_amp.power.readOp.leakage = 0; //FIXME
|
|
sense_amp.power.readOp.gate_leakage = 0;
|
|
|
|
power.readOp.dynamic = temp_power + sense_amp.power.readOp.dynamic;
|
|
power.readOp.leakage = transmitter.power.readOp.leakage +
|
|
l_wire.power.readOp.leakage +
|
|
sense_amp.power.readOp.leakage;
|
|
power.readOp.gate_leakage = transmitter.power.readOp.gate_leakage +
|
|
l_wire.power.readOp.gate_leakage +
|
|
sense_amp.power.readOp.gate_leakage;
|
|
}
|
|
|
|
double
|
|
Wire::sense_amp_input_cap() {
|
|
return drain_C_(g_tp.w_iso, PCH, 1, 1, g_tp.cell_h_def) +
|
|
gate_C(g_tp.w_sense_en + g_tp.w_sense_n, 0) +
|
|
drain_C_(g_tp.w_sense_n, NCH, 1, 1, g_tp.cell_h_def) +
|
|
drain_C_(g_tp.w_sense_p, PCH, 1, 1, g_tp.cell_h_def);
|
|
}
|
|
|
|
|
|
void Wire::delay_optimal_wire () {
|
|
double len = wire_length;
|
|
//double min_wire_width = wire_width; //m
|
|
double beta = pmos_to_nmos_sz_ratio();
|
|
double switching = 0; // switching energy
|
|
double short_ckt = 0; // short-circuit energy
|
|
double tc = 0; // time constant
|
|
// input cap of min sized driver
|
|
double input_cap = gate_C(g_tp.min_w_nmos_ + min_w_pmos, 0);
|
|
|
|
// output parasitic capacitance of
|
|
// the min. sized driver
|
|
double out_cap = drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
|
|
drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def);
|
|
// drive resistance
|
|
double out_res = (tr_R_on(g_tp.min_w_nmos_, NCH, 1) +
|
|
tr_R_on(min_w_pmos, PCH, 1)) / 2;
|
|
double wr = wire_res(len); //ohm
|
|
|
|
// wire cap /m
|
|
double wc = wire_cap(len);
|
|
|
|
// size the repeater such that the delay of the wire is minimum
|
|
// len will cancel
|
|
double repeater_scaling = sqrt(out_res * wc / (wr * input_cap));
|
|
|
|
// calc the optimum spacing between the repeaters (m)
|
|
|
|
repeater_spacing = sqrt(2 * out_res * (out_cap + input_cap) /
|
|
((wr / len) * (wc / len)));
|
|
repeater_size = repeater_scaling;
|
|
|
|
switching = (repeater_scaling * (input_cap + out_cap) +
|
|
repeater_spacing * (wc / len)) * deviceType->Vdd *
|
|
deviceType->Vdd;
|
|
|
|
tc = out_res * (input_cap + out_cap) +
|
|
out_res * wc / len * repeater_spacing / repeater_scaling +
|
|
wr / len * repeater_spacing * input_cap * repeater_scaling +
|
|
0.5 * (wr / len) * (wc / len) * repeater_spacing * repeater_spacing;
|
|
|
|
delay = 0.693 * tc * len / repeater_spacing;
|
|
|
|
#define Ishort_ckt 65e-6 /* across all tech Ref:Banerjee et al. {IEEE TED} */
|
|
short_ckt = deviceType->Vdd * g_tp.min_w_nmos_ * Ishort_ckt * 1.0986 *
|
|
repeater_scaling * tc;
|
|
|
|
area.set_area((len / repeater_spacing) *
|
|
compute_gate_area(INV, 1, min_w_pmos * repeater_scaling,
|
|
g_tp.min_w_nmos_ * repeater_scaling,
|
|
g_tp.cell_h_def));
|
|
power.readOp.dynamic = ((len / repeater_spacing) * (switching + short_ckt));
|
|
power.readOp.leakage = ((len / repeater_spacing) *
|
|
deviceType->Vdd *
|
|
cmos_Isub_leakage(g_tp.min_w_nmos_ *
|
|
repeater_scaling, beta *
|
|
g_tp.min_w_nmos_ *
|
|
repeater_scaling, 1, inv));
|
|
power.readOp.gate_leakage = ((len / repeater_spacing) *
|
|
deviceType->Vdd *
|
|
cmos_Ig_leakage(g_tp.min_w_nmos_ *
|
|
repeater_scaling, beta *
|
|
g_tp.min_w_nmos_ *
|
|
repeater_scaling, 1, inv));
|
|
}
|
|
|
|
|
|
|
|
// calculate power/delay values for wires with suboptimal repeater sizing/spacing
|
|
void
|
|
Wire::init_wire() {
|
|
wire_length = 1;
|
|
delay_optimal_wire();
|
|
double sp, si;
|
|
powerDef pow;
|
|
si = repeater_size;
|
|
sp = repeater_spacing;
|
|
sp *= 1e6; // in microns
|
|
|
|
double i, j, del;
|
|
repeated_wire.push_back(Component());
|
|
for (j = sp; j < 4*sp; j += 100) {
|
|
for (i = si; i > 1; i--) {
|
|
pow = wire_model(j * 1e-6, i, &del);
|
|
if (j == sp && i == si) {
|
|
global.delay = del;
|
|
global.power = pow;
|
|
global.area.h = si;
|
|
global.area.w = sp * 1e-6; // m
|
|
}
|
|
// cout << "Repeater size - "<< i <<
|
|
// " Repeater spacing - " << j <<
|
|
// " Delay - " << del <<
|
|
// " PowerD - " << pow.readOp.dynamic <<
|
|
// " PowerL - " << pow.readOp.leakage <<endl;
|
|
repeated_wire.back().delay = del;
|
|
repeated_wire.back().power.readOp = pow.readOp;
|
|
repeated_wire.back().area.w = j * 1e-6; //m
|
|
repeated_wire.back().area.h = i;
|
|
repeated_wire.push_back(Component());
|
|
|
|
}
|
|
}
|
|
repeated_wire.pop_back();
|
|
update_fullswing();
|
|
Wire *l_wire = new Wire(Low_swing, 0.001/* 1 mm*/, 1);
|
|
low_swing.delay = l_wire->delay;
|
|
low_swing.power = l_wire->power;
|
|
delete l_wire;
|
|
}
|
|
|
|
|
|
|
|
void Wire::update_fullswing() {
|
|
|
|
list<Component>::iterator citer;
|
|
double del[4];
|
|
del[3] = this->global.delay + this->global.delay * .3;
|
|
del[2] = global.delay + global.delay * .2;
|
|
del[1] = global.delay + global.delay * .1;
|
|
del[0] = global.delay + global.delay * .05;
|
|
double threshold;
|
|
double ncost;
|
|
double cost;
|
|
int i = 4;
|
|
while (i > 0) {
|
|
threshold = del[i-1];
|
|
cost = BIGNUM;
|
|
for (citer = repeated_wire.begin(); citer != repeated_wire.end();
|
|
citer++) {
|
|
if (citer->delay > threshold) {
|
|
citer = repeated_wire.erase(citer);
|
|
citer --;
|
|
} else {
|
|
ncost = citer->power.readOp.dynamic /
|
|
global.power.readOp.dynamic +
|
|
citer->power.readOp.leakage / global.power.readOp.leakage;
|
|
if (ncost < cost) {
|
|
cost = ncost;
|
|
if (i == 4) {
|
|
global_30.delay = citer->delay;
|
|
global_30.power = citer->power;
|
|
global_30.area = citer->area;
|
|
} else if (i == 3) {
|
|
global_20.delay = citer->delay;
|
|
global_20.power = citer->power;
|
|
global_20.area = citer->area;
|
|
} else if (i == 2) {
|
|
global_10.delay = citer->delay;
|
|
global_10.power = citer->power;
|
|
global_10.area = citer->area;
|
|
} else if (i == 1) {
|
|
global_5.delay = citer->delay;
|
|
global_5.power = citer->power;
|
|
global_5.area = citer->area;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
i--;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
powerDef Wire::wire_model (double space, double size, double *delay) {
|
|
powerDef ptemp;
|
|
double len = 1;
|
|
//double min_wire_width = wire_width; //m
|
|
double beta = pmos_to_nmos_sz_ratio();
|
|
// switching energy
|
|
double switching = 0;
|
|
// short-circuit energy
|
|
double short_ckt = 0;
|
|
// time constant
|
|
double tc = 0;
|
|
// input cap of min sized driver
|
|
double input_cap = gate_C (g_tp.min_w_nmos_ +
|
|
min_w_pmos, 0);
|
|
|
|
// output parasitic capacitance of
|
|
// the min. sized driver
|
|
double out_cap = drain_C_(min_w_pmos, PCH, 1, 1, g_tp.cell_h_def) +
|
|
drain_C_(g_tp.min_w_nmos_, NCH, 1, 1, g_tp.cell_h_def);
|
|
// drive resistance
|
|
double out_res = (tr_R_on(g_tp.min_w_nmos_, NCH, 1) +
|
|
tr_R_on(min_w_pmos, PCH, 1)) / 2;
|
|
double wr = wire_res(len); //ohm
|
|
|
|
// wire cap /m
|
|
double wc = wire_cap(len);
|
|
|
|
repeater_spacing = space;
|
|
repeater_size = size;
|
|
|
|
switching = (repeater_size * (input_cap + out_cap) +
|
|
repeater_spacing * (wc / len)) * deviceType->Vdd *
|
|
deviceType->Vdd;
|
|
|
|
tc = out_res * (input_cap + out_cap) +
|
|
out_res * wc / len * repeater_spacing / repeater_size +
|
|
wr / len * repeater_spacing * out_cap * repeater_size +
|
|
0.5 * (wr / len) * (wc / len) * repeater_spacing * repeater_spacing;
|
|
|
|
*delay = 0.693 * tc * len / repeater_spacing;
|
|
|
|
#define Ishort_ckt 65e-6 /* across all tech Ref:Banerjee et al. {IEEE TED} */
|
|
short_ckt = deviceType->Vdd * g_tp.min_w_nmos_ * Ishort_ckt * 1.0986 *
|
|
repeater_size * tc;
|
|
|
|
ptemp.readOp.dynamic = ((len / repeater_spacing) * (switching + short_ckt));
|
|
ptemp.readOp.leakage = ((len / repeater_spacing) *
|
|
deviceType->Vdd *
|
|
cmos_Isub_leakage(g_tp.min_w_nmos_ *
|
|
repeater_size, beta *
|
|
g_tp.min_w_nmos_ *
|
|
repeater_size, 1, inv));
|
|
|
|
ptemp.readOp.gate_leakage = ((len / repeater_spacing) *
|
|
deviceType->Vdd *
|
|
cmos_Ig_leakage(g_tp.min_w_nmos_ *
|
|
repeater_size, beta *
|
|
g_tp.min_w_nmos_ *
|
|
repeater_size, 1, inv));
|
|
|
|
return ptemp;
|
|
}
|
|
|
|
void
|
|
Wire::print_wire() {
|
|
|
|
cout << "\nWire Properties:\n\n";
|
|
cout << " Delay Optimal\n\tRepeater size - " << global.area.h <<
|
|
" \n\tRepeater spacing - " << global.area.w*1e3 << " (mm)"
|
|
" \n\tDelay - " << global.delay*1e6 << " (ns/mm)"
|
|
" \n\tPowerD - " << global.power.readOp.dynamic *1e6 << " (nJ/mm)"
|
|
" \n\tPowerL - " << global.power.readOp.leakage << " (mW/mm)"
|
|
" \n\tPowerLgate - " << global.power.readOp.gate_leakage <<
|
|
" (mW/mm)\n";
|
|
cout << "\tWire width - " << wire_width_init*1e6 << " microns\n";
|
|
cout << "\tWire spacing - " << wire_spacing_init*1e6 << " microns\n";
|
|
cout << endl;
|
|
|
|
cout << " 5% Overhead\n\tRepeater size - " << global_5.area.h <<
|
|
" \n\tRepeater spacing - " << global_5.area.w*1e3 << " (mm)"
|
|
" \n\tDelay - " << global_5.delay *1e6 << " (ns/mm)"
|
|
" \n\tPowerD - " << global_5.power.readOp.dynamic *1e6 << " (nJ/mm)"
|
|
" \n\tPowerL - " << global_5.power.readOp.leakage << " (mW/mm)"
|
|
" \n\tPowerLgate - " << global_5.power.readOp.gate_leakage <<
|
|
" (mW/mm)\n";
|
|
cout << "\tWire width - " << wire_width_init*1e6 << " microns\n";
|
|
cout << "\tWire spacing - " << wire_spacing_init*1e6 << " microns\n";
|
|
cout << endl;
|
|
cout << " 10% Overhead\n\tRepeater size - " << global_10.area.h <<
|
|
" \n\tRepeater spacing - " << global_10.area.w*1e3 << " (mm)"
|
|
" \n\tDelay - " << global_10.delay *1e6 << " (ns/mm)"
|
|
" \n\tPowerD - " << global_10.power.readOp.dynamic *1e6 << " (nJ/mm)"
|
|
" \n\tPowerL - " << global_10.power.readOp.leakage << " (mW/mm)"
|
|
" \n\tPowerLgate - " << global_10.power.readOp.gate_leakage <<
|
|
" (mW/mm)\n";
|
|
cout << "\tWire width - " << wire_width_init*1e6 << " microns\n";
|
|
cout << "\tWire spacing - " << wire_spacing_init*1e6 << " microns\n";
|
|
cout << endl;
|
|
cout << " 20% Overhead\n\tRepeater size - " << global_20.area.h <<
|
|
" \n\tRepeater spacing - " << global_20.area.w*1e3 << " (mm)"
|
|
" \n\tDelay - " << global_20.delay *1e6 << " (ns/mm)"
|
|
" \n\tPowerD - " << global_20.power.readOp.dynamic *1e6 << " (nJ/mm)"
|
|
" \n\tPowerL - " << global_20.power.readOp.leakage << " (mW/mm)"
|
|
" \n\tPowerLgate - " << global_20.power.readOp.gate_leakage <<
|
|
" (mW/mm)\n";
|
|
cout << "\tWire width - " << wire_width_init*1e6 << " microns\n";
|
|
cout << "\tWire spacing - " << wire_spacing_init*1e6 << " microns\n";
|
|
cout << endl;
|
|
cout << " 30% Overhead\n\tRepeater size - " << global_30.area.h <<
|
|
" \n\tRepeater spacing - " << global_30.area.w*1e3 << " (mm)"
|
|
" \n\tDelay - " << global_30.delay *1e6 << " (ns/mm)"
|
|
" \n\tPowerD - " << global_30.power.readOp.dynamic *1e6 << " (nJ/mm)"
|
|
" \n\tPowerL - " << global_30.power.readOp.leakage << " (mW/mm)"
|
|
" \n\tPowerLgate - " << global_30.power.readOp.gate_leakage <<
|
|
" (mW/mm)\n";
|
|
cout << "\tWire width - " << wire_width_init*1e6 << " microns\n";
|
|
cout << "\tWire spacing - " << wire_spacing_init*1e6 << " microns\n";
|
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cout << endl;
|
|
cout << " Low-swing wire (1 mm) - Note: Unlike repeated wires, \n\t" <<
|
|
"delay and power values of low-swing wires do not\n\t" <<
|
|
"have a linear relationship with length." <<
|
|
" \n\tdelay - " << low_swing.delay *1e9 << " (ns)"
|
|
" \n\tpowerD - " << low_swing.power.readOp.dynamic *1e9 << " (nJ)"
|
|
" \n\tPowerL - " << low_swing.power.readOp.leakage << " (mW)"
|
|
" \n\tPowerLgate - " << low_swing.power.readOp.gate_leakage <<
|
|
" (mW)\n";
|
|
cout << "\tWire width - " << wire_width_init * 2 /* differential */ <<
|
|
" microns\n";
|
|
cout << "\tWire spacing - " << wire_spacing_init * 2 /* differential */ <<
|
|
" microns\n";
|
|
cout << endl;
|
|
cout << endl;
|
|
|
|
}
|
|
|