2f5262eb67
Continue along the same line as the recent patch that made the Ruby-related config scripts Python packages and make also the configs/common directory a package. All affected config scripts are updated (hopefully). Note that this change makes it apparent that the current organisation and naming of the config directory and its subdirectories is rather chaotic. We mix scripts that are directly invoked with scripts that merely contain convenience functions. While it is not addressed in this patch we should follow up with a re-organisation of the config structure, and renaming of some of the packages.
120 lines
4.7 KiB
Python
120 lines
4.7 KiB
Python
# Copyright (c) 2015 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Radhika Jagtap
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# Basic elastic traces replay script that configures a Trace CPU
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import optparse
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from m5.util import addToPath, fatal
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addToPath('../')
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from common import Options
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from common import Simulation
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from common import CacheConfig
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from common import MemConfig
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from common.Caches import *
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parser = optparse.OptionParser()
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Options.addCommonOptions(parser)
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if '--ruby' in sys.argv:
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print "This script does not support Ruby configuration, mainly"\
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" because Trace CPU has been tested only with classic memory system"
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sys.exit(1)
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(options, args) = parser.parse_args()
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if args:
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print "Error: script doesn't take any positional arguments"
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sys.exit(1)
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numThreads = 1
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if options.cpu_type != "trace":
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fatal("This is a script for elastic trace replay simulation, use "\
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"--cpu-type=trace\n");
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if options.num_cpus > 1:
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fatal("This script does not support multi-processor trace replay.\n")
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# In this case FutureClass will be None as there is not fast forwarding or
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# switching
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(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
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CPUClass.numThreads = numThreads
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system = System(cpu = CPUClass(cpu_id=0),
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mem_mode = test_mem_mode,
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mem_ranges = [AddrRange(options.mem_size)],
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cache_line_size = options.cacheline_size)
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# Create a top-level voltage domain
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system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
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# Create a source clock for the system. This is used as the clock period for
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# xbar and memory
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system.clk_domain = SrcClockDomain(clock = options.sys_clock,
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voltage_domain = system.voltage_domain)
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# Create a CPU voltage domain
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system.cpu_voltage_domain = VoltageDomain()
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# Create a separate clock domain for the CPUs. In case of Trace CPUs this clock
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# is actually used only by the caches connected to the CPU.
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system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock,
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voltage_domain =
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system.cpu_voltage_domain)
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# All cpus belong to a common cpu_clk_domain, therefore running at a common
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# frequency.
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for cpu in system.cpu:
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cpu.clk_domain = system.cpu_clk_domain
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# Assign input trace files to the Trace CPU
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system.cpu.instTraceFile=options.inst_trace_file
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system.cpu.dataTraceFile=options.data_trace_file
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# Configure the classic memory system options
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MemClass = Simulation.setMemClass(options)
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system.membus = SystemXBar()
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system.system_port = system.membus.slave
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CacheConfig.config_cache(options, system)
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MemConfig.config_mem(options, system)
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root = Root(full_system = False, system = system)
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Simulation.run(options, root, system, FutureClass)
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