================ Begin RubySystem Configuration Print ================ RubySystem config: random_seed: 1234 randomization: 0 cycle_period: 1 block_size_bytes: 64 block_size_bits: 6 memory_size_bytes: 134217728 memory_size_bits: 27 Network Configuration --------------------- network: SIMPLE_NETWORK topology: virtual_net_0: active, unordered virtual_net_1: active, unordered virtual_net_2: active, unordered virtual_net_3: inactive virtual_net_4: inactive virtual_net_5: inactive virtual_net_6: inactive virtual_net_7: inactive virtual_net_8: inactive virtual_net_9: inactive Profiler Configuration ---------------------- periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ Real time: Apr/28/2011 14:49:15 Profiler Stats -------------- Elapsed_time_in_seconds: 0 Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 Virtual_time_in_seconds: 0.43 Virtual_time_in_minutes: 0.00716667 Virtual_time_in_hours: 0.000119444 Virtual_time_in_days: 4.97685e-06 Ruby_current_time: 85418 Ruby_start_time: 0 Ruby_cycles: 85418 mbytes_resident: 38.2812 mbytes_total: 221.418 resident_ratio: 0.172944 ruby_cycles_executed: [ 85419 ] Busy Controller Counts: L2Cache-0:0 L1Cache-0:0 Directory-0:0 Busy Bank Count:0 sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | standard deviation: 0 | 0 3295 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- miss_latency: [binsize: 2 max: 281 count: 3294 average: 24.9314 | standard deviation: 56.0488 | 0 2784 0 0 0 0 0 0 0 67 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 91 84 78 63 5 2 2 1 3 3 0 2 2 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_LD: [binsize: 2 max: 277 count: 415 average: 60.9277 | standard deviation: 78.686 | 0 233 0 0 0 0 0 0 0 40 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 17 41 19 25 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_ST: [binsize: 2 max: 245 count: 294 average: 28.5238 | standard deviation: 59.597 | 0 236 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 3 12 7 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_IFETCH: [binsize: 2 max: 281 count: 2585 average: 18.7439 | standard deviation: 48.5885 | 0 2315 0 0 0 0 0 0 0 27 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 49 57 40 47 31 2 2 2 1 3 2 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_NULL: [binsize: 2 max: 281 count: 3294 average: 24.9314 | standard deviation: 56.0488 | 0 2784 0 0 0 0 0 0 0 67 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 91 84 78 63 5 2 2 1 3 3 0 2 2 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] imcomplete_dir_Times: 0 miss_latency_LD_NULL: [binsize: 2 max: 277 count: 415 average: 60.9277 | standard deviation: 78.686 | 0 233 0 0 0 0 0 0 0 40 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 17 41 19 25 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_ST_NULL: [binsize: 2 max: 245 count: 294 average: 28.5238 | standard deviation: 59.597 | 0 236 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 3 12 7 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] miss_latency_IFETCH_NULL: [binsize: 2 max: 281 count: 2585 average: 18.7439 | standard deviation: 48.5885 | 0 2315 0 0 0 0 0 0 0 27 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 49 57 40 47 31 2 2 2 1 3 2 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Request vs. RubySystem State Profile -------------------------------- filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Message Delayed Cycles ---------------------- Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Resource Usage -------------- page_size: 4096 user_time: 0 system_time: 0 page_reclaims: 11009 page_faults: 0 swaps: 0 block_inputs: 0 block_outputs: 0 Network Stats ------------- total_msg_count_Request_Control: 2799 22392 total_msg_count_Response_Data: 2538 182736 total_msg_count_ResponseL2hit_Data: 261 18792 total_msg_count_Writeback_Data: 1734 124848 total_msg_count_Writeback_Control: 6447 51576 total_msg_count_Unblock_Control: 2798 22384 total_msgs: 16577 total_bytes: 422728 switch_0_inlinks: 2 switch_0_outlinks: 2 links_utilized_percent_switch_0: 5.15524 links_utilized_percent_switch_0_link_0: 6.00225 bw: 16000 base_latency: 1 links_utilized_percent_switch_0_link_1: 4.30823 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Request_Control: 510 4080 [ 510 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Writeback_Data: 502 36144 [ 0 0 502 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Writeback_Control: 909 7272 [ 502 407 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Unblock_Control: 510 4080 [ 0 0 510 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Request_Control: 423 3384 [ 0 423 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 87 6264 [ 0 0 87 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Writeback_Data: 76 5472 [ 0 0 76 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Writeback_Control: 1240 9920 [ 502 407 331 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Unblock_Control: 423 3384 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 links_utilized_percent_switch_1: 3.2581 links_utilized_percent_switch_1_link_0: 2.98064 bw: 16000 base_latency: 1 links_utilized_percent_switch_1_link_1: 3.53555 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 87 6264 [ 0 0 87 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Writeback_Control: 502 4016 [ 502 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Request_Control: 510 4080 [ 510 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Writeback_Data: 502 36144 [ 0 0 502 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Writeback_Control: 502 4016 [ 502 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Unblock_Control: 510 4080 [ 0 0 510 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 links_utilized_percent_switch_2: 1.89685 links_utilized_percent_switch_2_link_0: 1.327 bw: 16000 base_latency: 1 links_utilized_percent_switch_2_link_1: 2.46669 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Request_Control: 423 3384 [ 0 423 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Data: 76 5472 [ 0 0 76 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 738 5904 [ 0 407 331 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Unblock_Control: 422 3376 [ 0 0 422 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Writeback_Control: 407 3256 [ 0 407 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 links_utilized_percent_switch_3: 3.43682 links_utilized_percent_switch_3_link_0: 6.00225 bw: 16000 base_latency: 1 links_utilized_percent_switch_3_link_1: 2.98064 bw: 16000 base_latency: 1 links_utilized_percent_switch_3_link_2: 1.32759 bw: 16000 base_latency: 1 outgoing_messages_switch_3_link_0_Request_Control: 510 4080 [ 510 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Writeback_Data: 502 36144 [ 0 0 502 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Writeback_Control: 909 7272 [ 502 407 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Unblock_Control: 510 4080 [ 0 0 510 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_ResponseL2hit_Data: 87 6264 [ 0 0 87 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Writeback_Control: 502 4016 [ 502 0 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Request_Control: 423 3384 [ 0 423 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Writeback_Data: 76 5472 [ 0 0 76 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Writeback_Control: 738 5904 [ 0 407 331 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Unblock_Control: 423 3384 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1 Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_total_misses: 0 system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 0 system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0 system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0 system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0 Cache Stats: system.l1_cntrl0.L1DcacheMemory system.l1_cntrl0.L1DcacheMemory_total_misses: 0 system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 0 system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0 system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0 system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0 --- L1Cache --- - Event Counts - Load [415 ] 415 Ifetch [2585 ] 2585 Store [294 ] 294 L1_Replacement [506 ] 506 Own_GETX [0 ] 0 Fwd_GETX [0 ] 0 Fwd_GETS [0 ] 0 Fwd_DMA [0 ] 0 Inv [0 ] 0 Ack [0 ] 0 Data [0 ] 0 Exclusive_Data [510 ] 510 Writeback_Ack [0 ] 0 Writeback_Ack_Data [502 ] 502 Writeback_Nack [0 ] 0 All_acks [58 ] 58 Use_Timeout [509 ] 509 - Transitions - I Load [182 ] 182 I Ifetch [270 ] 270 I Store [58 ] 58 I L1_Replacement [0 ] 0 I Inv [0 ] 0 S Load [0 ] 0 S Ifetch [0 ] 0 S Store [0 ] 0 S L1_Replacement [0 ] 0 S Fwd_GETS [0 ] 0 S Fwd_DMA [0 ] 0 S Inv [0 ] 0 O Load [0 ] 0 O Ifetch [0 ] 0 O Store [0 ] 0 O L1_Replacement [0 ] 0 O Fwd_GETX [0 ] 0 O Fwd_GETS [0 ] 0 O Fwd_DMA [0 ] 0 M Load [82 ] 82 M Ifetch [1220 ] 1220 M Store [33 ] 33 M L1_Replacement [406 ] 406 M Fwd_GETX [0 ] 0 M Fwd_GETS [0 ] 0 M Fwd_DMA [0 ] 0 M_W Load [49 ] 49 M_W Ifetch [1095 ] 1095 M_W Store [7 ] 7 M_W L1_Replacement [4 ] 4 M_W Own_GETX [0 ] 0 M_W Fwd_GETX [0 ] 0 M_W Fwd_GETS [0 ] 0 M_W Fwd_DMA [0 ] 0 M_W Inv [0 ] 0 M_W Use_Timeout [444 ] 444 MM Load [99 ] 99 MM Ifetch [0 ] 0 MM Store [114 ] 114 MM L1_Replacement [96 ] 96 MM Fwd_GETX [0 ] 0 MM Fwd_GETS [0 ] 0 MM Fwd_DMA [0 ] 0 MM_W Load [3 ] 3 MM_W Ifetch [0 ] 0 MM_W Store [82 ] 82 MM_W L1_Replacement [0 ] 0 MM_W Own_GETX [0 ] 0 MM_W Fwd_GETX [0 ] 0 MM_W Fwd_GETS [0 ] 0 MM_W Fwd_DMA [0 ] 0 MM_W Inv [0 ] 0 MM_W Use_Timeout [65 ] 65 IM Load [0 ] 0 IM Ifetch [0 ] 0 IM Store [0 ] 0 IM L1_Replacement [0 ] 0 IM Inv [0 ] 0 IM Ack [0 ] 0 IM Data [0 ] 0 IM Exclusive_Data [58 ] 58 SM Load [0 ] 0 SM Ifetch [0 ] 0 SM Store [0 ] 0 SM L1_Replacement [0 ] 0 SM Fwd_GETS [0 ] 0 SM Fwd_DMA [0 ] 0 SM Inv [0 ] 0 SM Ack [0 ] 0 SM Data [0 ] 0 SM Exclusive_Data [0 ] 0 OM Load [0 ] 0 OM Ifetch [0 ] 0 OM Store [0 ] 0 OM L1_Replacement [0 ] 0 OM Own_GETX [0 ] 0 OM Fwd_GETX [0 ] 0 OM Fwd_GETS [0 ] 0 OM Fwd_DMA [0 ] 0 OM Ack [0 ] 0 OM All_acks [58 ] 58 IS Load [0 ] 0 IS Ifetch [0 ] 0 IS Store [0 ] 0 IS L1_Replacement [0 ] 0 IS Inv [0 ] 0 IS Data [0 ] 0 IS Exclusive_Data [452 ] 452 SI Load [0 ] 0 SI Ifetch [0 ] 0 SI Store [0 ] 0 SI L1_Replacement [0 ] 0 SI Fwd_GETS [0 ] 0 SI Fwd_DMA [0 ] 0 SI Inv [0 ] 0 SI Writeback_Ack [0 ] 0 SI Writeback_Ack_Data [0 ] 0 SI Writeback_Nack [0 ] 0 OI Load [0 ] 0 OI Ifetch [0 ] 0 OI Store [0 ] 0 OI L1_Replacement [0 ] 0 OI Fwd_GETX [0 ] 0 OI Fwd_GETS [0 ] 0 OI Fwd_DMA [0 ] 0 OI Writeback_Ack [0 ] 0 OI Writeback_Ack_Data [0 ] 0 OI Writeback_Nack [0 ] 0 MI Load [0 ] 0 MI Ifetch [0 ] 0 MI Store [0 ] 0 MI L1_Replacement [0 ] 0 MI Fwd_GETX [0 ] 0 MI Fwd_GETS [0 ] 0 MI Fwd_DMA [0 ] 0 MI Writeback_Ack [0 ] 0 MI Writeback_Ack_Data [502 ] 502 MI Writeback_Nack [0 ] 0 II Load [0 ] 0 II Ifetch [0 ] 0 II Store [0 ] 0 II L1_Replacement [0 ] 0 II Inv [0 ] 0 II Writeback_Ack [0 ] 0 II Writeback_Ack_Data [0 ] 0 II Writeback_Nack [0 ] 0 Cache Stats: system.l2_cntrl0.L2cacheMemory system.l2_cntrl0.L2cacheMemory_total_misses: 0 system.l2_cntrl0.L2cacheMemory_total_demand_misses: 0 system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 --- L2Cache --- - Event Counts - L1_GETS [454 ] 454 L1_GETX [58 ] 58 L1_PUTO [0 ] 0 L1_PUTX [502 ] 502 L1_PUTS_only [0 ] 0 L1_PUTS [0 ] 0 Fwd_GETX [0 ] 0 Fwd_GETS [0 ] 0 Fwd_DMA [0 ] 0 Own_GETX [0 ] 0 Inv [0 ] 0 IntAck [0 ] 0 ExtAck [0 ] 0 All_Acks [43 ] 43 Data [43 ] 43 Data_Exclusive [380 ] 380 L1_WBCLEANDATA [396 ] 396 L1_WBDIRTYDATA [106 ] 106 Writeback_Ack [407 ] 407 Writeback_Nack [0 ] 0 Unblock [0 ] 0 Exclusive_Unblock [510 ] 510 DmaAck [0 ] 0 L2_Replacement [407 ] 407 - Transitions - NP L1_GETS [380 ] 380 NP L1_GETX [43 ] 43 NP L1_PUTO [0 ] 0 NP L1_PUTX [0 ] 0 NP L1_PUTS [0 ] 0 NP Inv [0 ] 0 I L1_GETS [0 ] 0 I L1_GETX [0 ] 0 I L1_PUTO [0 ] 0 I L1_PUTX [0 ] 0 I L1_PUTS [0 ] 0 I Inv [0 ] 0 I L2_Replacement [0 ] 0 ILS L1_GETS [0 ] 0 ILS L1_GETX [0 ] 0 ILS L1_PUTO [0 ] 0 ILS L1_PUTX [0 ] 0 ILS L1_PUTS_only [0 ] 0 ILS L1_PUTS [0 ] 0 ILS Inv [0 ] 0 ILS L2_Replacement [0 ] 0 ILX L1_GETS [0 ] 0 ILX L1_GETX [0 ] 0 ILX L1_PUTO [0 ] 0 ILX L1_PUTX [502 ] 502 ILX L1_PUTS_only [0 ] 0 ILX L1_PUTS [0 ] 0 ILX Fwd_GETX [0 ] 0 ILX Fwd_GETS [0 ] 0 ILX Fwd_DMA [0 ] 0 ILX Inv [0 ] 0 ILX Data [0 ] 0 ILX L2_Replacement [0 ] 0 ILO L1_GETS [0 ] 0 ILO L1_GETX [0 ] 0 ILO L1_PUTO [0 ] 0 ILO L1_PUTX [0 ] 0 ILO L1_PUTS [0 ] 0 ILO Fwd_GETX [0 ] 0 ILO Fwd_GETS [0 ] 0 ILO Fwd_DMA [0 ] 0 ILO Inv [0 ] 0 ILO Data [0 ] 0 ILO L2_Replacement [0 ] 0 ILOX L1_GETS [0 ] 0 ILOX L1_GETX [0 ] 0 ILOX L1_PUTO [0 ] 0 ILOX L1_PUTX [0 ] 0 ILOX L1_PUTS [0 ] 0 ILOX Fwd_GETX [0 ] 0 ILOX Fwd_GETS [0 ] 0 ILOX Fwd_DMA [0 ] 0 ILOX Data [0 ] 0 ILOS L1_GETS [0 ] 0 ILOS L1_GETX [0 ] 0 ILOS L1_PUTO [0 ] 0 ILOS L1_PUTX [0 ] 0 ILOS L1_PUTS_only [0 ] 0 ILOS L1_PUTS [0 ] 0 ILOS Fwd_GETX [0 ] 0 ILOS Fwd_GETS [0 ] 0 ILOS Fwd_DMA [0 ] 0 ILOS Data [0 ] 0 ILOS L2_Replacement [0 ] 0 ILOSX L1_GETS [0 ] 0 ILOSX L1_GETX [0 ] 0 ILOSX L1_PUTO [0 ] 0 ILOSX L1_PUTX [0 ] 0 ILOSX L1_PUTS_only [0 ] 0 ILOSX L1_PUTS [0 ] 0 ILOSX Fwd_GETX [0 ] 0 ILOSX Fwd_GETS [0 ] 0 ILOSX Fwd_DMA [0 ] 0 ILOSX Data [0 ] 0 S L1_GETS [0 ] 0 S L1_GETX [0 ] 0 S L1_PUTX [0 ] 0 S L1_PUTS [0 ] 0 S Inv [0 ] 0 S L2_Replacement [0 ] 0 O L1_GETS [0 ] 0 O L1_GETX [0 ] 0 O L1_PUTX [0 ] 0 O Fwd_GETX [0 ] 0 O Fwd_GETS [0 ] 0 O Fwd_DMA [0 ] 0 O L2_Replacement [0 ] 0 OLS L1_GETS [0 ] 0 OLS L1_GETX [0 ] 0 OLS L1_PUTX [0 ] 0 OLS L1_PUTS_only [0 ] 0 OLS L1_PUTS [0 ] 0 OLS Fwd_GETX [0 ] 0 OLS Fwd_GETS [0 ] 0 OLS Fwd_DMA [0 ] 0 OLS L2_Replacement [0 ] 0 OLSX L1_GETS [0 ] 0 OLSX L1_GETX [0 ] 0 OLSX L1_PUTO [0 ] 0 OLSX L1_PUTX [0 ] 0 OLSX L1_PUTS_only [0 ] 0 OLSX L1_PUTS [0 ] 0 OLSX Fwd_GETX [0 ] 0 OLSX Fwd_GETS [0 ] 0 OLSX Fwd_DMA [0 ] 0 OLSX L2_Replacement [0 ] 0 SLS L1_GETS [0 ] 0 SLS L1_GETX [0 ] 0 SLS L1_PUTX [0 ] 0 SLS L1_PUTS_only [0 ] 0 SLS L1_PUTS [0 ] 0 SLS Inv [0 ] 0 SLS L2_Replacement [0 ] 0 M L1_GETS [72 ] 72 M L1_GETX [15 ] 15 M L1_PUTO [0 ] 0 M L1_PUTX [0 ] 0 M L1_PUTS [0 ] 0 M Fwd_GETX [0 ] 0 M Fwd_GETS [0 ] 0 M Fwd_DMA [0 ] 0 M L2_Replacement [407 ] 407 IFGX L1_GETS [0 ] 0 IFGX L1_GETX [0 ] 0 IFGX L1_PUTO [0 ] 0 IFGX L1_PUTX [0 ] 0 IFGX L1_PUTS_only [0 ] 0 IFGX L1_PUTS [0 ] 0 IFGX Fwd_GETX [0 ] 0 IFGX Fwd_GETS [0 ] 0 IFGX Fwd_DMA [0 ] 0 IFGX Inv [0 ] 0 IFGX Data [0 ] 0 IFGX Data_Exclusive [0 ] 0 IFGX L2_Replacement [0 ] 0 IFGS L1_GETS [0 ] 0 IFGS L1_GETX [0 ] 0 IFGS L1_PUTO [0 ] 0 IFGS L1_PUTX [0 ] 0 IFGS L1_PUTS_only [0 ] 0 IFGS L1_PUTS [0 ] 0 IFGS Fwd_GETX [0 ] 0 IFGS Fwd_GETS [0 ] 0 IFGS Fwd_DMA [0 ] 0 IFGS Inv [0 ] 0 IFGS Data [0 ] 0 IFGS Data_Exclusive [0 ] 0 IFGS L2_Replacement [0 ] 0 ISFGS L1_GETS [0 ] 0 ISFGS L1_GETX [0 ] 0 ISFGS L1_PUTO [0 ] 0 ISFGS L1_PUTX [0 ] 0 ISFGS L1_PUTS_only [0 ] 0 ISFGS L1_PUTS [0 ] 0 ISFGS Fwd_GETX [0 ] 0 ISFGS Fwd_GETS [0 ] 0 ISFGS Fwd_DMA [0 ] 0 ISFGS Inv [0 ] 0 ISFGS Data [0 ] 0 ISFGS L2_Replacement [0 ] 0 IFGXX L1_GETS [0 ] 0 IFGXX L1_GETX [0 ] 0 IFGXX L1_PUTO [0 ] 0 IFGXX L1_PUTX [0 ] 0 IFGXX L1_PUTS_only [0 ] 0 IFGXX L1_PUTS [0 ] 0 IFGXX Fwd_GETX [0 ] 0 IFGXX Fwd_GETS [0 ] 0 IFGXX Fwd_DMA [0 ] 0 IFGXX Inv [0 ] 0 IFGXX IntAck [0 ] 0 IFGXX All_Acks [0 ] 0 IFGXX Data_Exclusive [0 ] 0 IFGXX L2_Replacement [0 ] 0 OFGX L1_GETS [0 ] 0 OFGX L1_GETX [0 ] 0 OFGX L1_PUTO [0 ] 0 OFGX L1_PUTX [0 ] 0 OFGX L1_PUTS_only [0 ] 0 OFGX L1_PUTS [0 ] 0 OFGX Fwd_GETX [0 ] 0 OFGX Fwd_GETS [0 ] 0 OFGX Fwd_DMA [0 ] 0 OFGX Inv [0 ] 0 OFGX L2_Replacement [0 ] 0 OLSF L1_GETS [0 ] 0 OLSF L1_GETX [0 ] 0 OLSF L1_PUTO [0 ] 0 OLSF L1_PUTX [0 ] 0 OLSF L1_PUTS_only [0 ] 0 OLSF L1_PUTS [0 ] 0 OLSF Fwd_GETX [0 ] 0 OLSF Fwd_GETS [0 ] 0 OLSF Fwd_DMA [0 ] 0 OLSF Inv [0 ] 0 OLSF IntAck [0 ] 0 OLSF All_Acks [0 ] 0 OLSF L2_Replacement [0 ] 0 ILOW L1_GETS [0 ] 0 ILOW L1_GETX [0 ] 0 ILOW L1_PUTO [0 ] 0 ILOW L1_PUTX [0 ] 0 ILOW L1_PUTS_only [0 ] 0 ILOW L1_PUTS [0 ] 0 ILOW Fwd_GETX [0 ] 0 ILOW Fwd_GETS [0 ] 0 ILOW Fwd_DMA [0 ] 0 ILOW Inv [0 ] 0 ILOW L1_WBCLEANDATA [0 ] 0 ILOW L1_WBDIRTYDATA [0 ] 0 ILOW Unblock [0 ] 0 ILOW L2_Replacement [0 ] 0 ILOXW L1_GETS [0 ] 0 ILOXW L1_GETX [0 ] 0 ILOXW L1_PUTO [0 ] 0 ILOXW L1_PUTX [0 ] 0 ILOXW L1_PUTS_only [0 ] 0 ILOXW L1_PUTS [0 ] 0 ILOXW Fwd_GETX [0 ] 0 ILOXW Fwd_GETS [0 ] 0 ILOXW Fwd_DMA [0 ] 0 ILOXW Inv [0 ] 0 ILOXW L1_WBCLEANDATA [0 ] 0 ILOXW L1_WBDIRTYDATA [0 ] 0 ILOXW Unblock [0 ] 0 ILOXW L2_Replacement [0 ] 0 ILOSW L1_GETS [0 ] 0 ILOSW L1_GETX [0 ] 0 ILOSW L1_PUTO [0 ] 0 ILOSW L1_PUTX [0 ] 0 ILOSW L1_PUTS_only [0 ] 0 ILOSW L1_PUTS [0 ] 0 ILOSW Fwd_GETX [0 ] 0 ILOSW Fwd_GETS [0 ] 0 ILOSW Fwd_DMA [0 ] 0 ILOSW Inv [0 ] 0 ILOSW L1_WBCLEANDATA [0 ] 0 ILOSW L1_WBDIRTYDATA [0 ] 0 ILOSW Unblock [0 ] 0 ILOSW L2_Replacement [0 ] 0 ILOSXW L1_GETS [0 ] 0 ILOSXW L1_GETX [0 ] 0 ILOSXW L1_PUTO [0 ] 0 ILOSXW L1_PUTX [0 ] 0 ILOSXW L1_PUTS_only [0 ] 0 ILOSXW L1_PUTS [0 ] 0 ILOSXW Fwd_GETX [0 ] 0 ILOSXW Fwd_GETS [0 ] 0 ILOSXW Fwd_DMA [0 ] 0 ILOSXW Inv [0 ] 0 ILOSXW L1_WBCLEANDATA [0 ] 0 ILOSXW L1_WBDIRTYDATA [0 ] 0 ILOSXW Unblock [0 ] 0 ILOSXW L2_Replacement [0 ] 0 SLSW L1_GETS [0 ] 0 SLSW L1_GETX [0 ] 0 SLSW L1_PUTO [0 ] 0 SLSW L1_PUTX [0 ] 0 SLSW L1_PUTS_only [0 ] 0 SLSW L1_PUTS [0 ] 0 SLSW Fwd_GETX [0 ] 0 SLSW Fwd_GETS [0 ] 0 SLSW Fwd_DMA [0 ] 0 SLSW Inv [0 ] 0 SLSW Unblock [0 ] 0 SLSW L2_Replacement [0 ] 0 OLSW L1_GETS [0 ] 0 OLSW L1_GETX [0 ] 0 OLSW L1_PUTO [0 ] 0 OLSW L1_PUTX [0 ] 0 OLSW L1_PUTS_only [0 ] 0 OLSW L1_PUTS [0 ] 0 OLSW Fwd_GETX [0 ] 0 OLSW Fwd_GETS [0 ] 0 OLSW Fwd_DMA [0 ] 0 OLSW Inv [0 ] 0 OLSW Unblock [0 ] 0 OLSW L2_Replacement [0 ] 0 ILSW L1_GETS [0 ] 0 ILSW L1_GETX [0 ] 0 ILSW L1_PUTO [0 ] 0 ILSW L1_PUTX [0 ] 0 ILSW L1_PUTS_only [0 ] 0 ILSW L1_PUTS [0 ] 0 ILSW Fwd_GETX [0 ] 0 ILSW Fwd_GETS [0 ] 0 ILSW Fwd_DMA [0 ] 0 ILSW Inv [0 ] 0 ILSW L1_WBCLEANDATA [0 ] 0 ILSW Unblock [0 ] 0 ILSW L2_Replacement [0 ] 0 IW L1_GETS [0 ] 0 IW L1_GETX [0 ] 0 IW L1_PUTO [0 ] 0 IW L1_PUTX [0 ] 0 IW L1_PUTS_only [0 ] 0 IW L1_PUTS [0 ] 0 IW Fwd_GETX [0 ] 0 IW Fwd_GETS [0 ] 0 IW Fwd_DMA [0 ] 0 IW Inv [0 ] 0 IW L1_WBCLEANDATA [0 ] 0 IW L2_Replacement [0 ] 0 OW L1_GETS [0 ] 0 OW L1_GETX [0 ] 0 OW L1_PUTO [0 ] 0 OW L1_PUTX [0 ] 0 OW L1_PUTS_only [0 ] 0 OW L1_PUTS [0 ] 0 OW Fwd_GETX [0 ] 0 OW Fwd_GETS [0 ] 0 OW Fwd_DMA [0 ] 0 OW Inv [0 ] 0 OW Unblock [0 ] 0 OW L2_Replacement [0 ] 0 SW L1_GETS [0 ] 0 SW L1_GETX [0 ] 0 SW L1_PUTO [0 ] 0 SW L1_PUTX [0 ] 0 SW L1_PUTS_only [0 ] 0 SW L1_PUTS [0 ] 0 SW Fwd_GETX [0 ] 0 SW Fwd_GETS [0 ] 0 SW Fwd_DMA [0 ] 0 SW Inv [0 ] 0 SW Unblock [0 ] 0 SW L2_Replacement [0 ] 0 OXW L1_GETS [0 ] 0 OXW L1_GETX [0 ] 0 OXW L1_PUTO [0 ] 0 OXW L1_PUTX [0 ] 0 OXW L1_PUTS_only [0 ] 0 OXW L1_PUTS [0 ] 0 OXW Fwd_GETX [0 ] 0 OXW Fwd_GETS [0 ] 0 OXW Fwd_DMA [0 ] 0 OXW Inv [0 ] 0 OXW Unblock [0 ] 0 OXW L2_Replacement [0 ] 0 OLSXW L1_GETS [0 ] 0 OLSXW L1_GETX [0 ] 0 OLSXW L1_PUTO [0 ] 0 OLSXW L1_PUTX [0 ] 0 OLSXW L1_PUTS_only [0 ] 0 OLSXW L1_PUTS [0 ] 0 OLSXW Fwd_GETX [0 ] 0 OLSXW Fwd_GETS [0 ] 0 OLSXW Fwd_DMA [0 ] 0 OLSXW Inv [0 ] 0 OLSXW Unblock [0 ] 0 OLSXW L2_Replacement [0 ] 0 ILXW L1_GETS [0 ] 0 ILXW L1_GETX [0 ] 0 ILXW L1_PUTO [0 ] 0 ILXW L1_PUTX [0 ] 0 ILXW L1_PUTS_only [0 ] 0 ILXW L1_PUTS [0 ] 0 ILXW Fwd_GETX [0 ] 0 ILXW Fwd_GETS [0 ] 0 ILXW Fwd_DMA [0 ] 0 ILXW Inv [0 ] 0 ILXW Data [0 ] 0 ILXW L1_WBCLEANDATA [396 ] 396 ILXW L1_WBDIRTYDATA [106 ] 106 ILXW Unblock [0 ] 0 ILXW L2_Replacement [0 ] 0 IFLS L1_GETS [0 ] 0 IFLS L1_GETX [0 ] 0 IFLS L1_PUTO [0 ] 0 IFLS L1_PUTX [0 ] 0 IFLS L1_PUTS_only [0 ] 0 IFLS L1_PUTS [0 ] 0 IFLS Fwd_GETX [0 ] 0 IFLS Fwd_GETS [0 ] 0 IFLS Fwd_DMA [0 ] 0 IFLS Inv [0 ] 0 IFLS Unblock [0 ] 0 IFLS L2_Replacement [0 ] 0 IFLO L1_GETS [0 ] 0 IFLO L1_GETX [0 ] 0 IFLO L1_PUTO [0 ] 0 IFLO L1_PUTX [0 ] 0 IFLO L1_PUTS_only [0 ] 0 IFLO L1_PUTS [0 ] 0 IFLO Fwd_GETX [0 ] 0 IFLO Fwd_GETS [0 ] 0 IFLO Fwd_DMA [0 ] 0 IFLO Inv [0 ] 0 IFLO Unblock [0 ] 0 IFLO L2_Replacement [0 ] 0 IFLOX L1_GETS [0 ] 0 IFLOX L1_GETX [0 ] 0 IFLOX L1_PUTO [0 ] 0 IFLOX L1_PUTX [0 ] 0 IFLOX L1_PUTS_only [0 ] 0 IFLOX L1_PUTS [0 ] 0 IFLOX Fwd_GETX [0 ] 0 IFLOX Fwd_GETS [0 ] 0 IFLOX Fwd_DMA [0 ] 0 IFLOX Inv [0 ] 0 IFLOX Unblock [0 ] 0 IFLOX Exclusive_Unblock [0 ] 0 IFLOX L2_Replacement [0 ] 0 IFLOXX L1_GETS [0 ] 0 IFLOXX L1_GETX [0 ] 0 IFLOXX L1_PUTO [0 ] 0 IFLOXX L1_PUTX [0 ] 0 IFLOXX L1_PUTS_only [0 ] 0 IFLOXX L1_PUTS [0 ] 0 IFLOXX Fwd_GETX [0 ] 0 IFLOXX Fwd_GETS [0 ] 0 IFLOXX Fwd_DMA [0 ] 0 IFLOXX Inv [0 ] 0 IFLOXX Unblock [0 ] 0 IFLOXX Exclusive_Unblock [0 ] 0 IFLOXX L2_Replacement [0 ] 0 IFLOSX L1_GETS [0 ] 0 IFLOSX L1_GETX [0 ] 0 IFLOSX L1_PUTO [0 ] 0 IFLOSX L1_PUTX [0 ] 0 IFLOSX L1_PUTS_only [0 ] 0 IFLOSX L1_PUTS [0 ] 0 IFLOSX Fwd_GETX [0 ] 0 IFLOSX Fwd_GETS [0 ] 0 IFLOSX Fwd_DMA [0 ] 0 IFLOSX Inv [0 ] 0 IFLOSX Unblock [0 ] 0 IFLOSX Exclusive_Unblock [0 ] 0 IFLOSX L2_Replacement [0 ] 0 IFLXO L1_GETS [0 ] 0 IFLXO L1_GETX [0 ] 0 IFLXO L1_PUTO [0 ] 0 IFLXO L1_PUTX [0 ] 0 IFLXO L1_PUTS_only [0 ] 0 IFLXO L1_PUTS [0 ] 0 IFLXO Fwd_GETX [0 ] 0 IFLXO Fwd_GETS [0 ] 0 IFLXO Fwd_DMA [0 ] 0 IFLXO Inv [0 ] 0 IFLXO Exclusive_Unblock [0 ] 0 IFLXO L2_Replacement [0 ] 0 IGS L1_GETS [0 ] 0 IGS L1_GETX [0 ] 0 IGS L1_PUTO [0 ] 0 IGS L1_PUTX [0 ] 0 IGS L1_PUTS_only [0 ] 0 IGS L1_PUTS [0 ] 0 IGS Fwd_GETX [0 ] 0 IGS Fwd_GETS [0 ] 0 IGS Fwd_DMA [0 ] 0 IGS Own_GETX [0 ] 0 IGS Inv [0 ] 0 IGS Data [0 ] 0 IGS Data_Exclusive [380 ] 380 IGS Unblock [0 ] 0 IGS Exclusive_Unblock [380 ] 380 IGS L2_Replacement [0 ] 0 IGM L1_GETS [0 ] 0 IGM L1_GETX [0 ] 0 IGM L1_PUTO [0 ] 0 IGM L1_PUTX [0 ] 0 IGM L1_PUTS_only [0 ] 0 IGM L1_PUTS [0 ] 0 IGM Fwd_GETX [0 ] 0 IGM Fwd_GETS [0 ] 0 IGM Fwd_DMA [0 ] 0 IGM Own_GETX [0 ] 0 IGM Inv [0 ] 0 IGM ExtAck [0 ] 0 IGM Data [43 ] 43 IGM Data_Exclusive [0 ] 0 IGM L2_Replacement [0 ] 0 IGMLS L1_GETS [0 ] 0 IGMLS L1_GETX [0 ] 0 IGMLS L1_PUTO [0 ] 0 IGMLS L1_PUTX [0 ] 0 IGMLS L1_PUTS_only [0 ] 0 IGMLS L1_PUTS [0 ] 0 IGMLS Inv [0 ] 0 IGMLS IntAck [0 ] 0 IGMLS ExtAck [0 ] 0 IGMLS All_Acks [0 ] 0 IGMLS Data [0 ] 0 IGMLS Data_Exclusive [0 ] 0 IGMLS L2_Replacement [0 ] 0 IGMO L1_GETS [0 ] 0 IGMO L1_GETX [0 ] 0 IGMO L1_PUTO [0 ] 0 IGMO L1_PUTX [0 ] 0 IGMO L1_PUTS_only [0 ] 0 IGMO L1_PUTS [0 ] 0 IGMO Fwd_GETX [0 ] 0 IGMO Fwd_GETS [0 ] 0 IGMO Fwd_DMA [0 ] 0 IGMO Own_GETX [0 ] 0 IGMO ExtAck [0 ] 0 IGMO All_Acks [43 ] 43 IGMO Exclusive_Unblock [43 ] 43 IGMO L2_Replacement [0 ] 0 IGMIO L1_GETS [0 ] 0 IGMIO L1_GETX [0 ] 0 IGMIO L1_PUTO [0 ] 0 IGMIO L1_PUTX [0 ] 0 IGMIO L1_PUTS_only [0 ] 0 IGMIO L1_PUTS [0 ] 0 IGMIO Fwd_GETX [0 ] 0 IGMIO Fwd_GETS [0 ] 0 IGMIO Fwd_DMA [0 ] 0 IGMIO Own_GETX [0 ] 0 IGMIO ExtAck [0 ] 0 IGMIO All_Acks [0 ] 0 OGMIO L1_GETS [0 ] 0 OGMIO L1_GETX [0 ] 0 OGMIO L1_PUTO [0 ] 0 OGMIO L1_PUTX [0 ] 0 OGMIO L1_PUTS_only [0 ] 0 OGMIO L1_PUTS [0 ] 0 OGMIO Fwd_GETX [0 ] 0 OGMIO Fwd_GETS [0 ] 0 OGMIO Fwd_DMA [0 ] 0 OGMIO Own_GETX [0 ] 0 OGMIO ExtAck [0 ] 0 OGMIO All_Acks [0 ] 0 IGMIOF L1_GETS [0 ] 0 IGMIOF L1_GETX [0 ] 0 IGMIOF L1_PUTO [0 ] 0 IGMIOF L1_PUTX [0 ] 0 IGMIOF L1_PUTS_only [0 ] 0 IGMIOF L1_PUTS [0 ] 0 IGMIOF IntAck [0 ] 0 IGMIOF All_Acks [0 ] 0 IGMIOF Data_Exclusive [0 ] 0 IGMIOFS L1_GETS [0 ] 0 IGMIOFS L1_GETX [0 ] 0 IGMIOFS L1_PUTO [0 ] 0 IGMIOFS L1_PUTX [0 ] 0 IGMIOFS L1_PUTS_only [0 ] 0 IGMIOFS L1_PUTS [0 ] 0 IGMIOFS Fwd_GETX [0 ] 0 IGMIOFS Fwd_GETS [0 ] 0 IGMIOFS Fwd_DMA [0 ] 0 IGMIOFS Inv [0 ] 0 IGMIOFS Data [0 ] 0 IGMIOFS L2_Replacement [0 ] 0 OGMIOF L1_GETS [0 ] 0 OGMIOF L1_GETX [0 ] 0 OGMIOF L1_PUTO [0 ] 0 OGMIOF L1_PUTX [0 ] 0 OGMIOF L1_PUTS_only [0 ] 0 OGMIOF L1_PUTS [0 ] 0 OGMIOF IntAck [0 ] 0 OGMIOF All_Acks [0 ] 0 II L1_GETS [0 ] 0 II L1_GETX [0 ] 0 II L1_PUTO [0 ] 0 II L1_PUTX [0 ] 0 II L1_PUTS_only [0 ] 0 II L1_PUTS [0 ] 0 II IntAck [0 ] 0 II All_Acks [0 ] 0 MM L1_GETS [0 ] 0 MM L1_GETX [0 ] 0 MM L1_PUTO [0 ] 0 MM L1_PUTX [0 ] 0 MM L1_PUTS_only [0 ] 0 MM L1_PUTS [0 ] 0 MM Fwd_GETX [0 ] 0 MM Fwd_GETS [0 ] 0 MM Fwd_DMA [0 ] 0 MM Inv [0 ] 0 MM Exclusive_Unblock [15 ] 15 MM L2_Replacement [0 ] 0 SS L1_GETS [0 ] 0 SS L1_GETX [0 ] 0 SS L1_PUTO [0 ] 0 SS L1_PUTX [0 ] 0 SS L1_PUTS_only [0 ] 0 SS L1_PUTS [0 ] 0 SS Fwd_GETX [0 ] 0 SS Fwd_GETS [0 ] 0 SS Fwd_DMA [0 ] 0 SS Inv [0 ] 0 SS Unblock [0 ] 0 SS L2_Replacement [0 ] 0 OO L1_GETS [0 ] 0 OO L1_GETX [0 ] 0 OO L1_PUTO [0 ] 0 OO L1_PUTX [0 ] 0 OO L1_PUTS_only [0 ] 0 OO L1_PUTS [0 ] 0 OO Fwd_GETX [0 ] 0 OO Fwd_GETS [0 ] 0 OO Fwd_DMA [0 ] 0 OO Inv [0 ] 0 OO Unblock [0 ] 0 OO Exclusive_Unblock [72 ] 72 OO L2_Replacement [0 ] 0 OLSS L1_GETS [0 ] 0 OLSS L1_GETX [0 ] 0 OLSS L1_PUTO [0 ] 0 OLSS L1_PUTX [0 ] 0 OLSS L1_PUTS_only [0 ] 0 OLSS L1_PUTS [0 ] 0 OLSS Fwd_GETX [0 ] 0 OLSS Fwd_GETS [0 ] 0 OLSS Fwd_DMA [0 ] 0 OLSS Inv [0 ] 0 OLSS Unblock [0 ] 0 OLSS L2_Replacement [0 ] 0 OLSXS L1_GETS [0 ] 0 OLSXS L1_GETX [0 ] 0 OLSXS L1_PUTO [0 ] 0 OLSXS L1_PUTX [0 ] 0 OLSXS L1_PUTS_only [0 ] 0 OLSXS L1_PUTS [0 ] 0 OLSXS Fwd_GETX [0 ] 0 OLSXS Fwd_GETS [0 ] 0 OLSXS Fwd_DMA [0 ] 0 OLSXS Inv [0 ] 0 OLSXS Unblock [0 ] 0 OLSXS L2_Replacement [0 ] 0 SLSS L1_GETS [0 ] 0 SLSS L1_GETX [0 ] 0 SLSS L1_PUTO [0 ] 0 SLSS L1_PUTX [0 ] 0 SLSS L1_PUTS_only [0 ] 0 SLSS L1_PUTS [0 ] 0 SLSS Fwd_GETX [0 ] 0 SLSS Fwd_GETS [0 ] 0 SLSS Fwd_DMA [0 ] 0 SLSS Inv [0 ] 0 SLSS Unblock [0 ] 0 SLSS L2_Replacement [0 ] 0 OI L1_GETS [0 ] 0 OI L1_GETX [0 ] 0 OI L1_PUTO [0 ] 0 OI L1_PUTX [0 ] 0 OI L1_PUTS_only [0 ] 0 OI L1_PUTS [0 ] 0 OI Fwd_GETX [0 ] 0 OI Fwd_GETS [0 ] 0 OI Fwd_DMA [0 ] 0 OI Writeback_Ack [0 ] 0 OI Writeback_Nack [0 ] 0 OI L2_Replacement [0 ] 0 MI L1_GETS [2 ] 2 MI L1_GETX [0 ] 0 MI L1_PUTO [0 ] 0 MI L1_PUTX [0 ] 0 MI L1_PUTS_only [0 ] 0 MI L1_PUTS [0 ] 0 MI Fwd_GETX [0 ] 0 MI Fwd_GETS [0 ] 0 MI Fwd_DMA [0 ] 0 MI Writeback_Ack [407 ] 407 MI L2_Replacement [0 ] 0 MII L1_GETS [0 ] 0 MII L1_GETX [0 ] 0 MII L1_PUTO [0 ] 0 MII L1_PUTX [0 ] 0 MII L1_PUTS_only [0 ] 0 MII L1_PUTS [0 ] 0 MII Writeback_Ack [0 ] 0 MII Writeback_Nack [0 ] 0 MII L2_Replacement [0 ] 0 OLSI L1_GETS [0 ] 0 OLSI L1_GETX [0 ] 0 OLSI L1_PUTO [0 ] 0 OLSI L1_PUTX [0 ] 0 OLSI L1_PUTS_only [0 ] 0 OLSI L1_PUTS [0 ] 0 OLSI Fwd_GETX [0 ] 0 OLSI Fwd_GETS [0 ] 0 OLSI Fwd_DMA [0 ] 0 OLSI Writeback_Ack [0 ] 0 OLSI L2_Replacement [0 ] 0 ILSI L1_GETS [0 ] 0 ILSI L1_GETX [0 ] 0 ILSI L1_PUTO [0 ] 0 ILSI L1_PUTX [0 ] 0 ILSI L1_PUTS_only [0 ] 0 ILSI L1_PUTS [0 ] 0 ILSI IntAck [0 ] 0 ILSI All_Acks [0 ] 0 ILSI Writeback_Ack [0 ] 0 ILSI L2_Replacement [0 ] 0 ILOSD L1_GETS [0 ] 0 ILOSD L1_GETX [0 ] 0 ILOSD L1_PUTO [0 ] 0 ILOSD L1_PUTX [0 ] 0 ILOSD L1_PUTS_only [0 ] 0 ILOSD L1_PUTS [0 ] 0 ILOSD Fwd_GETX [0 ] 0 ILOSD Fwd_GETS [0 ] 0 ILOSD Fwd_DMA [0 ] 0 ILOSD Own_GETX [0 ] 0 ILOSD Inv [0 ] 0 ILOSD DmaAck [0 ] 0 ILOSD L2_Replacement [0 ] 0 ILOSXD L1_GETS [0 ] 0 ILOSXD L1_GETX [0 ] 0 ILOSXD L1_PUTO [0 ] 0 ILOSXD L1_PUTX [0 ] 0 ILOSXD L1_PUTS_only [0 ] 0 ILOSXD L1_PUTS [0 ] 0 ILOSXD Fwd_GETX [0 ] 0 ILOSXD Fwd_GETS [0 ] 0 ILOSXD Fwd_DMA [0 ] 0 ILOSXD Own_GETX [0 ] 0 ILOSXD Inv [0 ] 0 ILOSXD DmaAck [0 ] 0 ILOSXD L2_Replacement [0 ] 0 ILOD L1_GETS [0 ] 0 ILOD L1_GETX [0 ] 0 ILOD L1_PUTO [0 ] 0 ILOD L1_PUTX [0 ] 0 ILOD L1_PUTS_only [0 ] 0 ILOD L1_PUTS [0 ] 0 ILOD Fwd_GETX [0 ] 0 ILOD Fwd_GETS [0 ] 0 ILOD Fwd_DMA [0 ] 0 ILOD Own_GETX [0 ] 0 ILOD Inv [0 ] 0 ILOD DmaAck [0 ] 0 ILOD L2_Replacement [0 ] 0 ILXD L1_GETS [0 ] 0 ILXD L1_GETX [0 ] 0 ILXD L1_PUTO [0 ] 0 ILXD L1_PUTX [0 ] 0 ILXD L1_PUTS_only [0 ] 0 ILXD L1_PUTS [0 ] 0 ILXD Fwd_GETX [0 ] 0 ILXD Fwd_GETS [0 ] 0 ILXD Fwd_DMA [0 ] 0 ILXD Own_GETX [0 ] 0 ILXD Inv [0 ] 0 ILXD DmaAck [0 ] 0 ILXD L2_Replacement [0 ] 0 ILOXD L1_GETS [0 ] 0 ILOXD L1_GETX [0 ] 0 ILOXD L1_PUTO [0 ] 0 ILOXD L1_PUTX [0 ] 0 ILOXD L1_PUTS_only [0 ] 0 ILOXD L1_PUTS [0 ] 0 ILOXD Fwd_GETX [0 ] 0 ILOXD Fwd_GETS [0 ] 0 ILOXD Fwd_DMA [0 ] 0 ILOXD Own_GETX [0 ] 0 ILOXD Inv [0 ] 0 ILOXD DmaAck [0 ] 0 ILOXD L2_Replacement [0 ] 0 Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 499 memory_reads: 423 memory_writes: 76 memory_refreshes: 178 memory_total_request_delays: 116 memory_delays_per_request: 0.232465 memory_delays_in_input_queue: 2 memory_delays_behind_head_of_bank_queue: 0 memory_delays_stalled_at_head_of_bank_queue: 114 memory_stalls_for_bank_busy: 56 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 memory_stalls_for_arbitration: 10 memory_stalls_for_bus: 25 memory_stalls_for_tfaw: 0 memory_stalls_for_read_write_turnaround: 23 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 18 10 0 34 20 19 28 21 5 3 6 4 21 40 20 3 4 5 7 13 10 16 14 41 15 5 5 12 12 18 14 56 --- Directory --- - Event Counts - GETX [43 ] 43 GETS [380 ] 380 PUTX [407 ] 407 PUTO [0 ] 0 PUTO_SHARERS [0 ] 0 Unblock [0 ] 0 Last_Unblock [0 ] 0 Exclusive_Unblock [422 ] 422 Clean_Writeback [331 ] 331 Dirty_Writeback [76 ] 76 Memory_Data [423 ] 423 Memory_Ack [76 ] 76 DMA_READ [0 ] 0 DMA_WRITE [0 ] 0 DMA_ACK [0 ] 0 Data [0 ] 0 - Transitions - I GETX [43 ] 43 I GETS [380 ] 380 I PUTX [0 ] 0 I PUTO [0 ] 0 I Memory_Data [0 ] 0 I Memory_Ack [74 ] 74 I DMA_READ [0 ] 0 I DMA_WRITE [0 ] 0 S GETX [0 ] 0 S GETS [0 ] 0 S PUTX [0 ] 0 S PUTO [0 ] 0 S Memory_Data [0 ] 0 S Memory_Ack [0 ] 0 S DMA_READ [0 ] 0 S DMA_WRITE [0 ] 0 O GETX [0 ] 0 O GETS [0 ] 0 O PUTX [0 ] 0 O PUTO [0 ] 0 O PUTO_SHARERS [0 ] 0 O Memory_Data [0 ] 0 O Memory_Ack [0 ] 0 O DMA_READ [0 ] 0 O DMA_WRITE [0 ] 0 M GETX [0 ] 0 M GETS [0 ] 0 M PUTX [407 ] 407 M PUTO [0 ] 0 M PUTO_SHARERS [0 ] 0 M Memory_Data [0 ] 0 M Memory_Ack [0 ] 0 M DMA_READ [0 ] 0 M DMA_WRITE [0 ] 0 IS GETX [0 ] 0 IS GETS [0 ] 0 IS PUTX [0 ] 0 IS PUTO [0 ] 0 IS PUTO_SHARERS [0 ] 0 IS Unblock [0 ] 0 IS Exclusive_Unblock [379 ] 379 IS Memory_Data [380 ] 380 IS Memory_Ack [2 ] 2 IS DMA_READ [0 ] 0 IS DMA_WRITE [0 ] 0 SS GETX [0 ] 0 SS GETS [0 ] 0 SS PUTX [0 ] 0 SS PUTO [0 ] 0 SS PUTO_SHARERS [0 ] 0 SS Unblock [0 ] 0 SS Last_Unblock [0 ] 0 SS Memory_Data [0 ] 0 SS Memory_Ack [0 ] 0 SS DMA_READ [0 ] 0 SS DMA_WRITE [0 ] 0 OO GETX [0 ] 0 OO GETS [0 ] 0 OO PUTX [0 ] 0 OO PUTO [0 ] 0 OO PUTO_SHARERS [0 ] 0 OO Unblock [0 ] 0 OO Last_Unblock [0 ] 0 OO Memory_Data [0 ] 0 OO Memory_Ack [0 ] 0 OO DMA_READ [0 ] 0 OO DMA_WRITE [0 ] 0 MO GETX [0 ] 0 MO GETS [0 ] 0 MO PUTX [0 ] 0 MO PUTO [0 ] 0 MO PUTO_SHARERS [0 ] 0 MO Unblock [0 ] 0 MO Exclusive_Unblock [0 ] 0 MO Memory_Data [0 ] 0 MO Memory_Ack [0 ] 0 MO DMA_READ [0 ] 0 MO DMA_WRITE [0 ] 0 MM GETX [0 ] 0 MM GETS [0 ] 0 MM PUTX [0 ] 0 MM PUTO [0 ] 0 MM PUTO_SHARERS [0 ] 0 MM Exclusive_Unblock [43 ] 43 MM Memory_Data [43 ] 43 MM Memory_Ack [0 ] 0 MM DMA_READ [0 ] 0 MM DMA_WRITE [0 ] 0 MI GETX [0 ] 0 MI GETS [0 ] 0 MI PUTX [0 ] 0 MI PUTO [0 ] 0 MI PUTO_SHARERS [0 ] 0 MI Unblock [0 ] 0 MI Clean_Writeback [331 ] 331 MI Dirty_Writeback [76 ] 76 MI Memory_Data [0 ] 0 MI Memory_Ack [0 ] 0 MI DMA_READ [0 ] 0 MI DMA_WRITE [0 ] 0 MIS GETX [0 ] 0 MIS GETS [0 ] 0 MIS PUTX [0 ] 0 MIS PUTO [0 ] 0 MIS PUTO_SHARERS [0 ] 0 MIS Unblock [0 ] 0 MIS Clean_Writeback [0 ] 0 MIS Dirty_Writeback [0 ] 0 MIS Memory_Data [0 ] 0 MIS Memory_Ack [0 ] 0 MIS DMA_READ [0 ] 0 MIS DMA_WRITE [0 ] 0 OS GETX [0 ] 0 OS GETS [0 ] 0 OS PUTX [0 ] 0 OS PUTO [0 ] 0 OS PUTO_SHARERS [0 ] 0 OS Unblock [0 ] 0 OS Clean_Writeback [0 ] 0 OS Dirty_Writeback [0 ] 0 OS Memory_Data [0 ] 0 OS Memory_Ack [0 ] 0 OS DMA_READ [0 ] 0 OS DMA_WRITE [0 ] 0 OSS GETX [0 ] 0 OSS GETS [0 ] 0 OSS PUTX [0 ] 0 OSS PUTO [0 ] 0 OSS PUTO_SHARERS [0 ] 0 OSS Unblock [0 ] 0 OSS Clean_Writeback [0 ] 0 OSS Dirty_Writeback [0 ] 0 OSS Memory_Data [0 ] 0 OSS Memory_Ack [0 ] 0 OSS DMA_READ [0 ] 0 OSS DMA_WRITE [0 ] 0 XI_M GETX [0 ] 0 XI_M GETS [0 ] 0 XI_M PUTX [0 ] 0 XI_M PUTO [0 ] 0 XI_M PUTO_SHARERS [0 ] 0 XI_M Memory_Data [0 ] 0 XI_M Memory_Ack [0 ] 0 XI_M DMA_READ [0 ] 0 XI_M DMA_WRITE [0 ] 0 XI_U GETX [0 ] 0 XI_U GETS [0 ] 0 XI_U PUTX [0 ] 0 XI_U PUTO [0 ] 0 XI_U PUTO_SHARERS [0 ] 0 XI_U Exclusive_Unblock [0 ] 0 XI_U Memory_Ack [0 ] 0 XI_U DMA_READ [0 ] 0 XI_U DMA_WRITE [0 ] 0 OI_D GETX [0 ] 0 OI_D GETS [0 ] 0 OI_D PUTX [0 ] 0 OI_D PUTO [0 ] 0 OI_D PUTO_SHARERS [0 ] 0 OI_D DMA_READ [0 ] 0 OI_D DMA_WRITE [0 ] 0 OI_D Data [0 ] 0 OD GETX [0 ] 0 OD GETS [0 ] 0 OD PUTX [0 ] 0 OD PUTO [0 ] 0 OD PUTO_SHARERS [0 ] 0 OD DMA_READ [0 ] 0 OD DMA_WRITE [0 ] 0 OD DMA_ACK [0 ] 0 MD GETX [0 ] 0 MD GETS [0 ] 0 MD PUTX [0 ] 0 MD PUTO [0 ] 0 MD PUTO_SHARERS [0 ] 0 MD DMA_READ [0 ] 0 MD DMA_WRITE [0 ] 0 MD DMA_ACK