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Author	SHA1	Message	Date
Andreas Sandberg	fec2dea5c3	x86: Add support for m5ops through a memory mapped interface In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones.	2013-09-30 12:20:53 +02:00
Gabe Black	49dcab0ce6	X86: Set up support for adding m5 pseudo insts to a binary.	2009-01-07 00:05:33 -08:00

Author

SHA1

Message

Date

Andreas Sandberg

fec2dea5c3

x86: Add support for m5ops through a memory mapped interface

In order to support m5ops in virtualized environments, we need to use
a memory mapped interface. This changeset adds support for that by
reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR
interface for m5ops. The mapping is done in the
X86ISA::TLB::finalizePhysical() which means that it just works for all
of the CPU models, including virtualized ones.

2013-09-30 12:20:53 +02:00

Gabe Black

49dcab0ce6

X86: Set up support for adding m5 pseudo insts to a binary.

2009-01-07 00:05:33 -08:00

2 commits