Commit graph

1881 commits

Author SHA1 Message Date
Nathan Binkert
ee8c8cbcd8 make etherdump work again
dev/etherdump.cc:
    now that init is automatically called by the framework, don't
    init twice.

--HG--
extra : convert_revision : 16dcdef67aa193ed71ff546e7b255d60f39bf13d
2004-02-20 15:19:19 -05:00
Nathan Binkert
7ad5b6ee22 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 691c89ebacb3c5a5eb67359ed102646b8547dd17
2004-02-20 15:08:02 -05:00
Ron Dreslinski
db940dd0b0 Add support for IPI's and extend RTC to interrupt all Processors
dev/tsunami_cchip.cc:
    Add support for IPI, making changes to read/write to MISC register
    Particularly the IPREQ, IPINTR, and ITINTR subfields
dev/tsunami_cchip.hh:
    Make an array to keep track of the number of outstanding IPI's,
    Extend RTC to interrupt all processors, not just cpu0
dev/tsunami_io.cc:
    Extend RTC to interrupt all present proccessors, not just cpu0

--HG--
extra : convert_revision : 0715cbf0abb06002c0fb0b05ef369304cdf75001
2004-02-20 14:28:59 -05:00
Ron Dreslinski
ee799f47d5 Merge zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/rdreslin/m5bk/clean
--HG--
extra : convert_revision : b8e4d9c2901c4c784ecca351fd34a3f5a2845473
2004-02-20 12:45:11 -05:00
Ron Dreslinski
373d70980e Add serialization for packets on the ethernet link,
and for link events

--HG--
extra : convert_revision : 0054dbc4a42dd38ff8bbf64af303bc509dd5aa8a
2004-02-20 12:44:41 -05:00
Lisa Hsu
5e494f0c59 put back $SETUPDIR = $ENV{PWD} for amd purposes.
--HG--
extra : convert_revision : 115a9ea8d08bf3e32ecb689962c8a12c9a7dba26
2004-02-20 12:37:52 -05:00
Nathan Binkert
cb928f0391 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 626baf73d2e26201088b05b4e5fac19292abcb32
2004-02-20 11:29:39 -05:00
Lisa Hsu
4ec55bef11 interestingly, when setup is called from a perl script, when you chdir in the perl script, the ENV{PWD} does not change.
--HG--
extra : convert_revision : e1b2fb3e3b791921b9c3f4bb3b7417ff047bbcbf
2004-02-19 17:58:17 -05:00
Andrew Schultz
d4637757f8 Remote an old hack that is now unnecessary
base/cprintf_formats.hh:
    Add additional format modifiers

--HG--
extra : convert_revision : f9ec0a664eeb96db7dacacd6b7636e3cb47555e7
2004-02-19 16:32:13 -05:00
Andrew Schultz
e3fb3d1ad0 Misspeculation fix and (more importantly) change to allow for the ev6 style
physical addressing.  This has the uncacheable bit as bit 40 as opposed
to bit 39.  Additionally, we now support (at least superficially) a 44-bit
physical address.  To deal with superpage access in this scheme, any super
page access with either bit 39 or 40 set is sign extended.

--HG--
extra : convert_revision : 05ddbcb9a6a92481109a63b261743881953620ab
2004-02-19 16:30:06 -05:00
Andrew Schultz
12747d3084 Change the physical memory logic, and also add misspeculation fix to
tlb index calls that are called from ExecContext::readIpr

arch/alpha/ev5.cc:
    Fix misspeculation bugs for misspeculated IPR accesses

--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7
2004-02-18 21:38:55 -05:00
Nathan Binkert
26d0cf70ea Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 20e6f7edd432952b3c30d4f017058dfd52456fda
2004-02-18 14:17:44 -05:00
Nathan Binkert
2d5ef88e1c couple fixes
--HG--
extra : convert_revision : bd0948bc831610f442d5ff6893f0e2a68e3aa83f
2004-02-18 14:17:13 -05:00
Nathan Binkert
3bf012fe2f Merge
--HG--
extra : convert_revision : b29c9bbb50994e2567fd58deedb853123d2d69a0
2004-02-18 12:01:04 -05:00
Erik Hallnor
6610699987 Add COW support to the IIC.
cpu/memtest/memtest.cc:
    Move the trace Addr to the end of the printouts

--HG--
extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4
2004-02-17 22:53:15 -05:00
Erik Hallnor
4bb902328a Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 19800f3879c943addbf4bca747b357a94352b6a8
2004-02-17 03:14:21 -05:00
Erik Hallnor
5c77989c9b Change the way data is handled in the cache blocks.
--HG--
extra : convert_revision : 8c071c4f48581a398bebc4f033e18580dca0897f
2004-02-17 03:05:19 -05:00
Andrew Schultz
59a6e9d705 Merge
arch/alpha/alpha_memory.cc:
    SCCS merged

--HG--
extra : convert_revision : 0348e29c833684fd593a6c02913319f45f24e76e
2004-02-16 22:04:55 -05:00
Andrew Schultz
a73e263f94 Change logic for translating a memory addresses, extra checks for invalid
physical addresses.

--HG--
extra : convert_revision : efb4a5229d88cb3c024e0b24f5916048bd42d589
2004-02-16 21:56:38 -05:00
Andrew Schultz
772f95975d Changed physical device addresses to fit within the 40-bit implemented
physical address

--HG--
extra : convert_revision : c51b5d3e09b4d5384cb113ab2ed569ef9a1f2ab4
2004-02-16 21:20:18 -05:00
Erik Hallnor
b797f99213 Rework BusBridge to have a latency and handle bus IDs correctly.
--HG--
extra : convert_revision : 901ef4782d0c9f0d842deba7acdba7896da7e41c
2004-02-16 16:28:11 -05:00
Ali Saidi
706d6bea52 1 << x != (uint64_t)1 << x
dev/tsunami_cchip.cc:
    fixed another problem with the interrupt code, should all work now

--HG--
extra : convert_revision : 1d9fe6081b6391e3e09f1c4a9380a30240fac6dc
2004-02-16 16:04:34 -05:00
Andrew Schultz
9c9d1cb5bf Changed device IRQ back to 1
--HG--
extra : convert_revision : 3fb611e6e0305fe9854cdf7813492b75750cd7a9
2004-02-16 01:33:43 -05:00
Andrew Schultz
484a4de65a Added new aic register definition, fix some interrupt related calls
dev/tsunami_cchip.cc:
    Change interrupt level to 20 for devices

--HG--
extra : convert_revision : deee68d5434643dc751de08e5a804c14d1a86efd
2004-02-16 01:07:16 -05:00
Ali Saidi
b82bd8fd78 changed interrupt index to be 64 bits long and fixed a bad include
in adaptec_ctrl.hh

cpu/base_cpu.cc:
    changed index to 64bits
cpu/base_cpu.hh:
    changed index to 64 bits

--HG--
extra : convert_revision : e70d5f09f6066b90fca82cae22bb7d7eb705d65e
2004-02-16 00:21:42 -05:00
Ali Saidi
03e8793f89 Merge
dev/tsunami_cchip.cc:
    SCCS merged

--HG--
extra : convert_revision : a4b2b0b92038217608a733a6c8f27edb018e910d
2004-02-16 00:00:23 -05:00
Ali Saidi
de5fa66714 Rewrote interrupt code to handle masking correctly and changed every
interrupt to use a different subnumber since both devices could
interrupt at the same time and we don't want to loose one.

dev/tsunami_cchip.cc:
    rewrote interrupt code to handle interrupt mask clearing correctly
dev/tsunami_cchip.hh:
    changed (post/clear)DRIR to use a interrupt number rather than a vecotr
dev/tsunami_io.cc:
    updated for new post/clearDRIR calls

--HG--
extra : convert_revision : 5b39f5e15a66d5eb6e689e6ece62f99b5fa735ab
2004-02-15 23:56:44 -05:00
Andrew Schultz
44b277a62f Interrupt changes
dev/tsunami_cchip.cc:
    Changed to point to IPL 20 rather than 21

--HG--
extra : convert_revision : ee70f4bae4e06b92a0e02ea71ed65d4e260e7967
2004-02-15 22:36:23 -05:00
Andrew Schultz
1978851fc7 Fix some debug printing errors
--HG--
extra : convert_revision : 3ef3d2c7eb67c45a7e005c1c072f3098142ea210
2004-02-15 18:24:14 -05:00
Andrew Schultz
55a7ad9977 Scsi controller operation changes
--HG--
extra : convert_revision : f274a32072c1c0ff2de99724f4597a46341df6ae
2004-02-15 18:23:42 -05:00
Andrew Schultz
9984412671 Fix bug with physical address translation
--HG--
extra : convert_revision : 2bfc338decdceaaf57f4a391b93882a8e0715a56
2004-02-15 16:33:16 -05:00
Erik Hallnor
7fd91f7c4c Add full copy support.
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
    Add 2 new parameters to control the percentage of unaligned copy sources and destinations.

--HG--
extra : convert_revision : 2646ee2f195e9f3e76bc257b8716163ef63a9f40
2004-02-14 03:25:39 -05:00
Andrew Schultz
092ec1978d Fix to remote debugger while in PAL
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
    Fix to remote debugger while in PAL code
dev/pcidev.cc:
    Remove extra debug printf

--HG--
extra : convert_revision : e64988846ad05cd3ddf47034d72d99dae3501591
2004-02-13 18:15:04 -05:00
Andrew Schultz
6391bfac54 Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/alschult/linux

--HG--
extra : convert_revision : 2ea2bbd41f7e0c257b374d9cd0e37abaf6a7c170
2004-02-13 16:42:42 -05:00
Nathan Binkert
8c89212fa3 Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 99f5289f4143fb09c84694a51b3394d6699d927a
2004-02-13 15:44:46 -05:00
Nathan Binkert
8232c9743d fix up vtophys a bit
arch/alpha/vtophys.cc:
    fix up vtophys to deal with translations if there
    is no ptbr, and to deal with PAL addresses
    add ptomem which is just a wrapper for dma_addr
arch/alpha/vtophys.hh:
    add ptomem which is a wrapper for dma_addr with the
    same usage as vtomem

--HG--
extra : convert_revision : 1ae22073d400e87b708a4a7ef501124227fc6c39
2004-02-13 15:36:21 -05:00
Nathan Binkert
2300633c0a better debugging
--HG--
extra : convert_revision : 504fc7174403aaeed0574a20587d4651c7351671
2004-02-12 13:59:56 -05:00
Nathan Binkert
cc53465cd5 Add support for all devices to get requests from a timing memory bus.
In the future, this can be used for actual data, but for now, it's
so that devices can respond to timing accesses properly.  This way,
an uncached access on a bus further away will take longer to respond.

dev/alpha_console.cc:
dev/alpha_console.hh:
    suport the separate IO bus

--HG--
extra : convert_revision : ececb70f5febfd00231f6e406f93b2a79be01261
2004-02-11 16:07:55 -05:00
Ali Saidi
29eae76153 Merge
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/tsunami_uart.cc:
    SCCS merged

--HG--
extra : convert_revision : da3d1998d6dd39e0d3f8754074c513cdd8a4193c
2004-02-11 15:36:36 -05:00
Ali Saidi
0f34a00703 added serializeation code
--HG--
extra : convert_revision : 468f3c739707d167af43562695b604fd7dead661
2004-02-11 15:32:30 -05:00
Steve Reinhardt
5e82f8d84c Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : 964126edcf72faf572a9272599264ba2f5cd7aa1
2004-02-10 21:44:08 -08:00
Steve Reinhardt
d38f995aee Fixes for Linux syscall emulation.
arch/alpha/alpha_linux_process.cc:
    Fixes for Linux emulation:
    - stat struct alignment
    - osf_{get,set}sysinfo return values
    - additional syscall numbers
    - initialize $r0 to 0
sim/syscall_emul.cc:
    brk(0) just returns brk value (don't update it!)

--HG--
extra : convert_revision : 78e22458321c81e81540d101c9e65e2e4b0ad117
2004-02-10 21:43:57 -08:00
Andrew Schultz
e72e8b28c8 Fix masking of read/write address to get read/write offset
Changed base_linux.ini file to use physical addresses

dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
    Fix masking of read/write address to get read/write offset
dev/tsunami_uart.cc:
    Fix masking of read/write address to get read/write offset
    Also added add_child call that was missed
dev/tsunami_uart.hh:
    Changed size to 0x8

--HG--
extra : convert_revision : 1468ca43167bfb28b28c4510401a1ebad683e102
2004-02-10 22:35:18 -05:00
Andrew Schultz
f7c4d57260 Removed mask from devices
--HG--
extra : convert_revision : 643dc6bbd4f60437cee7518e8ae011cee32e2263
2004-02-10 20:45:48 -05:00
Erik Hallnor
14c11155be Add support for multiple outstanding aligned copies
cpu/memtest/memtest.cc:
    Add traceBlockAddr to trace outputs.

--HG--
extra : convert_revision : e4ebaf9647fb393448367f4f4af3bae566f51c24
2004-02-10 20:37:38 -05:00
Andrew Schultz
81d5ffe7de Changed new linux stuff to work with new FunctionalMemory interface and
some sundry problems with new interface

dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
    Fixed to use new FunctionalMemory interface

--HG--
extra : convert_revision : bee98e6285d92f28fafacf919ab06eaf333a9b56
2004-02-10 00:19:43 -05:00
Andrew Schultz
eac2d6a668 Merge linux tree with head
arch/alpha/alpha_memory.cc:
dev/alpha_console.cc:
dev/alpha_console.hh:
    Merge

--HG--
extra : convert_revision : 3233648f204338ab3f102ff117754dce955dcc37
2004-02-09 17:50:47 -05:00
Erik Hallnor
4478bcb7c7 Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 0c018b88d6ca80b1690ec99d795014848e375e44
2004-02-09 17:38:41 -05:00
Erik Hallnor
f0abedf769 Add LRU aligned copies to the hierarchy, with only one outstanding copy. Aligned copies now fully work in LRU (just need to write the IIC doCopy call). At the moment they are slow since a stalled copy stalls the entire cache.
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
    Add aligned copy tests, percent of copies is specified by percent_copies

--HG--
extra : convert_revision : eaf1900fcb8832db98249e94e3472ebfb049eb48
2004-02-09 17:37:27 -05:00
Andrew Schultz
48bb27be72 Added platform.hh
--HG--
extra : convert_revision : c11fde5e5f0e344d2f4c89c57a4d41ca179a31e5
2004-02-09 14:52:41 -05:00