and started cleaning up config files.
arch/alpha/isa_desc:
Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Cleaned up includes and changed device from FunctionalMemory to
PioDevice for detailed boot
dev/ns_gige.cc:
The ethernet dev uses two BARs, and the first bars size was being set
incorrectly.
dev/tsunamireg.h:
I don't know why we were using the superpage as the PCI memory addr.
Changed and works correctly with detailed boot.
--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd
dev/console.cc:
commented out code that checks if an interrupt is happening before issuing one
because they can get lost when linux boots
dev/console.hh:
added a setPlatform function to set the platform to interrupt
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
Added virtual functions to post console interrupts
dev/tsunami_io.cc:
allowed a 64bit read of the PIC since we can't do a physical byte read
dev/tsunami_uart.cc:
moved TsunamiUart to PioDevice
various little fixes to make linux work
dev/tsunami_uart.hh:
Made Tsunami_Uart a PIO device
dev/tsunamireg.h:
added some UART defines and used the ULL macros
kern/linux/linux_system.cc:
commented out waiting for gdb
--HG--
extra : convert_revision : 8cfd0700f3812ab349a6d7f132f85f4f421c5c5e
Added function to skip determine_cpu_caches(). We may have to update this in the
future: see note below.
arch/alpha/alpha_memory.cc:
dev/ide_ctrl.cc:
dev/tsunamireg.h:
Added ULL for 64bit ints
kern/linux/linux_system.cc:
Added a function to skip determine_cpu_caches, right now it is only used for
printing in proc, however in the future we may either want to implement the SC_CTL
IPR register or manually set alpha_l1i_cacheshape, alpha_l1d_cacheshape,
alpha_l2_cacheshape, alpha_l3_cacheshape to ((size << 10) | (linesize>>1)<<4 | way)
kern/linux/linux_system.hh:
added event to skip determine_cpu_caches()
--HG--
extra : convert_revision : 1065f2091bbe6832b730af490f5b4672c2afedce
dev/tsunami_io.cc:
PIC, PIT, RTC implementation for tsunami working so far
dev/tsunami_io.hh:
PIT, PIC, RTC implementation for tlaser working so far
dev/tsunamireg.h:
Added RTC defines
kern/linux/linux_system.cc:
wrote cycle frequency into variable so linux doesn't probe for it.
The support exists, but it takes two seconds of time to do on a real
machine, so forever in the simulator.
--HG--
extra : convert_revision : e0ed7f271ece4ed69c06af35d1b0e8ed848cd138
dev/tsunami_dma.cc:
decide actually differentiating between the different i/o requests
would be a better idea
dev/tsunami_dma.hh:
added mask and mode variables, incase they are needed
dev/tsunamireg.h:
added some i/o port defs
--HG--
extra : convert_revision : 5c7a88a8f8c8725359737b399cfa80610149a5f4
dev/alpha_access.h:
removed my attempted hack to get console compling in linux
dev/tsunami.cc:
dev/tsunami.hh:
added pchip pointer to tsunami
dev/tsunami_cchip.cc:
made printing better
dev/tsunami_cchip.hh:
commented out back pointer for now, since the parser has issues with it
dev/tsunamireg.h:
added pchip registers
--HG--
extra : convert_revision : b4fceb7d08e757d9aaf37df8eb1bcd5ae29ce0da
