sanchayanmaity/gem5
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Author SHA1 Message Date
Gabe Black 2f31643db5 X86: Add a check to chks to verify a task state segment descriptor. 2009-02-25 10:17:02 -08:00
Gabe Black 7b1cb74ac3 X86: Add a check to chks which raises #GP(selector) if selector is NULL or not in the GDT. 2009-02-25 10:16:54 -08:00
Gabe Black 1b336a8fe7 X86: Make the stupd microop not update registers in initiateAcc. 2009-02-25 10:15:56 -08:00
Gabe Black a1aba01a02 CPU: Get rid of translate... functions from various interface classes. 2009-02-25 10:15:34 -08:00
Nathan Binkert e1798d063e Quell g++ 4.3 warning about operator ambiguity 2009-02-06 20:55:50 -08:00
Gabe Black 923a14dde7 X86: Make the fault classes handle error codes better. 2009-02-01 17:08:32 -08:00
Gabe Black 9b4d1e0f9a X86: Distinguish between hardware and software interrupts/exceptions 2009-02-01 17:07:18 -08:00
Gabe Black 6b53b8387e X86: Make the chks microop check for the right int descriptor type. 2009-02-01 17:05:37 -08:00
Gabe Black 115b1a7ed3 X86: Autogenerate macroop generateDisassemble function. 2009-01-06 22:55:27 -08:00
Gabe Black 8c15518f30 X86: Fix completeAcc get call. 2008-11-09 21:55:43 -08:00
Gabe Black 3c4567f2a6 X86: Set the delayed commit flag in x86 microops appropriately. 2008-10-12 23:29:10 -07:00
Gabe Black a2e0d539d8 X86: Add wrval/rdval microops for reading significant miscregs. 2008-10-12 22:55:55 -07:00
Gabe Black f813a4be49 X86: Make sure register microops set fault rather than returning one. 2008-10-12 22:24:06 -07:00
Gabe Black 961b40cdb5 X86: Implement an wrdh microop which loads bases/offsets from 16 byte descriptors. 2008-10-12 22:16:53 -07:00
Gabe Black 6b46e5204d X86: Implement the chks check of interrupt gate target code segments. 2008-10-12 20:38:22 -07:00
Gabe Black 30feb90c1c X86: Add a check type for interrupt gates. 2008-10-12 20:33:37 -07:00
Gabe Black 15f5bb3055 X86: Fix chks checking the submode for stack segments. 2008-10-12 20:29:52 -07:00
Gabe Black 9e1fe2050a X86: Let segment manipulation microops be conditional. 2008-10-12 20:25:06 -07:00
Gabe Black 223fc41c07 X86: Fix the rdbase microop 2008-10-12 20:07:46 -07:00
Gabe Black cefb768131 X86: Create a handy way to access labels from the ROM in microcode. 2008-10-12 17:52:51 -07:00
Gabe Black e5f8092467 X86: Make X86's microcode ROM actually do something. 2008-10-12 17:48:44 -07:00
Gabe Black 6fd4eff68f X86: Create an eret microop which returns from ROM to combinational decoding. 2008-10-12 15:53:04 -07:00
Gabe Black 4aa18aa800 X86: Make Br never report itself as the last microop. 2008-10-12 15:43:35 -07:00
Gabe Black 77c0e1d110 X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
Gabe Black e1b306fa53 X86: Fix the debugging microops. The debug functions can't handle a string object format. 2008-10-09 00:05:39 -07:00
Gabe Black 4f4ff17578 X86: Make the disassembly for halt conform with the other microops. 2008-06-12 00:58:27 -04:00
Gabe Black 66f54a6037 X86: Change how segment loading is performed. 2008-06-12 00:52:12 -04:00
Gabe Black d4e7c7edd3 X86: Keep handy values like the operating mode in one register. 2008-06-12 00:50:25 -04:00
Gabe Black fa7c81c6df X86: Change what the microop chks does. 
Instead of computing the segment descriptor address, this now checks if a
selector value/descriptor are legal for a particular purpose.
 2008-06-12 00:50:10 -04:00
Gabe Black 6bd9cf3594 X86: Add a microop to read a segments attribute register. 2008-06-12 00:50:05 -04:00
Gabe Black e0c20386ac X86: Add microops and supporting code to manipulate the whole rflags register. 2008-06-12 00:49:50 -04:00
Gabe Black 2bb8933f78 X86: Add microops which panic, fatal, warn, and warn_once. 2008-06-12 00:49:25 -04:00
Gabe Black bbc1f394ff X86: Truncate descriptors to 16 bits. 2008-06-12 00:49:16 -04:00
Gabe Black 8501a90f59 X86: Add in some support for the tsc register. 2008-06-12 00:39:10 -04:00
Gabe Black 98d2ca403e X86: Implement the INVLPG instruction and the TIA microop. 
--HG--
extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
 2008-02-26 23:39:22 -05:00
Gabe Black 988c6f227a X86: Implement mov from control register. 
--HG--
extra : convert_revision : c8280f0686a3ae6d5c405327540ad15a3a5531f9
 2007-12-01 23:06:03 -08:00
Gabe Black fe833dd2c3 X86: First crack at far returns. This is grossly approximate. 
--HG--
extra : convert_revision : 23da0338af1f7663ae5ddf2289fb45dd32f37c42
 2007-12-01 23:05:01 -08:00
Gabe Black dc6f960171 X86: Reorganize segmentation and implement segment selector movs. 
--HG--
extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
 2007-12-01 23:03:39 -08:00
Gabe Black a548067b01 X86: Make the "fault" microop predicated. 
--HG--
extra : convert_revision : ded34133afcd6af1f55b8991b82bad45258069d3
 2007-12-01 23:01:56 -08:00
Gabe Black 62c79ca637 X86: Implement the lgdt instruction. 
--HG--
extra : convert_revision : d1698a82df3c57cc9bbf8d5d190f271bfc7cb2e4
 2007-12-01 23:01:17 -08:00
Gabe Black 4e3ff42762 X86: Implement wrbase and wrlimit for loading pseudo descriptors. 
--HG--
extra : convert_revision : fe03c4aed95ef12773e80cdb3d9cff68a2b20f02
 2007-12-01 23:00:58 -08:00
Gabe Black 5772e3cada X86: Make microcode use presegmentation RIPs and the rest of m5 use post segmentation RIPS. 
--HG--
extra : convert_revision : d8cda7c8b9a2afb8a9d601b6d61529a96c5f87fe
 2007-11-13 01:31:43 -08:00
Gabe Black f1f5dd79bf X86: Implement the wrcr microop which writes a control register, and some control register work. 
--HG--
extra : convert_revision : 3e9daef9cdd0665c033420e5b4f981649e9908ab
 2007-11-12 14:38:59 -08:00
Gabe Black f9ddb894dd X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0. 
--HG--
extra : convert_revision : 08bd7b4ff183038c016612d04ac73b20a255d141
 2007-11-12 14:38:45 -08:00
Gabe Black aaa30714b3 X86: Various fixes to indexing segmentation related registers 
--HG--
extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
 2007-11-12 14:37:54 -08:00
Gabe Black 503fb8ebed X86: Compile fixes for 32 bit/debug/opt. 
--HG--
extra : convert_revision : 591fffb316830fca5792666c8df12abd4e7c551b
 2007-10-30 16:34:00 -04:00
Gabe Black 421aea980f X86: Implement the cda microop which checks if an address is legal to write to. 
--HG--
extra : convert_revision : afe20649180dd59ad0702b98f7293be6c9226359
 2007-10-22 14:30:56 -07:00
Gabe Black 4d15e4cf7b X86: Implement the stupd microop ("store with update", not "stupid") and use it in ENTER. 
--HG--
extra : convert_revision : 9151f701162d31ef26298497467c42b7b0ed85d5
 2007-10-21 18:44:50 -07:00
Gabe Black 35a8bc56cd X86: Impelement the HLT instruction and fix the "halt" microop. 
--HG--
extra : convert_revision : 932e5bb5bf3644f8468dba92177fb87cc54b891a
 2007-10-19 15:11:15 -07:00
Gabe Black f69a463b4b X86: Implement a "halt" microop. 
--HG--
extra : convert_revision : 53a846a157e4dce42343b81901df1207738f62cd
 2007-10-19 15:10:23 -07:00
Gabe Black 33dbd8a766 X86: Make the "fault" microop predicated. 
--HG--
extra : convert_revision : 48dae1f3c680636833c137fe6b95b37ae84e188c
 2007-10-18 22:40:18 -07:00
Gabe Black 0ffb317ff9 X86: Make wrip sign extend its second operand. 
--HG--
extra : convert_revision : 2531af8b442ea5aaefccd7a7999c7720489edc36
 2007-10-18 22:36:36 -07:00
Gabe Black 9498e536c0 X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions. 
There are no priviledge checks, so these instructions will all work in all
modes.

--HG--
extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
 2007-10-12 16:37:55 -07:00
Gabe Black efbff349a9 X86: Significantly filled out misc regs. 
--HG--
extra : convert_revision : 4c53be6568134d65e57f5411df986fd9a89e82c9
 2007-10-07 18:16:00 -07:00
Gabe Black 06d2d54b57 X86: Fix the movfp microop. 
--HG--
extra : convert_revision : 23829782a2802a97a05e4dfdb5dd38fbe4165a90
 2007-10-02 22:58:04 -07:00
Gabe Black 7c521db9de X86: Implement the ldst microop and put it in existing microcode where appropriate. 
--HG--
extra : convert_revision : f08bd725d07a501bb7a0ce91590b5d37db99c6f3
 2007-10-02 22:08:09 -07:00
Gabe Black b831f7409b X86: Get rid of a hack for ruflag which is no longer necessary. 
--HG--
extra : convert_revision : 1bb60c9ddb483aead2af0201bbda938cc6d3f7cb
 2007-10-02 22:05:50 -07:00
Gabe Black efb309525a X86: Allow logic instructions to set ECF as well as CF. 
--HG--
extra : convert_revision : 6ac20f069c86c23a8d443a7127afd6015166c00d
 2007-10-02 22:05:10 -07:00
Gabe Black a75b6f5106 X86: Move the fp microops to their own file with their own base classes in C++ and python. 
--HG--
extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
 2007-09-19 18:27:55 -07:00
Gabe Black 534c6a800a X86: Make the shift and rotate instructions set the carry flag(s) and overflow flags like they're supposed to. 
--HG--
extra : convert_revision : c0523a5bbf53375ce979ca7d98a95e465be66fbe
 2007-09-13 16:35:20 -07:00
Gabe Black f7b6230d99 X86: Total overhaul of the division instructions and microops. 
--HG--
extra : convert_revision : 303ea45f69f7805361ad877fe6bb43fbc3dfd7a6
 2007-09-13 16:34:46 -07:00
Gabe Black 8e7bca8b36 X86: Move a comment to be next to the code it describes. 
--HG--
extra : convert_revision : c384391175babb7cfdd3885ae9d9f1a9405ea44f
 2007-09-10 11:01:52 -07:00
Gabe Black e4c0171356 X86: Rework the multiplication microops so that they work like they would in the patent. 
--HG--
extra : convert_revision : 6fcf5dee440288d8bf92f6c5c2f97ef019975536
 2007-09-06 16:27:28 -07:00
Gabe Black 7f079149f1 X86: Make signed multiplication do something different from unsigned. 
--HG--
extra : convert_revision : 333c4a3464d708d4d8cea88931259ab96c2f75ed
 2007-09-06 16:25:29 -07:00
Gabe Black 5052e2cb10 X86: Make signed versions of partial register values available to microops. 
--HG--
extra : convert_revision : c820d1250f505911a341ced42d4f73796ea77f87
 2007-09-06 16:22:08 -07:00
Gabe Black 832ef7412b X86: Correct how the hi portion of a product is computed. 
--HG--
extra : convert_revision : 1f503e1cae0374e62e6254e8073e903adc29d067
 2007-09-06 16:20:12 -07:00
Gabe Black 389abade01 X86: Add a square root microop and the SSE sqrt instruction. 
--HG--
extra : convert_revision : ddc6e7e95111189d43f75bf84cd3d82433d982b3
 2007-09-06 16:18:34 -07:00
Gabe Black 4478487c37 X86: Add SSE comparison instructions and microops and move some FP microops to be with the other ones. 
--HG--
extra : convert_revision : ee0b5acde08d12c51a5282efb58d1ac72e0779af
 2007-09-06 16:09:28 -07:00
Gabe Black fea46ee6e3 X86: Implement an SSE xor microop and instruction. 
--HG--
extra : convert_revision : 949737d0f5d6fe4aa77cc4680d0c88caab3e8174
 2007-09-04 23:44:37 -07:00
Gabe Black 6c689a3b4b X86: Make the movfp microop use FloatRegBits instead of FloatRegs. 
This fixes a problem where interpreting arbitrary bits as floating point would
change what the value was. These values are legitimate because the fp
registers could be used to move around arbitrary data.

--HG--
extra : convert_revision : f1d7159ba137702b5722cc7c1b64ed7dd06c21de
 2007-09-04 23:42:55 -07:00
Gabe Black d2fc4ee625 X86: Implement some SSE fp microops and instructions. 
--HG--
extra : convert_revision : 7e0595ef542fbfb701bfac7e9ac4648349a92b26
 2007-09-04 23:33:50 -07:00
Gabe Black 8e3b199cb8 X86: Add some SSE floating point/integer conversion microops. 
--HG--
extra : convert_revision : 2a1aa16709db940f5f40bbd84ca082f26b03b9c5
 2007-09-04 23:32:18 -07:00
Gabe Black b0b4038ee9 X86: Fix a corner case where mul would overwrite an original register value it still needed. 
--HG--
extra : convert_revision : 86ee0e2bf716d52c34ee731727d6366935f103ed
 2007-09-04 23:22:08 -07:00
Gabe Black 9da070ce8a X86: Major rework of how regop microops are generated. 
The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.

--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
 2007-08-31 22:28:07 -07:00
Gabe Black f67cd04673 X86: Fix the sra microop to get the sign bit from the right operand. 
--HG--
extra : convert_revision : 71e58dd6dd6918ee403f2e332c47e29acdace464
 2007-08-29 20:39:41 -07:00
Gabe Black 3b97b6e0e2 X86: Add an fp move microop. 
--HG--
extra : convert_revision : a9d6d3568cd2c6a65df91bf56ee1e43523f04630
 2007-08-29 20:36:44 -07:00
Gabe Black 22830c0747 X86: Add load and store microops that use the fp registers. 
--HG--
extra : convert_revision : 153a055e888d8c47d59758a599dbd38f63008137
 2007-08-29 20:36:12 -07:00
Gabe Black 8d1c7a83d7 X86: Make the Ruflag microop work correctly, and make the code a little clearer. 
--HG--
extra : convert_revision : c551f51cdda46df99370363ed2d70916db8413eb
 2007-08-26 20:41:36 -07:00
Gabe Black 9c99f5f825 X86: Fix the sign extension microop so it extends zeros correctly. 
--HG--
extra : convert_revision : 9d7ca286ba7709175fa75226320601acce4ced98
 2007-08-26 20:37:41 -07:00
Gabe Black fcd04f953c X86: Remove x86 code that attempted to fix misaligned accesses. 
--HG--
extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
 2007-08-26 20:30:36 -07:00
Gabe Black 60c61cb2b1 X86: Overhaul of ruflags to get it to work correctly. 
--HG--
extra : convert_revision : 00a36a80a1945806aac9fa7d9d6a3906465dcad2
 2007-08-07 15:21:13 -07:00
Gabe Black fb6cdf09cb X86: Make a microcode branch microop. 
Also some touch up for ruflag.

--HG--
extra : convert_revision : 829947169af25ca6573f53b9430707101c75cc23
 2007-08-07 15:19:26 -07:00
Gabe Black 30e777a5d3 X86: Implement microops and instructions that manipulate the flags register. 
--HG--
extra : convert_revision : 566841577bf4a98cac0b65292fe0f7daf89a9203
 2007-08-04 20:24:18 -07:00
Gabe Black 802f13e6bd X86: Make 64 bit unaligned accesses work as well as the other sizes. 
There is a fundemental flaw in how unaligned accesses are supported, but this
is still an improvement.

--HG--
extra : convert_revision : 1c20b524ac24cd4a812c876b067495ee6a7ae29f
 2007-08-04 20:22:20 -07:00
Gabe Black e410a925df X86: Start implementing segmentation support. 
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.

--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
 2007-08-04 20:12:54 -07:00
Gabe Black e5e5b0119d X86: Fix for compilation bug with new cache code. 
--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
 2007-08-01 12:49:58 -07:00
Gabe Black 595ff465e5 X86: Remove a naming conflict between the register index parameters and the "picked" register values. 
--HG--
extra : convert_revision : 7b2c1be509478153ebf396841e4cbeccee3e03d1
 2007-07-30 15:44:21 -07:00
Gabe Black bae96272a1 X86: Make instructions use pick, and implement/adjust some multiplication microops and instructions. 
--HG--
extra : convert_revision : 5c56f6819ee07d936b388b3d1810a3b73db84f9c
 2007-07-30 13:28:05 -07:00
Gabe Black d8beeff324 X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded". 
--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
 2007-07-30 13:23:33 -07:00
Gabe Black 7309d5ee45 X86: Make logic instructions flag setting work. 
The instructions now ask for the appropriate flags to be set, and the microops do the "right thing" with the CF and OF flags, namely zero them.

--HG--
extra : convert_revision : 85138a832f44c879bf8a11bd3a35b58be6272ef3
 2007-07-29 13:51:40 -07:00
Gabe Black e5f5890365 X86: Make limm use merge and allow overriding the data size. 
--HG--
extra : convert_revision : c6057226b8ff8f272612a9d3bf7d1d9ba90c819b
 2007-07-29 01:30:28 -07:00
Gabe Black c0670187c5 X86: Add functions to read and write to an exec context. 
These functions take care of calling the thread contexts read and write functions with the right sized data type, and handle unaligned accesses.

--HG--
extra : convert_revision : b4b59ab2b22559333035185946bae3eab316c879
 2007-07-26 22:08:35 -07:00
Gabe Black 57428b8b0b X86: Fix carry calculation for subtraction based microops. 
The carry flag should be calculated using the -complement- of the second operand, not it's negation. The carry in which is part of computing the 2's complement may induce a carry, but if you've already caused the carry before you get the carry computing logic involved, it will miss it.

--HG--
extra : convert_revision : 318cf86929664fc52ed9e023606a9e892eba635c
 2007-07-26 22:06:30 -07:00
Gabe Black 69f4a6dc86 Make the shift and rotate microops mask the shift/rotate amount correctly. 
--HG--
extra : convert_revision : 31c5d3fa8ef0d37494d0e35cef31be6056d5d93f
 2007-07-24 15:10:53 -07:00
Gabe Black ee6fbdc28b Implement rotate with carry microops. 
--HG--
extra : convert_revision : 1d7ff6611e5b4766a5257c1e73681fabbe5f6d76
 2007-07-21 19:27:38 -07:00
Gabe Black fc1b7d62b7 Fixed the distinction between far and near versions of jmp, call and ret. Implemented some shifts, rotates, and pushes. 
--HG--
extra : convert_revision : fcb06189ff213e82da16ac43231feb308cb3a285
 2007-07-20 23:16:03 -07:00
Gabe Black 9093cb79a1 Implement adc and sbb instructions and microops. 
--HG--
extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa
 2007-07-20 17:17:11 -07:00
Gabe Black 1ed6a8ed79 Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops. 
--HG--
extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
 2007-07-20 16:39:07 -07:00
Gabe Black f09847c7a6 Make load and store ops use the appropriate sized data access. 
--HG--
extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
 2007-07-20 15:02:09 -07:00
Gabe Black 0baae59c09 Fix carry flag for subtracts, and clean up code slightly. 
--HG--
extra : convert_revision : 668f5d5aeba888488b41284de6c72a0d055c4ef4
 2007-07-20 14:53:38 -07:00
Gabe Black cfadef74d1 x86 fixes 
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.

--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
 2007-07-19 15:15:47 -07:00
Gabe Black 99310a1d93 Make instructions that conditionally set registers set them to their old value if they don't actually execute. 
--HG--
extra : convert_revision : 36e63dd0c6ac1a3e1133c7985cf5507b83e9ee45
 2007-07-18 17:46:38 -07:00
Gabe Black 05a33a443f Make store microops actually store instead of load. 
--HG--
extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
 2007-07-18 17:45:06 -07:00
Gabe Black b949458d4c Make the data size used by regops overridable in the microassembly. 
--HG--
extra : convert_revision : 84d850aa5340c9d02d03502704b063215f6e2140
 2007-07-18 16:26:17 -07:00
Gabe Black dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst. 
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
 2007-07-18 16:09:35 -07:00
Gabe Black e524240d68 Make disassembled x86 register indices reflect their size. 
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
 2007-07-17 18:12:33 -07:00
Gabe Black a6757095c3 Add in support for condition code flags. 
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
 2007-07-17 15:33:18 -07:00
Gabe Black 4f7809d5e6 Pull some hard coded base classes out of the isa description. 
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
 2007-07-14 17:14:19 -07:00
Gabe Black efce09e958 Add in code that lays the ground work for setting flags. 
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
 2007-06-21 13:48:44 +00:00
Gabe Black a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
 2007-06-20 15:02:50 +00:00
Gabe Black d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction. 
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
 2007-06-19 22:40:10 +00:00
Gabe Black d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL. 
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
 2007-06-19 17:56:06 +00:00
Gabe Black ebe4d05f70 Renovate the "fault" microop implementation. 
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
 2007-06-19 14:50:35 +00:00
Gabe Black 6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
 2007-06-19 14:18:25 +00:00
Gabe Black 6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
 2007-06-18 14:15:00 +00:00
Gabe Black 7213944110 Fix limm. 
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
 2007-06-14 20:52:23 +00:00
Gabe Black fd45c4a58f Move load/store microops into their own file. They still don't do anything, though. 
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
 2007-06-13 18:05:08 +00:00
Gabe Black dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly. 
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
 2007-06-13 18:01:23 +00:00
Gabe Black a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent. 
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
 2007-06-12 16:21:47 +00:00
Gabe Black 57a8c32bea Fix the formatting on a comment. 
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
 2007-06-08 17:16:05 +00:00
Gabe Black 1f7ed5b7b4 Big changes to use the new microcode assembler. 
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
 2007-06-08 16:09:43 +00:00
Gabe Black dba02f703b Make limm (load immediate) microop 
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
 2007-06-04 19:53:06 +00:00
Gabe Black 41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
 2007-06-04 15:59:20 +00:00
Gabe Black 798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black 9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black 59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black 2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black fd77212b72 Add code to generate register and immediate based integer op microop classes. 
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
 2007-03-29 00:49:53 -07:00