Gabe Black
cc07dcf026
MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.
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The MIPS ISA object expects to be constructed with a CPU pointer it uses to
look at other thread contexts and allow them to be manipulated with control
registers. Unfortunately, that differs from all the other ISA classes and
would complicate their implementation.
This change makes the event constructor use a CPU pointer pulled out of the
thread context passed to setMiscReg instead.
2009-12-31 15:30:50 -05:00
Gabe Black
c874bfae3f
MIPS: Format the register index constants like the other ISAs.
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Also a few more style fixes.
2009-07-21 23:38:26 -07:00
Gabe Black
7548082d3b
MIPS: Many style fixes.
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White space, commented out code, some other minor fixes.
2009-07-21 01:08:53 -07:00
Gabe Black
5161bc19d9
MIPS: Use BitUnions instead of bits() functions and constants.
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Also fix style issues in regions around these changes.
2009-07-20 20:14:15 -07:00
Gabe Black
de7f462219
MIPS: Fold the MiscRegFile all the way into the ISA object.
2009-07-09 20:28:39 -07:00
Gabe Black
997f36c711
Registers: Collapse ARM and MIPS regfile directories.
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--HG--
rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh
rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc
rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc
rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08 23:02:21 -07:00
Gabe Black
32daf6fc3f
Registers: Add an ISA object which replaces the MiscRegFile.
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This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
2009-07-08 23:02:20 -07:00