are replaced by sim/stats.hh and sim/stat_control.*)
dev/ns_gige.cc:
dev/sinic.cc:
Include sim/stats.hh instead of sim/sim_stats.hh
--HG--
extra : convert_revision : 5e07932eab45ae4fb719baa4f94c5f62092a8446
doesn't have its own interrupt functions
dev/ide_ctrl.hh:
oops. we don't have our own interrupt functions anymore
we get them from the base class.
--HG--
extra : convert_revision : 3eac228ec59f4fea0b0e49f961e8b21705dee27f
to add new devices. Abstract the Platform more so that
it is unnecessary to know know platform specifics for
interrupting or translating PCI DMA addresses.
dev/ide_ctrl.cc:
convert to parameter struct for initialization
use the interrupt functions in the PciDev base class
convert from tsunami to using platform
We don't need an interrupt controller here.
dev/ide_ctrl.hh:
don't use Tsunami, use Platform
make the IdeDisk a friend so that it can access my plaform
convert to parameter struct for construction
dev/ide_disk.cc:
don't use tsunami references, but platform references
dev/ns_gige.cc:
Convert to parameter struct for initialzation. Use code in
base class for interrupts so we don't need to know anything
about the platform. Don't need an IntrControl *.
dev/ns_gige.hh:
We don't need a Tsunami * anymore
convert to a parameter struct for construction
dev/pcidev.cc:
deal with new parameter struct
dev/pcidev.hh:
- Move all of the configuration parameters into a param struct
that we can pass into the constructor.
- Add a Platform * for accessing new generic interrupt post/clear
and dma address translation fuctions
- Create functions for posting/clearing interrupts and translating
dma addresses
dev/platform.cc:
have default functions that panic on pci calls
dev/platform.hh:
don't make the pci stuff pure virtual, but rather provide
default implementations that panic. Also, add dma address
translation.
dev/tsunami.cc:
this-> isn't necessary here.
add pci address translation
dev/tsunami.hh:
implement the pciToDma address translation
--HG--
extra : convert_revision : 7db27a2fa1f1bd84704921ec7ca0280b5653c43e
all macros in ev5.hh to inline functions or constant typed
variables and make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/ev5.cc:
arch/alpha/isa_desc:
dev/ns_gige.cc:
kern/tru64/tru64_events.cc:
deal with changes in ev5.hh
arch/alpha/ev5.hh:
Macros are nasty, so let's get rid of them. Convert all
all macros to inline functions or constant typed variables.
Make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/isa_traits.hh:
move some of the ev5 specific code into the isa
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
deal with isa addition
cpu/exec_context.hh:
be less isa specific and use the isa traits to figure out
what we can.
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
deal with changes in ev5.hh
I don't believe this masking is actually necessary. We should
look at removing it later.
dev/ide_ctrl.cc:
sort #includes
deal with changes in ev5.hh
--HG--
extra : convert_revision : c8a3adf0a4b1d198aefe38fc38b295abf289b08a
This added a snoopResponse callback to the caches, and a NACK to requests.
cpu/memtest/memtest.cc:
Modified to work with do_events:
No multiple requests to the same block outstanding at the same time from the same tester
Using false sharing, each tester does only 1 byte access using it's id as the blk offset
Allow for cycles before signaling deadlock, with do events it can take time to complete (NACK/blocked bus)
cpu/memtest/memtest.hh:
Updated to keep an id with each tester (used for address generation)
Updated to keep a list of outstanding address to prevent multiple outstanding per tester
//Should really look into doing store forwarding within the tester, then we can test more functionality
--HG--
extra : convert_revision : 05fbcf547e4ffab9d220aeb73126ed787ca82239
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
arch/alpha/ev5.cc:
XC -> CPU (and xc -> CPU) since we're really talking about a CPU here
Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
--HG--
extra : convert_revision : be4c0247e5834005c60a45796a222cffd327b64e
cpu/trace/opt_cpu.cc:
cpu/trace/trace_cpu.cc:
we don't want to register this cpu since it's not a real cpu
--HG--
extra : convert_revision : 3b87b6ac3dd061018909bf4fdb4e2d611128d07b
the registration stuff all moves into BaseCPU
cpu/base_cpu.cc:
Move the registration stuff into the BaseCPU since all
other CPUs use it.
cpu/base_cpu.hh:
Move the defer registration stuff into the BaseCPU since all
other CPUs use it.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
registration stuff moved to base class
sim/system.cc:
the activation of exec contexts should happen at startup, not
when they are registered.
sim/system.hh:
the system now has a startup function
--HG--
extra : convert_revision : bb6a7c2da5a1ecf5fe7ede1078200bfe5245f8ef
through the following phases.
1) Construct all param contexts
2) Call the checkParams() on each context
3) Build the configuration hierarchy
4) Construct all SimObjects
5) Initialize all SimObjects by calling init() on each one
6) Unserialize the checkpoint
7) Register all statisitcs
8) Check validity of all statistics (after that, no new stats)
9) Reset all stats.
10) Call SimStartup() which calls startup() on all SimObjects,
ParamContexts, and any other object deriving from StartupCallback
SConscript:
no more SimInit() we have SimStartup() now
sim/param.hh:
Make all params have a startup callback.
sim/sim_events.cc:
the init callbacks no longer exist. We can simplify code by
using startup().
sim/sim_object.hh:
Make all SimObjects derive from StartupCallback
--HG--
extra : convert_revision : ab81e259eb5510cc597f7bacb2bfb619fb4cc15f
sim/main.cc:
Get rid of default.ini processing... it's kind of a pain and nobody uses it.
util/tracediff:
Add comments on usage.
--HG--
extra : convert_revision : b811288b2945585d60685684ea88c99d1913fbf3
arch/alpha/isa_traits.hh:
Move defines to non full system code section so they can
be used elsewhere
cpu/simple_cpu/simple_cpu.cc:
Don't use magic numbers
cpu/simple_cpu/simple_cpu.hh:
simple format nit
--HG--
extra : convert_revision : b8d492218340d41ab9420c6ad1e81a197db1c132
base/refcnt.hh:
reorganize the RefCountingPtr a little bit to make it easier
to derive from
dev/etherpkt.hh:
this doesn't belong here. use the inet.hh stuff
dev/ns_gige.cc:
dev/ns_gige.hh:
use newer features in the tcp/ip/ethernet stuff
--HG--
extra : convert_revision : 32c1953c95655c1f4c70e0d8adedfd94beead624
clean up a few other things while we're here.
base/bitfield.hh:
base/compression/null_compression.hh:
dont #include <inttypes.hh> use "sim/host.hh"
fix #include guard
base/stats/types.hh:
dont #include <inttypes.hh> use "sim/host.hh"
kern/linux/aligned.hh:
dont #include <stdint.hh> use "sim/host.hh"
fix #include guard
kern/linux/hwrpb.hh:
fix #include guard
--HG--
extra : convert_revision : 288c687a59a1e770bbb834879173e1a2ea371bce
