Commit graph

3 commits

Author SHA1 Message Date
Gabe Black
74546aac01 Cleaned up include files and got rid of many using directives in header files.
--HG--
extra : convert_revision : 6b11e039cbc061dab75195fa1aebe6ca2cdc6f91
2006-08-15 05:07:15 -04:00
Korey Sewell
19ca97af79 This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world
succesfully but there are some minor quirks to iron out. Who would've known a DELAY SLOT introduces that much complexity?! arrgh!

Anyways, a lot of this stuff had to do with my project at MIPS and me needing to know how I was going to get this working for the MIPS
ISA. So I figured I would try to touch it up and throw it in here (I hate to introduce non-completely working components... )

src/arch/alpha/isa/mem.isa:
    spacing
src/arch/mips/faults.cc:
src/arch/mips/faults.hh:
    Gabe really authored this
src/arch/mips/isa/decoder.isa:
    add StoreConditional Flag to instruction
src/arch/mips/isa/formats/basic.isa:
    Steven really did this file
src/arch/mips/isa/formats/branch.isa:
    fix bug for uncond/cond control
src/arch/mips/isa/formats/mem.isa:
    Adjust O3CPU memory access to use new memory model interface.
src/arch/mips/isa/formats/util.isa:
    update LoadStoreBase template
src/arch/mips/isa_traits.cc:
    update SERIALIZE partially
src/arch/mips/process.cc:
src/arch/mips/process.hh:
    no need for this for NOW. ASID/Virtual addressing handles it
src/arch/mips/regfile/misc_regfile.hh:
    add in clear() function and comments for future usage of special misc. regs
src/cpu/base_dyn_inst.hh:
    add in nextNPC variable and supporting functions.

    add isCondDelaySlot function

    Update predTaken and mispredicted functions
src/cpu/base_dyn_inst_impl.hh:
    init nextNPC
src/cpu/o3/SConscript:
    add MIPS files to compile
src/cpu/o3/alpha/thread_context.hh:
    no need for my name on this file
src/cpu/o3/bpred_unit_impl.hh:
    Update RAS appropriately for MIPS
src/cpu/o3/comm.hh:
    add some extra communication variables to aid in handling the
    delay slots
src/cpu/o3/commit.hh:
    minor name fix for nextNPC functions.
src/cpu/o3/commit_impl.hh:
src/cpu/o3/decode_impl.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue_impl.hh:
src/cpu/o3/rename_impl.hh:
    Fix necessary variables and functions for squashes with delay slots
src/cpu/o3/cpu.cc:
    Update function interface ...

    adjust removeInstsNotInROB function to recognize delay slots insts
src/cpu/o3/cpu.hh:
    update removeInstsNotInROB
src/cpu/o3/decode.hh:
    declare necessary variables for handling delay slot
src/cpu/o3/dyn_inst.hh:
    Add in MipsDynInst
src/cpu/o3/fetch.hh:
src/cpu/o3/iew.hh:
src/cpu/o3/rename.hh:
    declare necessary variables and adjust functions for handling delay slot
src/cpu/o3/inst_queue.hh:
src/cpu/simple/base.cc:
    no need for my name here
src/cpu/o3/isa_specific.hh:
    add in MIPS files
src/cpu/o3/scoreboard.hh:
    dont include alpha specific isa traits!
src/cpu/o3/thread_context.hh:
    no need for my name here, i just rearranged where the file goes
src/cpu/static_inst.hh:
    add isCondDelaySlot function
src/cpu/o3/mips/cpu.cc:
src/cpu/o3/mips/cpu.hh:
src/cpu/o3/mips/cpu_builder.cc:
src/cpu/o3/mips/cpu_impl.hh:
src/cpu/o3/mips/dyn_inst.cc:
src/cpu/o3/mips/dyn_inst.hh:
src/cpu/o3/mips/dyn_inst_impl.hh:
src/cpu/o3/mips/impl.hh:
src/cpu/o3/mips/params.hh:
src/cpu/o3/mips/thread_context.cc:
src/cpu/o3/mips/thread_context.hh:
    MIPS file for O3CPU...mirrors ALPHA definition

--HG--
extra : convert_revision : 9bb199b4085903e49ffd5a4c8ac44d11460d988c
2006-07-23 13:39:42 -04:00
Kevin Lim
f3d74759ca Split off instantiation into separate CC files for each of the models. This makes it easier to be able to specify only certain CPU models.
src/cpu/SConscript:
    Split off instantiations into separate CC files.  This makes it easier to split them per CPU model.
src/cpu/base_dyn_inst_impl.hh:
    Move instantations out of impl.hh file and into a cc file.
src/cpu/checker/cpu_impl.hh:
    Move instantiations over to .cc files inside each CPU's directory.  Makes it easier to only use what's actually included.
src/cpu/o3/bpred_unit.cc:
    Pull Ozone instantiations out of this .cc file; put them into the ozone's CC file.
src/cpu/o3/checker_builder.cc:
    Instantiate Checker for O3 CPU.
src/cpu/ozone/checker_builder.cc:
    Instantiate Checker for Ozone CPU.

--HG--
rename : src/cpu/base_dyn_inst.cc => src/cpu/base_dyn_inst_impl.hh
rename : src/cpu/checker/cpu.cc => src/cpu/checker/cpu_impl.hh
rename : src/cpu/checker/o3_builder.cc => src/cpu/o3/checker_builder.cc
rename : src/cpu/checker/ozone_builder.cc => src/cpu/ozone/checker_builder.cc
extra : convert_revision : 4e5f928b165379c06d31071c544ea46cf0b8fa71
2006-06-17 21:39:25 -04:00
Renamed from src/cpu/base_dyn_inst.cc (Browse further)