Commit graph

2682 commits

Author SHA1 Message Date
Steve Reinhardt
aa2bb4f7b9 Get rid of useless m5_assert macro.
Its only purpose was to print the cycle number but that already
happens in the SIGABRT handler.  No one used it anyway.
2008-07-15 14:38:51 -04:00
Steve Reinhardt
8e7ddce284 Use ReadResp instead of LoadLockedResp for LoadLockedReq responses. 2008-07-15 14:38:51 -04:00
Steve Reinhardt
6262e0d909 Add missing newlines to Bus DPRINTFs. 2008-07-15 14:38:51 -04:00
Nathan Binkert
f9a597ddf3 m5ops: clean up the m5ops stuff.
- insert warnings for deprecated m5ops
- reserve opcodes for Ali's stuff
- remove code for stuff that has been deprecated forever
- simplify m5op_alpha
2008-07-11 08:52:50 -07:00
Nathan Binkert
88766f7c71 style: fix indentation and formatting of the pseudo insts. 2008-07-11 08:52:50 -07:00
Nathan Binkert
f90b08a5cc eventq: change the event datastructure back to LIFO.
The status quo is preferred since it is less likely that people will
rely on LIFO than FIFO, and when we move to a parallelized M5, no
ordering between events of the same time/priority will be guaranteed.
2008-07-11 08:48:50 -07:00
Nathan Binkert
10df68dd72 eventq: new eventq data structure. The new data structure is singly
linked list sorted by time and priority.  For things of the same time
and priority, a second, circularly linked list maintains the data
structure.  Events of the same time and priority are now inserted in
FIFO order instead of LIFO order.  This dramatically improves the
performance of systems that schedule multiple events at the same time.

The FIFO order version is not preferred to LIFO (because it may cause
people to rely on it), but I'm going to commit it anyway and
immediately commit the preferred LIFO version on top.
2008-07-11 08:38:31 -07:00
Nathan Binkert
93517dd90c eventq: Clean up the Event class so that it uses fewer bytes. This
will hopefullly allow it to fit in a cache line.
2008-07-10 21:35:42 -07:00
Ali Saidi
7a83c50a59 Fix cases where RADV interrupt timer is used and make ITR interrupt moderation not always delay if no interrupts have been posted for the ITR value. 2008-07-01 10:30:08 -04:00
Ali Saidi
a4a7a09e96 Remove delVirtPort() and make getVirtPort() only return cached version. 2008-07-01 10:25:07 -04:00
Ali Saidi
c5fbbf376a Change everything to use the cached virtPort rather than created their own each time.
This appears to work, but I don't want to commit it until it gets tested a lot more.
I haven't deleted the functionality in this patch that will come later, but one question
is how to enforce encourage objects that call getVirtPort() to not cache the virtual port
since if the CPU changes out from under them it will be worse than useless. Perhaps a null
function like delVirtPort() is still useful in that case.
2008-07-01 10:24:19 -04:00
Ali Saidi
50e3e50e1a Make the cached virtPort have a thread context so it can do everything that a newly created one can. 2008-07-01 10:24:16 -04:00
Ali Saidi
9bd0bfe559 After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFraction statistic is really wrong.
The notIdleFraction statistic isn't updated when the statistics reset, probably because the cpu Status information
was pulled into the atomic and timing cpus. This changeset pulls Status back into the BaseSimpleCPU object. Anyone
care to comment on the odd naming of the Status instance? It shouldn't just be status because that is confusing
with Port::Status, but _status seems a bit strage too.
2008-07-01 10:24:09 -04:00
Steve Reinhardt
96bbccc36b Automated merge after backout. 2008-06-28 13:20:00 -04:00
Steve Reinhardt
caaac16803 Backed out changeset 94a7bb476fca: caused memory leak. 2008-06-28 13:19:38 -04:00
Ali Saidi
3205768ea5 Automated merge with http://repo.m5sim.org/m5-stable 2008-06-24 15:51:12 -04:00
Ali Saidi
57b5de6b9f Checkpoinging/SWIG: Undo part of changeset 5464 since it broke checkpointing. 2008-06-24 15:48:45 -04:00
Gabe Black
18c83be507 SimObject: Add in missing includes of <string> and fix minor style problem. 2008-06-21 14:23:58 -04:00
Steve Reinhardt
1434b86943 Make bus address conflict error more informative 2008-06-21 01:06:27 -04:00
Steve Reinhardt
6b45238316 Generate more useful error messages for unconnected ports.
Force all non-default ports to provide a name and an
owner in the constructor.
2008-06-21 01:04:43 -04:00
Nathan Binkert
c1584e4227 imported patch sim_object_params.diff 2008-06-18 12:07:15 -07:00
Nathan Binkert
67a33eed40 AtomicSimpleCPU: Separate data stalls from instruction stalls.
Separate simulation of icache stalls and dat stalls.
2008-06-18 10:15:21 -07:00
Nathan Binkert
1099a9838a Ethernet: share statistics between all ethernet devices and apply some
of those statistics to the e1000 model.
2008-06-17 22:22:44 -07:00
Nathan Binkert
87d03d00cd inet: initialization fixes.
Make sure variables are properly initialized and also make sure that
truth testing works properly.
2008-06-17 22:14:12 -07:00
Nathan Binkert
8042b8f4c7 PacketFifo: Get slack out of the EthPacketData structure. This allows
a packet to exist in multiple FIFOs if desired.
2008-06-17 21:34:27 -07:00
Nathan Binkert
163465ac08 ThreadState: Ensure that kernelStats is properly initialized 2008-06-17 21:11:20 -07:00
Nathan Binkert
9dc4e2952c rename MipsConsole to MipsBackdoor
--HG--
rename : src/dev/mips/MipsConsole.py => src/dev/mips/MipsBackdoor.py
rename : src/dev/mips/console.cc => src/dev/mips/backdoor.cc
rename : src/dev/mips/console.hh => src/dev/mips/backdoor.hh
2008-06-17 20:39:51 -07:00
Nathan Binkert
934523c3a0 rename AlphaConsole to AlphaBackdoor
--HG--
rename : src/dev/alpha/AlphaConsole.py => src/dev/alpha/AlphaBackdoor.py
rename : src/dev/alpha/console.cc => src/dev/alpha/backdoor.cc
rename : src/dev/alpha/console.hh => src/dev/alpha/backdoor.hh
2008-06-17 20:36:39 -07:00
Nathan Binkert
6ff4539901 Change the default output filename for the terminal so it's more obvious.
--HG--
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.drivesys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.testsys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal
2008-06-17 20:30:37 -07:00
Nathan Binkert
00df9016fe Rename SimConsole to Terminal since it makes more sense
--HG--
rename : src/dev/SimConsole.py => src/dev/Terminal.py
rename : src/dev/simconsole.cc => src/dev/terminal.cc
rename : src/dev/simconsole.hh => src/dev/terminal.hh
2008-06-17 20:29:06 -07:00
Nathan Binkert
fa8f91fdc0 physmem: Add a null option to physical memory so it doesn't store data. 2008-06-15 21:39:29 -07:00
Nathan Binkert
e3c267a3db port: Clean up default port setup and port switchover code. 2008-06-15 21:34:32 -07:00
Nathan Binkert
b429b1759d params: Prevent people from setting attributes on vector params. 2008-06-15 21:26:33 -07:00
Nathan Binkert
6dedc645f7 add compile flags to m5 2008-06-15 20:56:35 -07:00
Nathan Binkert
b2036bfda8 Command line option to print out List of SimObjects and their parameters 2008-06-14 21:51:08 -07:00
Nathan Binkert
bbeb8082a5 main: add .m5/options.py processing. This file is processed before
arguments are parsed so that they can change the default options for
various config parameters.
2008-06-14 21:16:00 -07:00
Nathan Binkert
fc48d1dcf5 Add .m5 configuration directory 2008-06-14 21:15:59 -07:00
Nathan Binkert
779c31077c python: Separate the options parsing stuff. Remove options parsing stuff from
main.py so things are a bit more obvious.
2008-06-14 21:15:58 -07:00
Nathan Binkert
4afdc40d70 params: Fix the memory bandwidth parameter 2008-06-14 20:42:45 -07:00
Nathan Binkert
3d2e7797cc params: Fix floating point parameters 2008-06-14 20:39:31 -07:00
Nathan Binkert
f82d4e2364 python: Move various utility classes into a new m5.util package so
they're all in the same place.  This also involves having just one
jobfile.py and moving it into the utils directory to avoid
duplication.  Lots of improvements to the utility as well.

--HG--
rename : src/python/m5/attrdict.py => src/python/m5/util/attrdict.py
rename : util/pbs/jobfile.py => src/python/m5/util/jobfile.py
rename : src/python/m5/util.py => src/python/m5/util/misc.py
rename : src/python/m5/multidict.py => src/python/m5/util/multidict.py
rename : util/stats/orderdict.py => src/python/m5/util/orderdict.py
2008-06-14 20:19:49 -07:00
Nathan Binkert
fe325c7f43 MemReq: Add option to reset the time on a request. 2008-06-14 19:39:01 -07:00
Nathan Binkert
ce43e46576 Fix various SWIG warnings 2008-06-14 12:57:21 -07:00
Nathan Binkert
7a58b5a38a Add missing dependencies on .i files 2008-06-14 12:10:50 -07:00
Nathan Binkert
2d037682ff scons: proper fix for hg version stuff 2008-06-14 10:30:18 -07:00
Nathan Binkert
fe4fd9f414 scons: fix program_info.cc generation 2008-06-13 17:34:22 -07:00
Steve Reinhardt
dace77dc4a Automated merge with ssh://m5sim.org//repo/m5 2008-06-13 01:59:10 -04:00
Steve Reinhardt
caccbd1edc Get rid of bogus bus assertion.
It runs out that if a MemObject turns around and does a send in its
receive callback, and there are other sends already scheduled, then
it could observe a state where it's not at the head of the list but
the bus's sendEvent is not scheduled (because we're still in the
middle of processing the prior sendEvent).
2008-06-13 01:33:49 -04:00
Steve Reinhardt
024ec4c5c3 Get rid of bogus cache assertion.
I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.
2008-06-13 01:29:20 -04:00
Ali Saidi
907b28cc62 HG: Add compiled hg revision and date to the standard M5 output. 2008-06-13 01:09:04 -04:00
Gabe Black
2b4874449c Alpha: Get rid of an old include of a non-existant file. 2008-06-12 01:54:21 -04:00
Gabe Black
7be8e671f1 Params: Allow nested namespaces in cxx_namespace 2008-06-12 01:00:29 -04:00
Gabe Black
5b5875341c X86: Make the cpuid processor identifier return a real string. 2008-06-12 01:00:19 -04:00
Gabe Black
c625cf0ae1 X86: Make the code compile as 32 bit. 2008-06-12 01:00:05 -04:00
Gabe Black
23c04b8c66 Params: Remove an unnecessary include. 2008-06-12 00:59:58 -04:00
Gabe Black
bceaa257a3 X86: Make the e820 table manually or automatically configurable from python. 2008-06-12 00:58:36 -04:00
Gabe Black
4f4ff17578 X86: Make the disassembly for halt conform with the other microops. 2008-06-12 00:58:27 -04:00
Gabe Black
31d40ad7c2 X86: Implement and hook up STI and CLI instructions. 2008-06-12 00:58:19 -04:00
Gabe Black
da20c0ec54 X86: Make sure there's something to catch when the kernel messes with ports "behind" the pci config magic ports. 2008-06-12 00:58:13 -04:00
Gabe Black
1f5b992b58 X86: Make the platform object initialize channel 0 of the PIT. 2008-06-12 00:56:54 -04:00
Gabe Black
16e26fbf03 X86: Hook the speaker device to the pit device. 2008-06-12 00:56:17 -04:00
Gabe Black
da7f512067 Timer: Fill out the periodic modes a little. 2008-06-12 00:56:07 -04:00
Gabe Black
4f9a0402f6 Dev: Seperate the 8254 timer from tsunami and use it in that and the PC. 2008-06-12 00:54:48 -04:00
Gabe Black
0368ccdeda BitUnion: Take out namespace declaration so bitunions can be declared inside classes. 2008-06-12 00:54:32 -04:00
Gabe Black
81936ae2ed X86: Add an event for the apic timer timeout. It doesn't get used yet. 2008-06-12 00:54:19 -04:00
Gabe Black
6b8d0363ee X86: Rename the divide count register to divide configuration. 2008-06-12 00:54:12 -04:00
Gabe Black
b10742ee2b X86: Make the apic isr and irr work. 2008-06-12 00:54:05 -04:00
Gabe Black
69000baef3 X86: Make the apic task priority register work. 2008-06-12 00:54:01 -04:00
Gabe Black
e9c481ea4a X86: Make the logical destination and destination format work. 2008-06-12 00:53:50 -04:00
Gabe Black
ed23a4970b X86: Make the apic ID register work. 2008-06-12 00:53:43 -04:00
Gabe Black
8a6723e038 X86: Make the apic version register work. 2008-06-12 00:53:37 -04:00
Gabe Black
8d2416c6e9 X86: Implement a partial, sort of correct version of the protected mode variant of iret. 2008-06-12 00:53:01 -04:00
Gabe Black
66f54a6037 X86: Change how segment loading is performed. 2008-06-12 00:52:12 -04:00
Gabe Black
129831c116 X86: Make pushes and pops use the stack size instead of the data size. 2008-06-12 00:51:57 -04:00
Gabe Black
b05299253f X86: In non 64bit mode, throw a fault when a NULL segment is accessed. 2008-06-12 00:51:50 -04:00
Gabe Black
a8384311d5 X86: Take advantage of the new meta register. 2008-06-12 00:51:14 -04:00
Gabe Black
d4e7c7edd3 X86: Keep handy values like the operating mode in one register. 2008-06-12 00:50:25 -04:00
Gabe Black
fa7c81c6df X86: Change what the microop chks does.
Instead of computing the segment descriptor address, this now checks if a
selector value/descriptor are legal for a particular purpose.
2008-06-12 00:50:10 -04:00
Gabe Black
6bd9cf3594 X86: Add a microop to read a segments attribute register. 2008-06-12 00:50:05 -04:00
Gabe Black
e0c20386ac X86: Add microops and supporting code to manipulate the whole rflags register. 2008-06-12 00:49:50 -04:00
Gabe Black
2bb8933f78 X86: Add microops which panic, fatal, warn, and warn_once. 2008-06-12 00:49:25 -04:00
Gabe Black
bbc1f394ff X86: Truncate descriptors to 16 bits. 2008-06-12 00:49:16 -04:00
Gabe Black
6106b05b6e X86: Redo BSF. 2008-06-12 00:48:58 -04:00
Gabe Black
dfc2d44ea3 X86: Flesh out 3dnow instruction decoding a bit and grab the byte immediate. 2008-06-12 00:48:46 -04:00
Gabe Black
de6eeaaa27 X86: Make string instructions work when rcx=0. 2008-06-12 00:48:15 -04:00
Gabe Black
8688ef3fe5 X86: Have all 8 machine check registers since the kernel assumes they're there. 2008-06-12 00:48:02 -04:00
Gabe Black
a8e3001df8 X86: Bypass unaligned access support for register addressed MSRs. 2008-06-12 00:47:25 -04:00
Gabe Black
b3e55339f9 X86: Remove enforcement of APIC register access alignment. Panic if more than one register is accessed at a time. 2008-06-12 00:46:22 -04:00
Gabe Black
8e2991b529 X86: Fix the implementation of BSF. 2008-06-12 00:46:04 -04:00
Gabe Black
16e189fad2 X86: Bit scan forward/reverse were accidentally transposed. 2008-06-12 00:45:52 -04:00
Gabe Black
254cc07650 X86: Fix a byte register indexing issue in the sign extending move from memory microcode. 2008-06-12 00:45:22 -04:00
Gabe Black
8501a90f59 X86: Add in some support for the tsc register. 2008-06-12 00:39:10 -04:00
Gabe Black
d093fcb079 CPU: Make the simple cpu trace data for loads/stores. 2008-06-12 00:35:50 -04:00
Ali Saidi
5797ff1016 X86: Fix building on *BSD hosts 2008-06-11 10:54:12 -04:00
Ali Saidi
fd3e661cd3 SCons: Fix more SCons version issues 2008-06-11 10:54:08 -04:00
Ali Saidi
f5e36d156d IGbE: Implement sending packet that is contained in more than 2 descriptors.
--HG--
extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
2008-05-20 16:06:56 -04:00
Stephen Hines
b7af65f414 SCons: Fixing SCons bug 2006 issues for non-alpha ISAs
--HG--
extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
2008-05-20 14:04:53 -04:00
Ali Saidi
e71a5270a2 Make sure that output files are always checked success before they're used.
Make OutputDirectory::resolve() private and change the functions using
resolve() to instead use create().

--HG--
extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
2008-05-15 19:10:26 -04:00
Ali Saidi
4a4317ae18 SCons: More scons fixing for SCons bug 2006
--HG--
extra : convert_revision : d3656ab1e3c18251d4bcf6f5a31103d4b2dfdc43
2008-05-06 16:22:14 -04:00
Ali Saidi
8af6dc118c SCons: add comments to SConscript documenting bug workaround
--HG--
extra : convert_revision : e6cdffe953d56b96c76c7ff14d2dcc3de3ccfcc3
2008-04-10 15:38:10 -04:00
Ali Saidi
fe12f38353 PhysicalMemory: Add parameter for variance in memory delay.
--HG--
extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
2008-04-10 14:44:52 -04:00
Ali Saidi
ed27c4c521 SCons: Manually specifying header only directories with Dir() works around the problem
--HG--
extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3
2008-04-08 11:08:26 -04:00
Ali Saidi
1605fbebc8 IGbE: Fix bug that limits wire performance a bit
--HG--
extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
2008-03-25 15:58:54 -04:00
Steve Reinhardt
ba1f7d31e0 Automated merge with ssh://daystrom.m5sim.org//repo/m5
--HG--
extra : convert_revision : 7922848bb1145bcb2ee07d672d21cfe2dd98fc03
2008-03-25 10:04:52 -04:00
Steve Reinhardt
29be31ce31 Fix handling of writeback-induced writebacks in atomic mode.
--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
2008-03-25 10:01:21 -04:00
Gabe Black
93dd1978a7 X86: Put an RTC into the CMOS part of the southbridge.
--HG--
extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3
2008-03-25 02:15:23 -04:00
Gabe Black
e5bdae15f3 Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.
--HG--
extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
2008-03-25 02:15:06 -04:00
Gabe Black
af9a57566a X86: Turn #defines into consts.
--HG--
extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa
2008-03-25 02:09:18 -04:00
Gabe Black
48409ca512 X86: Start implementing the south bridge stuff.
--HG--
extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
2008-03-25 02:08:54 -04:00
Gabe Black
b0c52885ce X86: Change the Opteron platform to be the PC platform.
--HG--
extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
2008-03-25 02:06:53 -04:00
Steve Reinhardt
623dd7ed3a Delete the Request for a no-response Packet
when the Packet is deleted, since the requester
can't possibly do it.

--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
2008-03-24 01:08:02 -04:00
Steve Reinhardt
93ab43288a Don't FastAlloc MSHRs since we don't allocate them on the fly.
--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
2008-03-24 01:08:02 -04:00
Steve Reinhardt
627592c2f2 Add FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct options.
--HG--
extra : convert_revision : 56a7f646f2ac87019c78ba7fa62c5f4bdc00ba44
2008-03-24 01:08:02 -04:00
Steve Reinhardt
407710d387 Fix cache problem with writes to tempBlock
getting wrong writeback address.

--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
2008-03-22 22:17:15 -04:00
Gabe Black
3fe1af7952 MIPS: Check endianness of binaries in SE mode.
--HG--
extra : convert_revision : e6c4bda6078eb68a26f8834411f744078c6bf5a9
2008-03-20 02:10:21 -04:00
Steve Reinhardt
b051ae6acc Fix a few Packet memory leaks.
--HG--
extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a
2008-03-17 03:08:28 -04:00
Steve Reinhardt
131c65f429 Restructure bus timing calcs to cope with pkt being deleted by target.
--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
2008-03-17 03:07:38 -04:00
Steve Reinhardt
19c367fa8f Fix subtle cache bug where read could return stale data
if a prior write miss arrived while an even earlier
read miss was still outstanding.

--HG--
extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
2008-03-15 05:03:55 -07:00
Gabe Black
50946b1673 Merge
--HG--
extra : convert_revision : ec5f41b2007ade15f6f4c4a1533e50f9cba2798e
2008-03-06 21:09:15 -05:00
Gabe Black
a245b0eedf X86: Refine the local APIC.
--HG--
extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2
2008-03-06 20:37:28 -05:00
Vilas Sridharan
21fd15ad9a O3CPU: Don't call dumpInsts if DEBUG is not defined
--HG--
extra : convert_revision : 3194bde4c624d118969bfbf92282539963a72245
2008-03-06 00:27:09 -05:00
Gabe Black
66aaabf4ae X86: Don't map the local APIC into the physical address space in SE mode.
--HG--
extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208
2008-03-01 00:05:12 -05:00
Steve Reinhardt
19dfde2317 Automated merge with ssh://daystrom.m5sim.org//repo/m5
--HG--
extra : convert_revision : f4bcd342e7abb86ca83840b723e6ab0b861ecf5b
2008-02-27 18:18:56 -05:00
Korey Sewell
8fb74c238c Add comments in code to describe bug conditions.
This should help if somebody gets to the bug
fix before me (or someone else)...

--HG--
extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2
2008-02-27 17:50:29 -05:00
Korey Sewell
b45cf21a8e Fix Load/Store Queue squashing after a SMT thread is removed but ensuring
you are squashing from the current instruction # causing the thread exit.

--HG--
extra : convert_revision : ccbeece7dd1d5fee43f30ab19370908972113473
2008-02-27 16:53:08 -05:00
Korey Sewell
34715cc691 Fix offset in removeThread() function so that float registers start freeing up
from the right point (#32 usually) instead of restarting at 0 and double-freeing.

Commented out assert line in free_list.hh that will check for when double-free condition
goes bad.

--HG--
extra : convert_revision : 08d5f9b6a874736e487d101e85c22aaa67bf59ae
2008-02-27 16:48:33 -05:00
Steve Reinhardt
e6d6adc731 Revamp cache timing access mshr check to make stats sane again.
--HG--
extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea
2008-02-26 22:03:28 -08:00
Rick Strong
fcfc8b8c4f Configs: Make using Simpoints easier with some config files that support them easily
--HG--
extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
2008-02-27 00:35:09 -05:00
Gabe Black
43ecce5fda X86: Put in initial implementation of the local APIC.
--HG--
extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
2008-02-26 23:39:53 -05:00
Gabe Black
98d2ca403e X86: Implement the INVLPG instruction and the TIA microop.
--HG--
extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2008-02-26 23:39:22 -05:00
Gabe Black
8b4796a367 TLB: Make a TLB base class and put a virtual demapPage function in it.
--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
2008-02-26 23:38:51 -05:00
Gabe Black
7bde0285e5 X86: Get PCI config space to work, and adjust address space prefix numbering scheme.
--HG--
extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
2008-02-26 23:38:01 -05:00
Steve Reinhardt
bdf3323915 Cache: better comments particularly regarding writeback situation.
--HG--
extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362
2008-02-26 20:17:26 -08:00
Gabe Black
ec1a4cbbc7 Bus: Fix the bus timing to be more realistic.
--HG--
extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc
2008-02-26 02:20:08 -05:00
Steve Reinhardt
4597a71cef Make L2+ caches allocate new block for writeback misses
instead of forwarding down the line.

--HG--
extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
2008-02-16 14:58:03 -05:00
Ali Saidi
9faec83ac5 CPU: move the PC Events code to a place where the code won't be executed multiple times if an instruction faults.
--HG--
extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68
2008-02-14 16:14:35 -05:00
Ali Saidi
a33a3f7c55 Update copyright dates
--HG--
extra : convert_revision : 547e7ddff6b8005a9eaad60970bc51984e84fcd1
2008-02-11 12:35:28 -05:00
Steve Reinhardt
71835d42df Automated merge with file:/home/stever/hg/m5-orig
--HG--
extra : convert_revision : 86a55cd98a9704f756a70aa0cbd2820cf92c821d
2008-02-11 08:31:26 -08:00
Steve Reinhardt
2f7421b12b EXTRAS now points to src instead of needing 'src' subdir.
--HG--
extra : convert_revision : 8e7e4516ace8c7852eeea3c479bfd567839a8061
2008-02-11 08:04:01 -08:00
Nicolas Zea
4c7eb21119 Bus: Only update port cache when there is an item to update it with.
--HG--
extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8
2008-02-10 19:41:03 -05:00
Ali Saidi
d167e2bb97 IGbE: Fix a couple of bugs.
--HG--
extra : convert_revision : a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca
2008-02-10 19:32:12 -05:00
Steve Reinhardt
9d7a69c582 Fix #include lines for renamed cache files.
--HG--
extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5
2008-02-10 14:45:25 -08:00
Steve Reinhardt
d56e77c180 Rename cache files for brevity and consistency with rest of tree.
--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62
2008-02-10 14:15:42 -08:00
Stephen Hines
6cc1573923 Make the Event::description() a const function
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-06 16:32:40 -05:00
Stephen Hines
0ccf9a2c37 Add base ARM code to M5
--HG--
extra : convert_revision : d811bf87d1a0bfc712942ecd3db1b48fc75257af
2008-02-05 23:44:13 -05:00
Steve Reinhardt
b96631e1a0 Cleaned up os.path imports a bit.
--HG--
extra : convert_revision : ee75bf9abd249ab053e804739cc50972475cd5b6
2008-02-05 17:43:45 -08:00
Steve Reinhardt
d725ff450d Make EXTRAS work for SConsopts too.
Requires pushing source files down into 'src' subdir relative
to directory listed in EXTRAS.

--HG--
extra : convert_revision : ca04adc3e24c60bd3e7b63ca5770b31333d76729
2008-02-05 17:40:08 -08:00
Gabe Black
ca313e2303 X86: Put an SMBios/DMI table in memory.
This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.

--HG--
extra : convert_revision : c1610c0dfa211b7e0d091a04133695d84f500a1c
2008-01-23 15:28:54 -05:00
Gabe Black
423bbe6499 X86: Optomize the bit scanning instruction microassembly a little. More can be done.
--HG--
extra : convert_revision : 3cf6e972f0e41e3529a633ecbb31289e1bd17f0f
2008-01-23 08:18:27 -05:00
Gabe Black
60c2d98fc0 X86: Implement and attach the BSR and BSF instructions.
--HG--
extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908
2008-01-22 00:10:33 -05:00
Gabe Black
f809637011 X86: Fill out group17 in the decoder.
--HG--
extra : convert_revision : 66ab9c0fc3086f66e3d6d82d47964ecf406c3a8a
2008-01-21 16:27:40 -05:00
Gabe Black
657b52fea1 X86: Use the existing boot_osflags instead of duplicating it.
--HG--
extra : convert_revision : e04e438d7d261a61c52b946c23cd126ed648814a
2008-01-21 04:32:34 -05:00
Ke Meng
0b6876a0c0 The reason is that the event is supposed to put the instructions ready to execute for next cycle. And the FUCompletion event has a lower priority than CPU tick event. It is called after the iew->tick() for current cycle has already been executed and the issueToExecuteQueue has already advanced this time. And assume the issueToExecuteLatency is 1, to catch up, the increasement should be made at access(-1) instead of access(0). Otherwise I found it could increase the actual op_latency of the instructions to execute by 1 cycle and potentially put the simulated CPU into a permanent idle state.
Signed-off by: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : dafc16814383e8e8f8320845edf6ab2bcfed1e1d
2008-01-14 11:47:32 -05:00
Gabe Black
c08b7802a9 X86: Redo the bit test instructions.
--HG--
extra : convert_revision : 433c2a9f3675ed02f3be5ce759a440f2686d2ccd
2008-01-12 06:41:32 -05:00
Gabe Black
b705eba6e5 X86: Fix the wrmsr instruction.
--HG--
extra : convert_revision : 12bc7e71226ebafb8eedadf6a3db82929e15e722
2008-01-12 06:40:55 -05:00
Gabe Black
0ee67d4210 X86: Make the effective segment base shadow the regular one, not the selector.
--HG--
extra : convert_revision : 498c7c16d664c784b196885b1f35c3c6386c9cfc
2008-01-12 06:40:10 -05:00
Gabe Black
223e48e6ae X86: Make the IO ports work using extra physical address lines. Add a serial port.
--HG--
extra : convert_revision : a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6
2008-01-12 06:39:15 -05:00
Gabe Black
0e394fdfa4 X86: Fix the general IO instructions dataSize.
--HG--
extra : convert_revision : 9774a52cb6a8e7632d1b1dc0706e5791cc18d238
2008-01-12 06:37:35 -05:00
Geoffrey Blake
f9c54d5a4b Temporary fix for ll/sc bug see flyspray task for more info:
http://www.m5sim.org/flyspray/task/197

Signed-off by: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81
2008-01-06 00:19:45 -05:00
Steve Reinhardt
6c5a3ab8b2 Add ReadRespWithInvalidate to handle multi-level coherence situation
where we defer a response to a read from a far-away cache A, then later
defer a ReadExcl from a cache B on the same bus as us.  We'll assert
MemInhibit in both cases, but in the latter case MemInhibit will keep
the invalidation from reaching cache A.  This special response tells
cache A that it gets the block to satisfy its read, but must immediately
invalidate it.

--HG--
extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b
2008-01-02 15:22:38 -08:00
Steve Reinhardt
bf9b3821bd Mark cache-to-cache MSHRs as downstreamPending when necessary.
Don't mark upstream MSHR as pending if downstream MSHR is already in service.

--HG--
extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f
2008-01-02 15:18:33 -08:00
Steve Reinhardt
538da9e24d Don't DPRINTF in the middle of a PrintReq.
--HG--
extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb
2008-01-02 14:42:42 -08:00
Steve Reinhardt
87e5fd1755 Bug fix: functional cache port now needs otherPort set.
--HG--
extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548
2008-01-02 14:42:24 -08:00
Steve Reinhardt
cde5a79eab Additional comments and helper functions for PrintReq.
--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
2008-01-02 13:46:22 -08:00
Steve Reinhardt
3952e41ab1 Add functional PrintReq command for memory-system debugging.
--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7
2008-01-02 12:20:15 -08:00
Steve Reinhardt
659aef3eb8 Fix formatting and comments in cache_impl.hh
--HG--
extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41
2008-01-02 12:15:48 -08:00
Gabe Black
2cb7d4f068 SPARC: Fix a bug where the TLB would match against the wrong entries.
--HG--
extra : convert_revision : 631b3b6a1416121b54bd9717ca1cdccdd5b8a1eb
2008-01-01 18:20:08 -05:00
Ali Saidi
45ea1549c9 Checkpointing: Fix a bug in the simulation script when restoring without standard switch and change some ifs to work with the default port since every port is now connected to something.
--HG--
extra : convert_revision : 72507cf13e58465291b0dce6322e853bee5a2b89
2007-12-18 01:52:57 -05:00
Ali Saidi
71909a50de CPU: Update where the simple cpus read their cpu id from the thread context to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.
--HG--
extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3
2007-12-16 03:48:13 -05:00
Gabe Black
27cc351688 X86: Please excuse my dear Aunt Sally. (precedence bug)
--HG--
extra : convert_revision : 9ad4f31e7a962c3177896bcbfb93e2e54720d117
2007-12-03 14:32:56 -08:00
Gabe Black
73caca57a8 X86: Make sure the memory index is calculated using the address size for bit test instructions.
--HG--
extra : convert_revision : 9634675857dae53b5e79e49267c864a0265afde1
2007-12-02 01:46:38 -08:00
Gabe Black
b5d4018382 X86: Fix a copy/paste mistake where the bit test instructions were using an immediate where they should use a register.
--HG--
extra : convert_revision : b0ee80e4c7fdb58a1eb85b3bcc82a0cdaa93330a
2007-12-02 01:46:29 -08:00
Gabe Black
62ad1d2872 X86: Make the page not present panic more descriptive.
--HG--
extra : convert_revision : 9360e47adb61e164ac218f2ea231eaa60bf3229d
2007-12-02 01:46:14 -08:00
Gabe Black
82e705d713 X86: Start setting up the real mode data structure.
--HG--
extra : convert_revision : ba6d4939d4d58da5586655c83f1617f47dc7e359
2007-12-02 00:04:31 -08:00
Gabe Black
5de71e39d8 X86: Make the 0xA0-0xA3 versions of mov use the right sized immediates.
--HG--
extra : convert_revision : a702403de29772618abb5bd5c5555279d91bdd59
2007-12-02 00:02:51 -08:00
Gabe Black
4c37f828f1 X86: Add in a missing "break".
--HG--
extra : convert_revision : 2e48d8b0292bc3b78e4caa27dec20113d40e7d74
2007-12-01 23:11:23 -08:00
Gabe Black
9805916cec X86: Actually do something for the MiscRegFile clear function.
--HG--
extra : convert_revision : 36f8abaa9d09700d8ba9e09b4a10fa4dce580f36
2007-12-01 23:10:42 -08:00
Gabe Black
42ae409746 X86: Move startup code to the system object to initialize a Linux system.
--HG--
extra : convert_revision : a4796c79f41aa8b8f38bf2f628bee8f1b3af64be
2007-12-01 23:09:56 -08:00
Gabe Black
e7fc5c42f3 X86: Add a missing microcode file to the sconscript.
--HG--
extra : convert_revision : 6da8a67e07bada169abf7f10aded8a90d4e63eae
2007-12-01 23:07:41 -08:00
Gabe Black
67fee01026 X86: Fix a copy paste error in the bts microcode.
--HG--
extra : convert_revision : c4ac007d35ac13211f9816f1104c84f2b447ddba
2007-12-01 23:06:52 -08:00
Gabe Black
988c6f227a X86: Implement mov from control register.
--HG--
extra : convert_revision : c8280f0686a3ae6d5c405327540ad15a3a5531f9
2007-12-01 23:06:03 -08:00
Gabe Black
fe833dd2c3 X86: First crack at far returns. This is grossly approximate.
--HG--
extra : convert_revision : 23da0338af1f7663ae5ddf2289fb45dd32f37c42
2007-12-01 23:05:01 -08:00
Gabe Black
dc6f960171 X86: Reorganize segmentation and implement segment selector movs.
--HG--
extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
2007-12-01 23:03:39 -08:00
Gabe Black
a548067b01 X86: Make the "fault" microop predicated.
--HG--
extra : convert_revision : ded34133afcd6af1f55b8991b82bad45258069d3
2007-12-01 23:01:56 -08:00
Gabe Black
557bc80647 X86: Implement the LIDT instruction.
--HG--
extra : convert_revision : 380515e985318311632e00b13000585afb052e3b
2007-12-01 23:01:31 -08:00
Gabe Black
62c79ca637 X86: Implement the lgdt instruction.
--HG--
extra : convert_revision : d1698a82df3c57cc9bbf8d5d190f271bfc7cb2e4
2007-12-01 23:01:17 -08:00
Gabe Black
4e3ff42762 X86: Implement wrbase and wrlimit for loading pseudo descriptors.
--HG--
extra : convert_revision : fe03c4aed95ef12773e80cdb3d9cff68a2b20f02
2007-12-01 23:00:58 -08:00
Gabe Black
bfc62d1a70 X86: Separate the effective seg base and the "hidden" seg base.
--HG--
extra : convert_revision : 5fcb8d94dbab7a7d6fe797277a5856903c885ad4
2007-12-01 23:00:15 -08:00
Gabe Black
7433032b39 SPARC: Fixes for invalidateAll and demapAll in the SPARC TLBs.
--HG--
extra : convert_revision : 8de6c60b0e3e725eac11047a9d9888097dd359ff
2007-11-30 16:49:27 -08:00
Gabe Black
38e804f7cd SPARC: Fix 32 bit register window flushing endian conversion.
--HG--
extra : convert_revision : be91d6fecb44a85e983343704a098b456948af8a
2007-11-29 20:20:18 -08:00
Gabe Black
fa5e3b47c8 SPARC: Fix the initial stack to match what the Linux kernel does.
--HG--
extra : convert_revision : a4451710d8463e52227fd8f760ab737ea8f404b5
2007-11-29 00:00:26 -08:00
Gabe Black
16e99e4677 SPARC: Combine the 64 and 32 bit process initialization code.
Alignment is done as it was for 32 bit processes.

--HG--
extra : convert_revision : 9368ad40dcc7911f8fc7ec1468c6a28aa92d196f
2007-11-29 00:00:02 -08:00
Ali Saidi
a84d9716d6 merge, no manual changes
--HG--
extra : convert_revision : 6d6b744bbdfb09e7c3092368870a4f372241f9e8
2007-11-29 00:23:14 -05:00
Rick Strong
376c7285ee Serialization: Fix serialization of file descriptors. Make sure open
file descriptors are reopened and the file pointer is in the same
place as when the checkpoint occured.

Signed-off by: Ali Saidi

--HG--
extra : convert_revision : d9d2cd388c9c02f60e1269d6845891c35f94fc47
2007-11-29 00:22:46 -05:00
Gabe Black
8a020d40d3 Make ports that aren't connected to anything fail more gracefully.
--HG--
extra : convert_revision : 3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc
2007-11-28 14:39:19 -08:00
Gabe Black
ab598eadbf imported patch pagewalker.patch
--HG--
extra : convert_revision : 8ddde313f2249e1346fa51372a156f0d2ddc3b8f
2007-11-21 00:04:15 -08:00
Gabe Black
ce26c3ccec Get rid of a file that should have never been committed.
--HG--
extra : convert_revision : c0e678ce0ce0301bb3afff8bef4fcab7aef3c6fe
2007-11-20 22:51:03 -08:00
Gabe Black
e35c4f2f08 Merge with head.
--HG--
extra : convert_revision : c4215e516c6d82ad466db898ffeefa0233ca110e
2007-11-20 15:38:54 -08:00
Gabe Black
a12d5975cc Simple CPU fix simple mistake in translateDataWriteAddr.
--HG--
extra : convert_revision : 6a6a7d05f62d9d9868be0707e4dc186a5f7ecf7d
2007-11-20 15:37:56 -08:00
Ali Saidi
ac50694d1a Serialization: Serialize SPARC PTEs last so their nameOut() calls don't interfere with other serialization in the TLB.
--HG--
extra : convert_revision : 8a8478a200cd3c65b2ac98944d1278454811d38f
2007-11-19 22:47:08 -05:00
Ali Saidi
8026ecbb8e Memory: Cache the physical memory start and size so we don't need a dynamic cast on every access.
--HG--
extra : convert_revision : d6c3e93718991e7b68248242c80d8e6ac637ac51
2007-11-19 18:23:43 -05:00
Steve Reinhardt
785eb13190 Make EXTRAS work for relative directories.
Also print a little feedback when processing EXTRAS.

--HG--
extra : convert_revision : 9cb324b0d5bc60a3c98af6495f16415b529e4af2
2007-11-16 20:10:33 -08:00
Steve Reinhardt
7d83cf35e1 Tweak check for writable block fill.
--HG--
extra : convert_revision : c04281bcfc4cd23c7613aeccb21dc74452bcc951
2007-11-16 20:10:33 -08:00
Steve Reinhardt
f03a62008a Fix bug on exclusive response to ReadReq with pending WriteReq.
--HG--
extra : convert_revision : 5429cd7ca84cf6348813a4607fa16f76aa5df7e0
2007-11-16 20:10:32 -08:00
Korey Sewell
5d23f86e98 add back in clobbered MIPS fix for g++ 4.2
--HG--
extra : convert_revision : 80ad1cc32c6e59925526abd274132e4f9e35f0c1
2007-11-17 00:02:56 -05:00
Korey Sewell
f2fea63c65 go back and fix up MIPS copyright headers
--HG--
extra : convert_revision : 886e762e13b7a05d6d8a14bde6c2a3567c32a4d1
2007-11-16 21:32:22 -05:00
Korey Sewell
52e6aa6284 move initCPU, processInterrupts declaration to core_specific file.
--HG--
extra : convert_revision : 9bc88380f05f86c68117280f555c77eb4c627d7b
2007-11-16 21:31:37 -05:00
Korey Sewell
92724490c9 Gabe's 32-bit X86 fix merge
--HG--
extra : convert_revision : 6f79c5c785c93d6caef2ec26961b652cd51e30fe
2007-11-16 19:16:01 -05:00
Gabe Black
7ffd88a54b X86: Fix 32 bit compilation.
--HG--
extra : convert_revision : d16d68731a8480080ec6b8da3ebda8567e115a30
2007-11-16 14:18:47 -08:00
Korey Sewell
923c385b97 remove unnecessary namespace
--HG--
extra : convert_revision : 8936fe2246ca659a6dfe0835f66aa8232ed427de
2007-11-15 20:52:59 -05:00
Korey Sewell
d09ab2bd22 add thread id to misc. reg functions
--HG--
extra : convert_revision : 35d073d1279947d943a0290832e09a5268dd0b76
2007-11-15 20:35:49 -05:00
Korey Sewell
7c076479e4 add MicroPC functions back to thread context
--HG--
extra : convert_revision : a9cfd2829c4aec191f5f9ec6ce7b5d1dccc92af1
2007-11-15 20:35:31 -05:00
Korey Sewell
cf9dc4b151 add microPC stuff back in. got deleted on changeset propragation somehow.
--HG--
extra : convert_revision : 5e89484b2ef21457ffba35ef959df999a28c5676
2007-11-15 19:48:53 -05:00
Korey Sewell
8f8e7fe08e put the flattenIndex stuff back in O3 AND put fatal() back in faults
--HG--
extra : convert_revision : 16fb8d7f3fbc5f8f1fc3ed34427c3d90a3125ad0
2007-11-15 16:38:09 -05:00
Korey Sewell
3110b157e6 fix MIPS headers
--HG--
extra : convert_revision : 2870a146a1be0e8c80878090f39c0eaa15d2eb13
2007-11-15 14:21:01 -05:00
Korey Sewell
641ee83e40 add core specific parameter to BaseCPU params
--HG--
extra : convert_revision : 15c5995e3acf23a45c712891fd06ef273584f7e8
2007-11-15 14:18:56 -05:00
Korey Sewell
7ba65aecaa Add CoreSpecific type to all archs
--HG--
extra : convert_revision : 659786bf6489ab6151e47fbf1f4c0a723262fce2
2007-11-15 14:17:21 -05:00
Korey Sewell
789153dff6 Get MIPS simple regression working. Take out unecessary functions "setShadowSet", "CacheOp"
--HG--
extra : convert_revision : a9ae8a7e62c27c2db16fd3cfa7a7f0bf5f0bf8ea
2007-11-15 03:10:41 -05:00
Korey Sewell
375ddf8d25 branch merge
--HG--
extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
2007-11-15 00:14:20 -05:00
Ali Saidi
7c8e4ca3a3 Checkpointing: Name SE page table entries better so that there isn't a problem if multiple workloads are being run at once.
--HG--
extra : convert_revision : 3bac9bd7fd93fcadf764e2991c5b029f2c745c08
2007-11-14 23:42:08 -05:00
Korey Sewell
2820a448e2 comment and spacing
--HG--
extra : convert_revision : b3acde37bc11919700c257eae58ea9e0f66c9786
2007-11-14 15:33:43 -05:00
Korey Sewell
5f7879a935 Get MIPS_SE actually working again by actually by fixing TLB stuff and running hello world
--HG--
extra : convert_revision : 0944e7661934baddca1f1a895af0b75be2d96b10
2007-11-14 06:24:47 -05:00
Korey Sewell
bfdd2f379b remove unnecessary debug messages I added
--HG--
extra : convert_revision : 5c23218fd1b899fa7fe42701f7cb2f6033f7a583
2007-11-14 06:18:58 -05:00
Korey Sewell
2692590049 Add in files from merge-bare-iron, get them compiling in FS and SE mode
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-11-13 16:58:16 -05:00
Gabe Black
5772e3cada X86: Make microcode use presegmentation RIPs and the rest of m5 use post segmentation RIPS.
--HG--
extra : convert_revision : d8cda7c8b9a2afb8a9d601b6d61529a96c5f87fe
2007-11-13 01:31:43 -08:00
Gabe Black
1048b548fa X86: Separate out the page table walker into it's own cc and hh.
--HG--
extra : convert_revision : cbc3af01ca3dc911a59224a574007c5c0bcf6042
2007-11-12 18:06:57 -08:00
Gabe Black
6095dceb0c Params: Fix check for cycles in the configuration and clarify the comments/error message.
--HG--
extra : convert_revision : 8f35dde408fae874bcba1a248d32a22222d98c35
2007-11-12 18:06:02 -08:00
Gabe Black
917ae9ec66 X86: Fix a stupid typo where WRMSR and RDMSR were switched, and add a debug statement.
--HG--
extra : convert_revision : f1eb17291f4c01f3c0fa8f99650bc1edf09d21de
2007-11-12 14:39:14 -08:00
Gabe Black
4950798268 X86: Implement tlb invalidation and make it happen some of the times it should.
--HG--
extra : convert_revision : 376516d33cd539fa526c834ef2b2c33069af3040
2007-11-12 14:39:07 -08:00
Gabe Black
f1f5dd79bf X86: Implement the wrcr microop which writes a control register, and some control register work.
--HG--
extra : convert_revision : 3e9daef9cdd0665c033420e5b4f981649e9908ab
2007-11-12 14:38:59 -08:00
Gabe Black
4d4d2883f9 X86: Implement some bit testing instructions.
--HG--
extra : convert_revision : 54585e276e44322be9c56af0b2eabfe8d4b3e430
2007-11-12 14:38:53 -08:00
Gabe Black
f9ddb894dd X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0.
--HG--
extra : convert_revision : 08bd7b4ff183038c016612d04ac73b20a255d141
2007-11-12 14:38:45 -08:00
Gabe Black
6d4ba8de34 X86: Flesh out the opcode groups for two byte opcodes.
--HG--
extra : convert_revision : 4d51befd6dae4035c0eb685d33e1f5e38467c766
2007-11-12 14:38:38 -08:00
Gabe Black
fce45baf17 X86: Work on the page table walker, TLB, and related faults.
--HG--
extra : convert_revision : 9edde958b7e571c07072785f18f9109f73b8059f
2007-11-12 14:38:31 -08:00
Gabe Black
f17f3d20be X86: Implement a page table walker.
--HG--
extra : convert_revision : 36bab5750100318faa9ba7178dc2e38590053aec
2007-11-12 14:38:24 -08:00
Gabe Black
7a39457d7f X86: Make the micropc available through the thread context objects.
This is necssary for fault handlers that branch to non-zero micro PCs.

--HG--
extra : convert_revision : c1cb4863d779a9f4a508d0b450e64fb7a985f264
2007-11-12 14:38:17 -08:00
Gabe Black
53cb6cbcc1 X86: Implement the startupCPU function.
--HG--
extra : convert_revision : d2331a0e0bd14863e82004508558f657c5b900a2
2007-11-12 14:38:10 -08:00
Gabe Black
d89d80a5d0 X86: Make some of the bits of CR0 do what they're supposed to.
--HG--
extra : convert_revision : 13e79ef1ef09bd842d5e075e31f98ab2a4357901
2007-11-12 14:38:02 -08:00
Gabe Black
aaa30714b3 X86: Various fixes to indexing segmentation related registers
--HG--
extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
2007-11-12 14:37:54 -08:00
Gabe Black
ada071db53 SPARC: Force %g1 to be zero on process startup even though it normally already should be.
--HG--
extra : convert_revision : 9feb63109e8c955b49c7e96acad1ad7c29a4349f
2007-11-11 17:23:22 -08:00
Gabe Black
6cfe4176f5 Alpha: Fix a long standing bug where all code ran as PAL code in FS.
--HG--
extra : convert_revision : 654a2376a601ddf91665ca627403518911b32532
2007-11-08 23:50:10 -08:00
Gabe Black
7c0076d5f3 Make non Apple compilation work again. Ali may have to refix this.
--HG--
extra : convert_revision : 0f9455643eec14034314908ee26a6d693c54a864
2007-11-08 23:42:44 -08:00
Gabe Black
46505821ec ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs.
--HG--
extra : convert_revision : 8c35891945c6b4ebc320f0c88a7a0449f3c4b4d5
2007-11-08 18:51:50 -08:00
Ali Saidi
0673029689 Compiling: Fix for 64bit compile on Darwin/OSX 10.5.
--HG--
extra : convert_revision : 1f23f7a3952f55cca8293fb43ae15db42005aeac
2007-11-08 16:11:09 -05:00
Ali Saidi
422ab8bec0 TimingSimpleCPU: Add some DPRINTFs when the cpu suspends and resumes.
--HG--
extra : convert_revision : a305cf9dcaca5ed3b97499a5e24c511f4416125a
2007-11-08 10:46:41 -05:00
Ali Saidi
cf1c25dbcc AtomicSimpleCPU: Refactor resume() code to have a cleaner control path.
--HG--
extra : convert_revision : f27bb96850e7fb0252fb1f47c3d0860705c32884
2007-11-08 10:46:41 -05:00
Ali Saidi
f4222610ea Python: Allow a range to be a python tuple/list.
--HG--
extra : convert_revision : 81cf805055e2f4d62e56a02ac82a0b230251f40b
2007-11-08 10:46:41 -05:00
Ali Saidi
11b931df6a Interrupts: Inline some code and remove duplication.
--HG--
extra : convert_revision : 0631c601f281bdd2a12ff0d0ae94576780115c2a
2007-11-08 10:46:41 -05:00
Ali Saidi
e41197a3f8 CPU: Add function to explictly compare thread contexts after copying.
--HG--
extra : convert_revision : 9b7af59a11202a91409aad7c427b7749cd1d2f12
2007-11-08 10:46:41 -05:00
Gabe Black
17e83e7f83 SPARC: Make 64 bit SPARC process initialization check checkpointRestored too.
--HG--
extra : convert_revision : 8d48f705983f31db5947c6c4ae9f0df57f413d68
2007-11-07 15:03:49 -08:00
Gabe Black
19292d3f06 O3: Remove unneeded variable.
--HG--
extra : convert_revision : 4624ccd3f08818f4632881d6aca6d1cc343bbdcf
2007-11-06 12:51:08 -08:00
Ali Saidi
d1fb5ad91e TraceFlags: Fix off-by-one error with number of traceflags.
--HG--
extra : convert_revision : 668299fc0a9083be858fe2f6e8fde512ddac9e32
2007-11-04 19:06:45 -05:00
Ali Saidi
c8123cef1b Cache: Fix for OS X 10.5 compiling.
--HG--
extra : convert_revision : ba3c33ed524367280eefc096177d767168ac2cf6
2007-11-04 18:57:36 -05:00
Ali Saidi
710f3ca3e1 SE: fix stat64 syscall on os x
--HG--
extra : convert_revision : 40b62ef73d8e408cdd35b22147860f33533db57f
2007-11-02 02:11:15 -04:00
Ali Saidi
333ac6cc32 DRAM: Make latency parameters be Param.Latency instead of ints.
--HG--
extra : convert_revision : 553b86cc4653da089d7aa0045a3f3bdcabf6c4d8
2007-11-01 17:30:50 -04:00
Steve Reinhardt
4b49bd47f4 String constant const-ness changes to placate g++ 4.2.
Also some bug fixes in MIPS ISA uncovered by g++ warnings
(Python string compares don't work in C++!).

--HG--
extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
2007-10-31 18:04:22 -07:00
Ali Saidi
71b033f4dc no manual changes
--HG--
extra : convert_revision : bfc34f3adaabcc8011bf9b22bd614ee8ebcbfd01
2007-10-31 17:53:13 -04:00
Ali Saidi
980266b0a6 Traceflags: Old traceflags.py file is no longer needed.
--HG--
extra : convert_revision : 1e88c2d9a0e2a64344d8b4d1a4474dae82473a6d
2007-10-31 17:52:56 -04:00
Steve Reinhardt
90f42bf3ad Merge in bus DPRINTF changes.
--HG--
extra : convert_revision : 3bbd7c0745b31bb2a628b604ab1627cd9c61643c
2007-10-31 00:39:16 -07:00
Ali Saidi
538fae951b Traceflags: Add SCons function to created a traceflag instead of having one file with them all.
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-31 01:21:54 -04:00
Ali Saidi
8ce31ea471 Linux Support: Finally update vptr for new memory system.
--HG--
extra : convert_revision : 8b4927431189abc12201d13428a31b746cdb7dee
2007-10-31 01:21:54 -04:00
Ali Saidi
7597f87430 Base: Rework the way M5 provides and creates random numbers.
--HG--
extra : convert_revision : 10ec3484647b3acb8e821f8520f97d535e41e861
2007-10-31 01:21:54 -04:00
Vilas Sridharan
04d1cfe31c Add constant stat.
Signed Off: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : 3da9e507117d0279e212d151d78c312fd9cf0b5c
2007-10-30 22:21:05 -04:00
Gabe Black
503fb8ebed X86: Compile fixes for 32 bit/debug/opt.
--HG--
extra : convert_revision : 591fffb316830fca5792666c8df12abd4e7c551b
2007-10-30 16:34:00 -04:00
Gabe Black
fddfa71658 TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system.
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
2007-10-25 19:04:44 -07:00
Ali Saidi
0711f4f17a SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore.
--HG--
extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
2007-10-25 20:13:35 -04:00
Gabe Black
b0e3aab5df X86: Fix X86_FS compilation.
--HG--
extra : convert_revision : 5f014337e33a9e1ebe4df4063335315539fff69e
2007-10-23 17:40:40 -07:00
Gabe Black
7d396b1bf6 X86: Use the cda microop where appropriate. The ENTER instruction still needs these.
--HG--
extra : convert_revision : c5a1a6d66c454f252d3b798c38a6798e7dd486f0
2007-10-22 14:39:40 -07:00
Gabe Black
421aea980f X86: Implement the cda microop which checks if an address is legal to write to.
--HG--
extra : convert_revision : afe20649180dd59ad0702b98f7293be6c9226359
2007-10-22 14:30:56 -07:00
Gabe Black
93da9eb7f6 CPU: Add functions to the "ExecContext"s that translate a given address.
--HG--
extra : convert_revision : 7d898c6b6b13094fd05326eaa0b095a3ab132397
2007-10-22 14:30:45 -07:00
Gabe Black
43cb78004b X86: Start using the stupd microop, and update statistics accordingly.
--HG--
extra : convert_revision : 4aa9daa4e19acfb3e6840ce5d83cf199e30c2f19
2007-10-21 18:45:46 -07:00
Gabe Black
4d15e4cf7b X86: Implement the stupd microop ("store with update", not "stupid") and use it in ENTER.
--HG--
extra : convert_revision : 9151f701162d31ef26298497467c42b7b0ed85d5
2007-10-21 18:44:50 -07:00
Gabe Black
d8494325f0 X86: Implement the PUSHF, POPF, SAHF, and LAHF instructions.
--HG--
extra : convert_revision : 37c63b1133022fa3432888592f8c84785fb95091
2007-10-19 15:21:16 -07:00
Gabe Black
35a8bc56cd X86: Impelement the HLT instruction and fix the "halt" microop.
--HG--
extra : convert_revision : 932e5bb5bf3644f8468dba92177fb87cc54b891a
2007-10-19 15:11:15 -07:00
Gabe Black
f69a463b4b X86: Implement a "halt" microop.
--HG--
extra : convert_revision : 53a846a157e4dce42343b81901df1207738f62cd
2007-10-19 15:10:23 -07:00
Gabe Black
7f37322532 X86: Implement the ENTER instruction. This could probably be optimized by cleaning up the indexing in the main loop.
--HG--
extra : convert_revision : ad2d560f2a6f36176b22b8510c58cd6fe5a2c9c2
2007-10-19 15:09:37 -07:00
Gabe Black
63f4281d9d Merge with head.
--HG--
extra : convert_revision : 7a1c612e7f64fc6b35749547d744e919e034e66f
2007-10-18 22:44:33 -07:00
Gabe Black
9243666c39 X86: Replace "group10" placeholder with the corresponding instructions in the decoder.
--HG--
extra : convert_revision : ffa8f7c4f8d1e381eefd29247ebd705863d385ad
2007-10-18 22:43:32 -07:00
Gabe Black
5c32422162 X86: Implement the string IO instructions, ins and outs.
--HG--
extra : convert_revision : b021e70390d289b22a8e693cd8a99d6e7bd7d2b4
2007-10-18 22:42:53 -07:00
Gabe Black
f0dce3bfce X86: Implement the undocumented SALC instruction which sets AL to 0xFF if CF=1 and 0x00 otherwise.
--HG--
extra : convert_revision : 845d43c544e296d7595f54054906055a9f21ad9f
2007-10-18 22:42:17 -07:00
Gabe Black
46bd1c99a9 X86: Implement the XLAT instruction.
--HG--
extra : convert_revision : 22d7d9e79e722293b4dc1e66d8610301dc04c5fa
2007-10-18 22:41:18 -07:00
Gabe Black
c526b00b35 X86: Implement the BOUND instruction.
--HG--
extra : convert_revision : 7bcfa5b4a47d342bee267cc593a1bd4b4f31abe0
2007-10-18 22:40:48 -07:00
Gabe Black
33dbd8a766 X86: Make the "fault" microop predicated.
--HG--
extra : convert_revision : 48dae1f3c680636833c137fe6b95b37ae84e188c
2007-10-18 22:40:18 -07:00
Gabe Black
70542c8e61 X86: Make "Inst" the default format instead of WarnUnimpl for one byte opcodes.
--HG--
extra : convert_revision : 591e67fc21f5b72977c5876e39f488494fda77c2
2007-10-18 22:39:39 -07:00
Gabe Black
dc2e887f23 X86: Implement the in/out instructions. These will still need support from the TLB and memory system.
--HG--
extra : convert_revision : a9503248ea9efca7e5247e4f2830967f428b8215
2007-10-18 22:39:00 -07:00
Gabe Black
2bbc058c6c X86: Implement the LOOP instructions.
--HG--
extra : convert_revision : 3ccd0565c83b6d9c9b63f9f7ac2b67839a2c714f
2007-10-18 22:38:17 -07:00
Gabe Black
418b30602b X86: Attach the CMC instruction to the decoder.
--HG--
extra : convert_revision : 909661062017c7640c343e80431eaf365e8fcf53
2007-10-18 22:37:44 -07:00
Gabe Black
674b6436b0 X86: Implemented the jrcx instruction.
--HG--
extra : convert_revision : d738015ff33449e55d8f1624c8467c1bba193e16
2007-10-18 22:37:08 -07:00
Gabe Black
0ffb317ff9 X86: Make wrip sign extend its second operand.
--HG--
extra : convert_revision : 2531af8b442ea5aaefccd7a7999c7720489edc36
2007-10-18 22:36:36 -07:00
Ali Saidi
8351660273 CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.
--HG--
extra : convert_revision : 6d025764682181b1f67df3b1d8d1d59099136df7
2007-10-18 13:15:08 -04:00
Gabe Black
54466a31c3 Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack.
--HG--
extra : convert_revision : af40a7acf424c4c4f62d0d76db1001a714ae0474
2007-10-16 18:04:01 -07:00
Gabe Black
9660a0a552 Merge with head
--HG--
extra : convert_revision : 490f9909469751a6cdaf6669e4cd4589ce3a4093
2007-10-12 20:10:57 -07:00
Gabe Black
ac27bc7878 Loader: Identify sections based on virtual addresses, and set the LoadAddrMask correctly for x86.
--HG--
extra : convert_revision : efa6cf42f7e69074c645dfcac335a3edf0941389
2007-10-12 20:10:10 -07:00
Gabe Black
0d6383b69e X86: Added some new versions of MOV and a new argument type tag.
--HG--
extra : convert_revision : e21b2062d68baa983c7c631b3e1fe3149de56427
2007-10-12 20:08:12 -07:00
Gabe Black
d82d3bbda5 X86: Implemented LODS.
--HG--
extra : convert_revision : 4bd8f15bbc25f5dce16ea0504ad6dd21805fa56a
2007-10-12 20:07:28 -07:00
Gabe Black
9498e536c0 X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.
There are no priviledge checks, so these instructions will all work in all
modes.

--HG--
extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
2007-10-12 16:37:55 -07:00
Gabe Black
a76f734d0b X86: Get rid of BasicOperate format which wasn't used and referred to SparcStaticInst
--HG--
extra : convert_revision : 5d2eac9a4b3f0fe5e3c3554d91acf8fee368c9dc
2007-10-09 17:21:04 -07:00
Gabe Black
8ecea59092 X86: Get rid of stray Sparc DPRINTF
--HG--
extra : convert_revision : d98b2d95448cab4e689d01ceedaa6ad46f9ffc09
2007-10-09 17:20:23 -07:00
Gabe Black
f6e5b92d63 ELF Loader: Use physical addresses instead of virtual ones.
This works in SE mode because the virtual and physical addresses specified for
segments are the same. In Alpha, the LoadAddrMask is still necessary because
the virtual and physical addresses are the same and apparently rely on the
super page mechanism. All of the regressions pass.

--HG--
extra : convert_revision : 45e49dec5002d64e541bc466c61a0f304af29ea5
2007-10-09 13:12:04 -07:00
Gabe Black
8858b0b667 X86: Make x86 initialize more state.
--HG--
extra : convert_revision : a55866efd339ae795da4072c070918bf419b07fa
2007-10-07 18:20:51 -07:00
Gabe Black
a19c212757 X86: Work on the x86 tlb.
--HG--
extra : convert_revision : a08a5cb049a6030ba9fd56a89383d56026238dbf
2007-10-07 18:18:39 -07:00
Gabe Black
cd36c69a4d X86: Make faults maintain an error code which gets pushed on the stack.
--HG--
extra : convert_revision : 7576f8cfaec9ddfb65e6ba7a6f64a5f453a42069
2007-10-07 18:17:52 -07:00
Gabe Black
efbff349a9 X86: Significantly filled out misc regs.
--HG--
extra : convert_revision : 4c53be6568134d65e57f5411df986fd9a89e82c9
2007-10-07 18:16:00 -07:00
Gabe Black
999328f5ad X86: Make sure there are fewer spurious differences between instructions for caching purposes.
--HG--
extra : convert_revision : 7e6be1c42f28f92d9e8b47169e683827bb3f4aaf
2007-10-07 18:14:48 -07:00
Gabe Black
d53552355b BitUnion: Fix some types in the bitunion classes.
--HG--
extra : convert_revision : 1c003f9fc9ef3a57c9199d692d172e747581f383
2007-10-07 18:12:10 -07:00
Gabe Black
63a6d7376b X86: Make initCPU and startupCPU do something basic.
--HG--
extra : convert_revision : 1a04f4402f4f31e4e5cd482c7983d853fe117df5
2007-10-07 18:10:42 -07:00
Gabe Black
304e4c932a X86: Make the Interrupts class complain less.
--HG--
extra : convert_revision : 81d9544e85c90139704ffe4a117983df4bfa3bcd
2007-10-07 18:08:17 -07:00
Gabe Black
847a18ad48 X86: Adjust the config scripts for x86 fs.
--HG--
extra : convert_revision : 36ed22b50066f54be0e51c3419babc07dd218e10
2007-10-07 17:52:36 -07:00
Gabe Black
e540c37282 X86: Make an x86 system object.
--HG--
extra : convert_revision : 590a4c29cb9b943a2d8c3a97c5fdfbabb658ac45
2007-10-07 17:48:36 -07:00
Gabe Black
8fe672551e X86: Make an x86 platform object.
--HG--
extra : convert_revision : 7d64d3e78960f3bb937579f5d10937bed5f197be
2007-10-07 17:48:06 -07:00
Gabe Black
22196f8885 X86: X86 FS compile fix.
--HG--
extra : convert_revision : bedd4cbab570d4ae84af9e8ead8f61db5c3c01dc
2007-10-07 17:46:56 -07:00
Gabe Black
bd5a88ba43 Merge with head.
--HG--
extra : convert_revision : aa1969b60044f8ed88e689bdd25eeded2b1105ec
2007-10-04 12:35:35 -07:00
Gabe Black
e1516aefbb X86: Fix the PageShift constant in isa_traits.hh (I thought I alread did this?)
--HG--
extra : convert_revision : bdc51a66e4fdf4b0a51b5c774ca7372a00a57269
2007-10-04 12:34:29 -07:00
Gabe Black
2848ef6696 SPARC: Make software trap 3 flush the register windows like the ABI specifies.
--HG--
extra : convert_revision : 8ff43617b56dcca5783d6cc490f87140fc20a36d
2007-10-04 12:24:16 -07:00
Gabe Black
50e2d20cb8 Merge with head.
--HG--
extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
2007-10-02 23:03:38 -07:00
Gabe Black
c2d60abf52 X86: Distinguish between the rep and repe prefixes.
STOS and MOVS only accept the rep prefix which always loops until rcx becomes
0. The other string instructions accept repe (same encoding as rep) and repne
which also check the condition code flags each iteration.

--HG--
extra : convert_revision : 544149f640302070810fb53e53bfeb0e87160ffc
2007-10-02 23:02:18 -07:00
Gabe Black
504f90f763 X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging.
--HG--
extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
2007-10-02 23:00:37 -07:00
Gabe Black
f4a932a6b3 X86: Fix places where movfp was used incorrectly.
--HG--
extra : convert_revision : a6b5688eaa53d2f6675df1be193726641e558d37
2007-10-02 22:58:48 -07:00
Gabe Black
06d2d54b57 X86: Fix the movfp microop.
--HG--
extra : convert_revision : 23829782a2802a97a05e4dfdb5dd38fbe4165a90
2007-10-02 22:58:04 -07:00
Gabe Black
3e644b48bb X86: Fix x87 floating point stack register indexing.
--HG--
extra : convert_revision : b515ec20cbfc50b38aa7da6cf4d465acf9054c08
2007-10-02 22:57:33 -07:00
Gabe Black
a56c651980 Predecoder: Clear out predecoder state on an ITLB fault.
--HG--
extra : convert_revision : 68f8ff778dbd28ade5070edf5a7d662e7bf0045a
2007-10-02 22:21:38 -07:00
Gabe Black
4049c9f76a X86: Put ldst into the microcode (the earlier changeset didn't really).
Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.

--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be
2007-10-02 22:19:53 -07:00
Gabe Black
7c521db9de X86: Implement the ldst microop and put it in existing microcode where appropriate.
--HG--
extra : convert_revision : f08bd725d07a501bb7a0ce91590b5d37db99c6f3
2007-10-02 22:08:09 -07:00
Gabe Black
683d6d46f6 X86: Fix up the microcode for the FST and FSTP instructions.
--HG--
extra : convert_revision : ad68633e9b7eab425593acb20cf242bf98c2b642
2007-10-02 22:06:59 -07:00
Gabe Black
b831f7409b X86: Get rid of a hack for ruflag which is no longer necessary.
--HG--
extra : convert_revision : 1bb60c9ddb483aead2af0201bbda938cc6d3f7cb
2007-10-02 22:05:50 -07:00
Gabe Black
efb309525a X86: Allow logic instructions to set ECF as well as CF.
--HG--
extra : convert_revision : 6ac20f069c86c23a8d443a7127afd6015166c00d
2007-10-02 22:05:10 -07:00
Gabe Black
65c247f21f X86: Add classes for the actual x86 faults.
--HG--
extra : convert_revision : bc060a01b5415551b335ca68ccbf126333ae20b0
2007-10-02 22:04:20 -07:00
Gabe Black
7d78f1b41c X86: Hook in another version of the XCHG instruction.
--HG--
extra : convert_revision : 7b6f9cd2f59443622f6963dfee454175322c0ef5
2007-10-02 22:03:38 -07:00
Gabe Black
66a08f7ba4 X86: Implement MOVS
--HG--
extra : convert_revision : 29147e1b86f7c54ce9b5ff68001725802c665fc0
2007-10-02 22:02:58 -07:00
Gabe Black
fea7165b55 X86: Implement STOS.
--HG--
extra : convert_revision : 95f3bf185f07fe644d6ab96bbb6e598e406b92f4
2007-10-02 22:02:30 -07:00
Gabe Black
7571e8346d CPU: Make the cpuid parameter get set in SE mode as well.
--HG--
extra : convert_revision : bc47206acb683ebaaa31f57af79b4b8db64e4d31
2007-10-02 18:33:57 -07:00
Gabe Black
8ca7feb726 Remote GDB: Turn on remote gdb in SE mode.
--HG--
extra : convert_revision : e17eb629071edd0dbcb09dd6a6a2220d2c83d33f
2007-10-02 18:26:27 -07:00
Gabe Black
988cdb49f2 CPU: Make the cpus check the pc event queues in SE mode.
--HG--
extra : convert_revision : 9dc4ea136c3c3f87a73d55e91bc4aae4eba70464
2007-10-02 18:25:37 -07:00
Gabe Black
48041fdc53 SPARC,Remote GDB: Flesh out the acc function for SE mode.
--HG--
extra : convert_revision : eada066ab64701b5c53e7351dfffbdc0e0d4f344
2007-10-02 18:25:10 -07:00
Gabe Black
1c83418b14 SPARC,Remote GDB: Fix an accounting bug in the remote gdb stuff.
--HG--
extra : convert_revision : f6f0986211c442ac94da315e344a8f54d4d58c8a
2007-10-02 18:24:24 -07:00
Gabe Black
5db7125317 Remote GDB: Get rid of an unwanted delete in SE.
--HG--
extra : convert_revision : 7531ba87893a8ebff3863adb846b382d07a1d18d
2007-10-02 18:23:11 -07:00
Gabe Black
3eeda8008d CPU: Make sure the system parameter gets set in the cpu builders. Other parameters need to be fixed as well.
--HG--
extra : convert_revision : 0401970a79855ee0a96eb29305346ce07b5c98ea
2007-10-02 18:22:36 -07:00
Ali Saidi
0acf891c32 CPU: fix sparc_fs booting with SimpleTimingCPU.
--HG--
extra : convert_revision : 3d95f6daa7f0e8e376d1a880f64c056619263885
2007-10-01 02:55:27 -04:00
Ali Saidi
d2a4f595d6 Update stats for quiesced cycles
--HG--
extra : convert_revision : 703ba58f156c9f2677b020f05d36bc1e3ae0b9e5
2007-09-28 13:22:14 -04:00
Ali Saidi
d325f49b70 Rename cycles() function to ticks()
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-09-28 13:21:52 -04:00
Ali Saidi
887cd6a273 Update statistics to use cycles properly instead of ticks
--HG--
extra : convert_revision : 62911280b631ef24720f9ce701d1c19a9b8a9784
2007-09-28 13:21:30 -04:00
Gabe Black
58c448ced5 Condition Codes: Fix the findParity function.
--HG--
extra : convert_revision : 37520ed12f55f6b8d9daedca9947eaa2eb8d7cc7
2007-09-25 20:26:10 -07:00
Gabe Black
2dd65dc254 Merge with head.
--HG--
extra : convert_revision : f331b9cbd82086d63d4f35e18f9e08466c016225
2007-09-25 20:11:41 -07:00
Gabe Black
25a9b6ea5e SPARC: Remove parameter that was only ever set to one value.
--HG--
extra : convert_revision : 3c22e576d95bdc7566bbce9b92cf2a6ff153a66f
2007-09-25 20:11:03 -07:00
Gabe Black
e735001d54 SPARC: Remove some redundant code from some of the fp instructions.
--HG--
extra : convert_revision : 68b0341ae7a367b84c44081f9a3d6d0bc6631649
2007-09-25 20:10:04 -07:00
Gabe Black
306b5c6b5b SPARC: Clean up of privileged instructions.
--HG--
extra : convert_revision : 1fb055a7d186a3e9dff46f1c1b46bad6bcd00562
2007-09-25 20:09:25 -07:00
Gabe Black
b896ad584b SPARC: Long overdue cleanup of the condition code handlers.
--HG--
extra : convert_revision : ddc53a622a8f908fa48788f3b570f33fcfc25fff
2007-09-25 20:08:34 -07:00
Gabe Black
25b4874664 Condition Codes: Fix type error.
--HG--
extra : convert_revision : 99f6c232cc421c6f741a8a11c029285e599eb183
2007-09-25 20:07:06 -07:00
Gabe Black
8d53fea210 SPARC: Clean up the branch instructions a bit.
--HG--
extra : convert_revision : 93d5cc68e4a327ee0492eeed7f3b56e98d2d83bb
2007-09-25 20:05:11 -07:00
Gabe Black
9ef0f6a7f1 Loader: Load all segments of an elf, rather than just the "text" and "data".
--HG--
extra : convert_revision : b28bb9ac5cde72878e948d64f629de6e4b42c2e8
2007-09-25 20:03:51 -07:00
Gabe Black
85d46ce470 Loader: Only complain about TLS sections if you're using Alpha.
--HG--
extra : convert_revision : 125d19ad3fa1847752e455fa248ca3b2a55a2067
2007-09-25 20:02:30 -07:00
Gabe Black
032a30f345 SPARC: Fix a stupid mistake which was breaking the SPARC regressions.
--HG--
extra : convert_revision : 34a11df0d467ea249211dd3aba86bc8d2aea45de
2007-09-25 20:00:46 -07:00
Gabe Black
b3c6f32543 X86: Fix for uninitialized variables in stacktrace code.
--HG--
extra : convert_revision : d19a03d8c14eb93a99f2c1838a9caa1286804c81
2007-09-25 14:44:12 -07:00
Gabe Black
418ddf43e6 X86: Get X86_FS to compile.
--HG--
extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
2007-09-24 17:39:56 -07:00
Gabe Black
dd277e0d8f SPARC: Fix linking error from new flattenFloatIndex function.
--HG--
extra : convert_revision : 5260f33336e3a9d5e3592b784458e243157f17e3
2007-09-19 19:08:42 -07:00
Gabe Black
3cd95a2748 X86: Implement the fld, fst, and fstp instructions.
--HG--
extra : convert_revision : 7dd274bdc3c34839c17d9012a745d7c95dfcfdd8
2007-09-19 18:28:34 -07:00
Gabe Black
a75b6f5106 X86: Move the fp microops to their own file with their own base classes in C++ and python.
--HG--
extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
2007-09-19 18:27:55 -07:00
Gabe Black
f3f3747431 X86: Put in the foundation for x87 stack based fp registers.
--HG--
extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
2007-09-19 18:26:42 -07:00
Gabe Black
a54ae9f92b X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
--HG--
rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py
extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-09-19 18:25:17 -07:00
Gabe Black
a1912df360 X86: Enable the rename system call.
--HG--
extra : convert_revision : bc4a3b5b5ce8e17f632e65ce89df91e2b50e1274
2007-09-19 18:24:11 -07:00
Gabe Black
bdc0261eb5 X86: Enable the unlink system call.
--HG--
extra : convert_revision : 4230a13fdb652a87271f8d2ac9ead96cd2af07a5
2007-09-19 18:23:35 -07:00
Steve Reinhardt
76c4c5fabc mem: clean up bus/cache DPRINTFs a bit
Not so much noise on failed sends, and more complete
info when grepping a trace using an address.

--HG--
extra : convert_revision : 05a8261c9452072ca08b906200c6322b33e2b9f1
2007-09-16 16:46:38 -07:00
Gabe Black
4a4aa59632 Merge with head.
--HG--
extra : convert_revision : 22aafb1cead3f584e64c188dc8eb45e271f4e7e9
2007-09-13 16:36:25 -07:00
Gabe Black
bbc8a40857 X86: Fix how ECF is computed in genFlags, and get rid of some duplicate code.
--HG--
extra : convert_revision : f86330a5a9fea782ee63aaa18ca964fb6f9cef0b
2007-09-13 16:35:41 -07:00
Gabe Black
534c6a800a X86: Make the shift and rotate instructions set the carry flag(s) and overflow flags like they're supposed to.
--HG--
extra : convert_revision : c0523a5bbf53375ce979ca7d98a95e465be66fbe
2007-09-13 16:35:20 -07:00
Gabe Black
f7b6230d99 X86: Total overhaul of the division instructions and microops.
--HG--
extra : convert_revision : 303ea45f69f7805361ad877fe6bb43fbc3dfd7a6
2007-09-13 16:34:46 -07:00
Ali Saidi
e282d9601c Syscall Emulation: Add stat64 syscall.
Patch submitted by: Jonas Diemer [diemer (a) ida.ing.tu-bs.de]

--HG--
extra : convert_revision : 07638c05bb3f79aacce49457bbb8c17d0a3a7238
2007-09-13 12:30:12 -04:00
Ali Saidi
5f187e592e Devices: More fixes to Intel NIC Model.
--HG--
extra : convert_revision : 14306d3cd79bbef7decdf2fd370ed7e7f2b10a93
2007-09-12 15:24:23 -04:00
Ali Saidi
19fbdcd30b Loader: Error if a TLS section is found in the binary.
--HG--
extra : convert_revision : d763c0382f3cbcc9786510f5a8e521ec9d55eff1
2007-09-11 00:01:24 -04:00
Gabe Black
0f57b407a3 X86: Make the isa parser run if any of the microcode files change.
--HG--
extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
2007-09-10 16:49:07 -07:00
Gabe Black
87408d5ad2 Fix for leaving EXTRAS blank
Apparently env['EXTRAS'] will return an empty string if not set. split will
then split it into an empty string, and normalize will turn "" into ".".

--HG--
extra : convert_revision : f79efebb129fdd65161fcf4d4582c2a8541aeacd
2007-09-10 16:42:41 -07:00
Gabe Black
8f724a8b96 Normalize the path pathed in through EXTRAS so it won't break with a trailing slash.
--HG--
extra : convert_revision : c14e2c6d97b5bcb491b91eeb4e7dc04d1cc35475
2007-09-10 12:48:06 -07:00
Gabe Black
22a57562cd Remove redundant endian.hh and use byteswap.hh in its place.
--HG--
extra : convert_revision : 5be1a5ba20d69d696d3974df147c2f219414c0b2
2007-09-10 11:02:50 -07:00
Gabe Black
8e7bca8b36 X86: Move a comment to be next to the code it describes.
--HG--
extra : convert_revision : c384391175babb7cfdd3885ae9d9f1a9405ea44f
2007-09-10 11:01:52 -07:00
Gabe Black
3e65e1d0e0 Merge with head.
--HG--
extra : convert_revision : 4fc5f595b23f72c0825d62f21efab46ed1db835b
2007-09-06 16:32:03 -07:00
Gabe Black
e4c0171356 X86: Rework the multiplication microops so that they work like they would in the patent.
--HG--
extra : convert_revision : 6fcf5dee440288d8bf92f6c5c2f97ef019975536
2007-09-06 16:27:28 -07:00
Gabe Black
7f079149f1 X86: Make signed multiplication do something different from unsigned.
--HG--
extra : convert_revision : 333c4a3464d708d4d8cea88931259ab96c2f75ed
2007-09-06 16:25:29 -07:00
Gabe Black
5052e2cb10 X86: Make signed versions of partial register values available to microops.
--HG--
extra : convert_revision : c820d1250f505911a341ced42d4f73796ea77f87
2007-09-06 16:22:08 -07:00
Gabe Black
832ef7412b X86: Correct how the hi portion of a product is computed.
--HG--
extra : convert_revision : 1f503e1cae0374e62e6254e8073e903adc29d067
2007-09-06 16:20:12 -07:00
Gabe Black
389abade01 X86: Add a square root microop and the SSE sqrt instruction.
--HG--
extra : convert_revision : ddc6e7e95111189d43f75bf84cd3d82433d982b3
2007-09-06 16:18:34 -07:00
Gabe Black
4478487c37 X86: Add SSE comparison instructions and microops and move some FP microops to be with the other ones.
--HG--
extra : convert_revision : ee0b5acde08d12c51a5282efb58d1ac72e0779af
2007-09-06 16:09:28 -07:00
Ali Saidi
bf7c01d43d Bus: Fix drain code; old method could return 1 in atomic mode and never call de->process().
--HG--
extra : convert_revision : 35990e5eaf93f7a95a0ec72e9f92034a042def3e
2007-09-05 17:12:41 -04:00
Gabe Black
57da059415 Merge with head.
--HG--
extra : convert_revision : 19bea7995285eeb7e277d3064f427429ade2bcb8
2007-09-04 23:46:08 -07:00
Gabe Black
fea46ee6e3 X86: Implement an SSE xor microop and instruction.
--HG--
extra : convert_revision : 949737d0f5d6fe4aa77cc4680d0c88caab3e8174
2007-09-04 23:44:37 -07:00
Gabe Black
6c689a3b4b X86: Make the movfp microop use FloatRegBits instead of FloatRegs.
This fixes a problem where interpreting arbitrary bits as floating point would
change what the value was. These values are legitimate because the fp
registers could be used to move around arbitrary data.

--HG--
extra : convert_revision : f1d7159ba137702b5722cc7c1b64ed7dd06c21de
2007-09-04 23:42:55 -07:00
Gabe Black
26ba7cc3b2 X86: Add tracing to the floating point register file.
--HG--
extra : convert_revision : f452d9179b929b980cf9e2d1e3de0431c51c5f4a
2007-09-04 23:40:47 -07:00
Gabe Black
26044dca33 X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and actually compare xmm.
--HG--
extra : convert_revision : 02c6641200edb133c9bc11f1fdf3c1a0b1c87e77
2007-09-04 23:39:57 -07:00
Gabe Black
760240176a X86: Hook in the fp arithmetic instructions. Stale python made it work before.
--HG--
extra : convert_revision : af27f26ae810ebaae13faa572c5b4eb074620d91
2007-09-04 23:38:34 -07:00
Gabe Black
d2fc4ee625 X86: Implement some SSE fp microops and instructions.
--HG--
extra : convert_revision : 7e0595ef542fbfb701bfac7e9ac4648349a92b26
2007-09-04 23:33:50 -07:00
Gabe Black
8e3b199cb8 X86: Add some SSE floating point/integer conversion microops.
--HG--
extra : convert_revision : 2a1aa16709db940f5f40bbd84ca082f26b03b9c5
2007-09-04 23:32:18 -07:00
Gabe Black
af4c04c426 X86: Add floating point micro registers.
--HG--
extra : convert_revision : 442a5f8b9216638e4e6898f89eacb8695719e20f
2007-09-04 23:31:40 -07:00
Gabe Black
310912cf2c X86: Fix a typo in the microassembly for the cqo instruction.
--HG--
extra : convert_revision : ddf739e591e4414ade37b806a88f3c11292627e2
2007-09-04 23:23:51 -07:00
Gabe Black
aaee21afdb X86: Implement idiv and propogate the mul corner case fix.
--HG--
extra : convert_revision : 348aa081067728afa14dc5b609fc7e26dbc5fad5
2007-09-04 23:23:13 -07:00
Gabe Black
b0b4038ee9 X86: Fix a corner case where mul would overwrite an original register value it still needed.
--HG--
extra : convert_revision : 86ee0e2bf716d52c34ee731727d6366935f103ed
2007-09-04 23:22:08 -07:00
Gabe Black
e1e7605213 X86: Add in a file with floating point indexing which -should- have been in an earlier changeset.
--HG--
extra : convert_revision : bf05f81df5e5b1de1ecd8ab7a6ef751922418987
2007-09-04 23:21:41 -07:00
Ali Saidi
276a382557 Serialization: Fix unserialization of object pointers
--HG--
extra : convert_revision : a5aed880b2fc05841067e8597a58a9484e30b84a
2007-09-04 13:12:58 -04:00
Ali Saidi
021421d663 Config: Remove some ini file code that no longer works
--HG--
extra : convert_revision : cb01dc0abeabc97b03d7af10959d92ceb62ea936
2007-09-04 13:12:58 -04:00
Gabe Black
9da070ce8a X86: Major rework of how regop microops are generated.
The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.

--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
2007-08-31 22:28:07 -07:00
Gabe Black
9277545ba6 Microassembler: Pass the actual mnemonic used to the macroop add_micro function
--HG--
extra : convert_revision : acaee747ab30747d602c1f4ac5f0c2b2573a2a9b
2007-08-31 22:26:02 -07:00
Gabe Black
941675690c X86: Get x86 to compile again after the simobject constructor change.
--HG--
extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
2007-08-31 13:02:58 -07:00