Commit graph

1622 commits

Author SHA1 Message Date
Gabe Black
053c715f21 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
2007-06-19 14:18:46 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst.
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names.
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
2007-06-19 14:14:17 +00:00
Ali Saidi
2d08ab0cc2 fix bug in timing cpu. getTime() is the time the requset was created, not the time it was repsonded to. In timing mode the
time it was responded to is curTick. Doesn't change the results, but it does make implementation of nextCycle() more difficult

--HG--
extra : convert_revision : 67ed6261a5451d17d96d5df45992590acc353afc
2007-06-18 18:11:07 -04:00
Gabe Black
7994fa9431 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : fd64f2de0051afdc51e833a7cbf7fa120b230cc3
2007-06-18 14:16:08 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output.
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
2007-06-18 14:15:00 +00:00
Steve Reinhardt
d69a763833 Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

configs/example/memtest.py:
    Hand merge redundant changes.

--HG--
extra : convert_revision : a2e36be254bf052024f37bcb23b5209f367d37e1
2007-06-17 17:30:24 -07:00
Steve Reinhardt
35cf19d441 More major reorg of cache. Seems to work for atomic mode now,
timing mode still broken.

configs/example/memtest.py:
    Revamp options.
src/cpu/memtest/memtest.cc:
    No need for memory initialization.
    No need to make atomic response... memory system should do that now.
src/cpu/memtest/memtest.hh:
    MemTest really doesn't want to snoop.
src/mem/bridge.cc:
    checkFunctional() cleanup.
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.cc:
src/mem/cache/cache.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_builder.cc:
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/coherence_protocol.cc:
src/mem/cache/coherence/coherence_protocol.hh:
src/mem/cache/coherence/simple_coherence.hh:
src/mem/cache/miss/SConscript:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
src/mem/packet.cc:
src/mem/packet.hh:
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/tport.cc:
    More major reorg.  Seems to work for atomic mode now,
    timing mode still broken.

--HG--
extra : convert_revision : 7e70dfc4a752393b911880ff028271433855ae87
2007-06-17 17:27:53 -07:00
Steve Reinhardt
f4babe1082 memtest.cc:
No need to initialize memory contents; should come up as 0.

src/cpu/memtest/memtest.cc:
    No need to initialize memory contents; should come up as 0.

--HG--
extra : convert_revision : 1713676956f3d33b4686fee2650bd17027bcc495
2007-06-16 14:05:05 -07:00
Gabe Black
3ceb0a46ae Add in some microregs.
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future.
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm.
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect.
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place.
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method.
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
2007-06-14 16:52:19 -04:00
Gabe Black
cb7934f052 Fix an assert to allow rounding mode 0.
--HG--
extra : convert_revision : 119cc87ccf939d3a0048d87d18e125deca378bb7
2007-06-14 13:53:27 +00:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode.
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst.
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement.
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly.
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
2007-06-14 13:45:37 +00:00
Gabe Black
6641423a0b A fix for SPARC_FS compilation.
--HG--
extra : convert_revision : 8af0dd9c16e7db8ed92f7a71c396841d5ae7e072
2007-06-14 13:27:08 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst.
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names.
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP"
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though.
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly.
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up.
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
2007-06-12 17:35:11 +00:00
Gabe Black
02732929e8 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1d2efac895a1c8328026a079e0b319a436325616
2007-06-12 17:19:14 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix.
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well.
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes.
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions.
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86.
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype.
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things.
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent.
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-12 16:21:47 +00:00
Nathan Binkert
125237d357 Rename enum from OpType to OpClass so it's consistent with the
real thing.  Also rename the null case to something that can
be a C++ symbol.

--HG--
extra : convert_revision : e3bfc4065b59c21f613e486d234711c48d7c9070
2007-06-11 23:10:58 -07:00
Nathan Binkert
961f8382f6 Add a function to get a SimObject's memory mode and rework
the set memory mode code to only go through the change if
it is necessary

--HG--
extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
2007-06-10 13:52:21 -07:00
Nathan Binkert
fc4ab050b4 Add a startup function that will fast forward to the right clock edge
using a divide in order to not loop forever after resuming from a checkpoint

--HG--
extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a
2007-06-09 23:01:47 -07:00
Nathan Binkert
11f1c8dd3e Use the right type
--HG--
extra : convert_revision : b5ca3153ca786ea4e86bfe83f7760ba9ee41a882
2007-06-09 23:00:13 -07:00
Nathan Binkert
9f75ac783b only compile fenv.c if we're using fenv
--HG--
extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
2007-06-09 22:59:33 -07:00
Nathan Binkert
e9936a6250 More realistic parameters
--HG--
extra : convert_revision : aaa4ea2b7c97df3d6b731e9252984b45715e9d6f
2007-06-09 22:43:08 -07:00
Gabe Black
1493ceda8f Fix another outdated comment.
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments.
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment.
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment.
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft.
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little.
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
2007-06-08 17:06:34 +00:00
Gabe Black
5f0d82baeb Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
2007-06-08 16:13:45 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler.
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR.
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst.
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
2007-06-08 16:06:22 +00:00
Ali Saidi
c5a946efea Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
2007-06-05 01:03:43 -04:00
Ali Saidi
85986e9dff Clean up some of vincent's code and commit it
Makes page table cache scheme actually work

src/mem/page_table.cc:
src/mem/page_table.hh:
    fix caching scheme to actually work and improve performance

--HG--
extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
2007-06-05 01:03:35 -04:00
Gabe Black
dba02f703b Make limm (load immediate) microop
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
2007-06-04 19:53:06 +00:00
Gabe Black
ddbc26c85e Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
2007-06-04 19:53:05 +00:00
Ali Saidi
42174babbb don't be so aggressive with the tracing on #if
--HG--
extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
2007-06-04 15:53:04 -04:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
2007-06-04 15:59:20 +00:00
Gabe Black
e47f1667b6 Don't mask the pc because the Alpha predecoder needs it to set the PAL mode bit in the ExtMachInst.
--HG--
extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
2007-06-02 03:41:47 +00:00
Nathan Binkert
aba2eeaf8f Fix typo so m5.fast will compile
--HG--
extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
2007-06-01 20:41:46 -07:00
Ali Saidi
66ee27078e Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
2007-06-01 14:55:17 -04:00
Ali Saidi
be0aef9819 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

src/cpu/simple/base.cc:
    hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int

--HG--
extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
2007-06-01 14:18:45 -04:00
Ali Saidi
d8f6769962 cast sizeof(MachInst) to Addr before generating a mask
--HG--
extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
2007-06-01 14:16:58 -04:00
Ali Saidi
d8c487c401 don't generate trace data unless tracing is on
--HG--
extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
2007-06-01 13:44:24 -04:00
Gabe Black
6e8a06b237 Clean things up
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
2007-06-01 16:24:51 +00:00
Gabe Black
85caab4e8c Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
2007-06-01 16:24:50 +00:00
Vincentius Robby
a7fe9345ee Minor error. Forgotten to remove brackets for threadPC.
--HG--
extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
2007-06-01 12:24:49 -04:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly.
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
2007-05-31 20:45:04 +00:00
Vincentius Robby
83aa742d26 Merge zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem

--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
2007-05-31 16:02:31 -04:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-05-31 13:50:35 +00:00
Nathan Binkert
7797a239cc Fix cut-n-pasto to make the path correct
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
2007-05-30 17:19:20 -07:00
Steve Reinhardt
a9b7c558fd Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 26921dad179699b7868768361143aaa8d790b8fc
2007-05-29 22:59:20 -07:00
Steve Reinhardt
4e65d2678d tport.cc:
Oops... forgot to update call site after changing
function argument semantics.

src/mem/tport.cc:
    Oops... forgot to update call site after changing
    function argument semantics.

--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
2007-05-30 01:53:28 -04:00
Steve Reinhardt
94c19ad37d Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 72c6f2ce7e9e2b46e59711a2c3cfe770c243018e
2007-05-29 22:25:57 -07:00
Steve Reinhardt
365e4ac374 A little more cleanup & refactoring of SimpleTimingPort.
Make it a better base class for cache ports.

--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
2007-05-29 22:23:41 -07:00
Steve Reinhardt
05915ed6f7 Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 6f462916cb0eb309b6799e94fbf07629abb50eba
2007-05-28 08:13:40 -07:00
Steve Reinhardt
41f6cbce9a Restructure SimpleTimingPort a bit:
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability

--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
2007-05-28 08:11:43 -07:00
Steve Reinhardt
04ac944920 Reformat comments to meet line length restriction.
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
2007-05-28 08:04:33 -07:00
Steve Reinhardt
07bda077f2 Remove unnecessary include of physical.hh.
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
2007-05-28 08:03:13 -07:00
Steve Reinhardt
075f4b108a Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : fba7efd444e1ca9738385dd4662a33feab357e79
2007-05-27 21:34:37 -07:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Steve Reinhardt
6a48f6b67d Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : f940480672861185a494f3fae1bfca13d31fed9f
2007-05-26 20:15:35 -07:00
Nathan Binkert
4f0f217c1b Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation

--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
2007-05-26 18:15:22 -07:00
Steve Reinhardt
87bb4c3792 Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : c2540bfd34eb5a6f41cb15ffe50f8ec72f80abb1
2007-05-26 17:10:35 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated.
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
2007-05-25 19:26:26 -07:00