6 commits

Author	SHA1	Message	Date
Gabe Black	cc07dcf026	MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg. ... The MIPS ISA object expects to be constructed with a CPU pointer it uses to look at other thread contexts and allow them to be manipulated with control registers. Unfortunately, that differs from all the other ISA classes and would complicate their implementation. This change makes the event constructor use a CPU pointer pulled out of the thread context passed to setMiscReg instead.	2009-12-31 15:30:50 -05:00
Gabe Black	010b13c937	ISA: Fix compilation.	2009-10-17 01:13:41 -07:00
Gabe Black	de7f462219	MIPS: Fold the MiscRegFile all the way into the ISA object.	2009-07-09 20:28:39 -07:00
Gabe Black	c9a27d85b9	Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.	2009-07-08 23:02:22 -07:00
Gabe Black	997f36c711	Registers: Collapse ARM and MIPS regfile directories. ... --HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh	2009-07-08 23:02:21 -07:00
Gabe Black	32daf6fc3f	Registers: Add an ISA object which replaces the MiscRegFile. ... This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.	2009-07-08 23:02:20 -07:00