Gabe Black
47a1f11381
MIPS: Update stats for updated initial environment.
2009-12-31 15:30:51 -05:00
Matt DeVuyst
18dc80e07b
MIPS: Beef up process initialization.
2009-12-31 15:30:51 -05:00
Gabe Black
ecaa7070e6
MIPS: Implement the SE mode version of rdhwr.
2009-12-31 15:30:51 -05:00
Gabe Black
c70f3c93af
MIPS: Fix decoding of the rdhwr instruction.
2009-12-31 15:30:51 -05:00
Gabe Black
134937b594
MIPS: Implement the set_thread_area system call.
2009-12-31 15:30:50 -05:00
Gabe Black
d3ed32b989
MIPS: Create an artificial control register to hold the thread pointer.
...
In Linux, the set_thread_area system call stores the address of the thread
local storage area into a field of the current thread_info structure. Later,
to access that value, the program uses the rdhwr instruction to read a
"hardware register" with index 29. The 64 bit MIPS manual, volume II, says
that index 29 is reserved for a future ABI extension and should cause a
"Reserved Instruction Exception". In Linux (and potentially other ISAs) that
exception is trapped and emulated to return the value stored by
set_thread_area as if that were actually stored by a physical register.
The tp_value address (as named in the Linux kernel) is ironically stored as a
control register so that it goes with a particular ThreadContext. Syscall
emulation will use that to emulate storing to the OS's thread info structure,
and rdhwr will emulate faulting and returning that value from software by
returning the value itself, as if it was in hardware. In other words, we fake
faking the register in SE mode. In an FS mode implementation it should
work as specified in the manual.
2009-12-31 15:30:50 -05:00
Gabe Black
cc07dcf026
MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.
...
The MIPS ISA object expects to be constructed with a CPU pointer it uses to
look at other thread contexts and allow them to be manipulated with control
registers. Unfortunately, that differs from all the other ISA classes and
would complicate their implementation.
This change makes the event constructor use a CPU pointer pulled out of the
thread context passed to setMiscReg instead.
2009-12-31 15:30:50 -05:00
Gabe Black
1261f1d8db
MIPS: Add missing syscall slots.
...
These are all after the existing ones, suggesting they were added after the
original list was created.
2009-12-21 14:59:40 -08:00
Soumyaroop Roy
1bd0f772f1
Alpha: Implement MVI and remaining BWX instructions.
2009-12-20 15:03:23 -06:00
Gabe Black
3e1cda5080
X86: Add a latency that describes how long an interrupt takes to propagate through the IO APIC.
2009-12-19 01:50:06 -08:00
Gabe Black
93d89b288f
X86: Record the memory mode when building an X86 system.
2009-12-19 01:49:34 -08:00
Gabe Black
c7ca1d3c8a
X86: Add a common named flag for signed media operations.
2009-12-19 01:48:31 -08:00
Gabe Black
2554511533
X86: Create a common flag with a name to indicate high multiplies.
2009-12-19 01:48:07 -08:00
Gabe Black
e474079ddc
X86: Create a common flag with a name to indicate scalar media instructions.
2009-12-19 01:47:30 -08:00
Brad Beckmann
295516a590
m5: refreshed the ruby memtest regression stats
2009-11-18 18:00:41 -08:00
Brad Beckmann
5d8a669539
Resurrection of the CMP token protocol to GEM5
2009-11-18 16:34:33 -08:00
Brad Beckmann
c6182199c5
m5: improvements to the ruby_fs.py file
2009-11-18 16:34:32 -08:00
Brad Beckmann
dcac2ec24c
ruby: removed the chip pointer from MessageBuffer
...
The Chip object no longer exists and thus is removed from the MessageBuffer
constructor.
2009-11-18 16:34:32 -08:00
Brad Beckmann
c9764b1ff1
ruby: added error message to isinstance check
...
Added error message when a symbol is not an instance of a particular expected
type.
2009-11-18 16:34:32 -08:00
Brad Beckmann
20f872ed2a
ruby: Added boolean to State Machine parameters
...
* * *
ruby: Removed primitive .hh includes
2009-11-18 16:34:32 -08:00
Brad Beckmann
c6330094fb
m5: Added the default m5out directory to the hg ignore list
2009-11-18 16:34:32 -08:00
Brad Beckmann
8011e80725
ruby: The persistent table files from GEMS
...
These files are need by the MOESI_CMP_token protocol.
2009-11-18 16:34:32 -08:00
Brad Beckmann
cef3c56163
ruby: MOESI hammer support for DMA reads and writes
2009-11-18 16:34:32 -08:00
Brad Beckmann
dbb2c111cc
ruby: Added a memory controller feature to MOESI hammer
2009-11-18 16:34:32 -08:00
Brad Beckmann
bc12b8432d
ruby: Hammer ruby configuration support
2009-11-18 16:34:32 -08:00
Brad Beckmann
877be2009c
ruby: Changes necessary to get the hammer protocol to work in GEM5
2009-11-18 16:34:32 -08:00
Brad Beckmann
b0973035b4
ruby: added the original hammer protocols from old ruby
2009-11-18 16:34:31 -08:00
Brad Beckmann
2783a7b9ad
ruby: returns the number of LLC needed for broadcast
...
Added feature to CacheMemory to return the number of last level caches.
This count is need for broadcast protocols such as MOESI_hammer.
2009-11-18 16:34:31 -08:00
Brad Beckmann
7b8fcecf11
ruby: cache configuration fix to use bytes
...
Changed cache size to be in bytes instead of kb so that testers can use very
small caches and increase the chance of writeback races.
2009-11-18 16:34:31 -08:00
Brad Beckmann
99338a7460
ruby: fix CacheMemory destructor
2009-11-18 16:33:35 -08:00
Brad Beckmann
7ab484624f
ruby: split CacheMemory.hh into a .hh and a .cc
2009-11-18 16:33:35 -08:00
Brad Beckmann
8b0f970084
ruby: Added default names to message buffers
...
Added default names to message buffers created by the simple network.
2009-11-18 13:55:58 -08:00
Brad Beckmann
ed54ecf1c8
ruby: slicc method error fix
...
Added error message when a method call is not supported by an object.
2009-11-18 13:55:58 -08:00
Brad Beckmann
994169327a
ruby: slicc action error fix
...
Small fix to the State Machine error message when duplicate actions are defined.
2009-11-18 13:55:58 -08:00
Brad Beckmann
cc2db929cb
ruby: slicc state machine error fixes
...
Added error messages when:
- a state does not exist in a machine's list of known states.
- an event does not exist in a machine
- the actions of a certain machine have not been declared
2009-11-18 13:55:58 -08:00
Brad Beckmann
e84881b7a3
ruby: Removed unused action z_stall
2009-11-18 13:55:58 -08:00
Brad Beckmann
70a261c0ae
m5: Added option to take a checkpoint at the end of simulation
2009-11-18 13:55:58 -08:00
Brad Beckmann
b5d2052fa0
m5: Fixed bug in atomic cpu destructor
2009-11-18 13:55:58 -08:00
Brad Beckmann
faf1d97f24
ruby: fixed dma mi example to work with multiple dma ports
2009-11-18 13:55:58 -08:00
Brad Beckmann
f54790977b
m5: removed master and slave deletions.
...
The unresolved destructor call caused a seg fault when called.
2009-11-18 13:55:58 -08:00
Brad Beckmann
4d731a522d
m5: fixed destructor to deschedule the tickEvent and event
2009-11-18 13:55:58 -08:00
Brad Beckmann
93f0069dd5
ruby: getPort function fix
...
Fixed RubyMemory::getPort function to not pass in a -1 for the idx parameter
2009-11-18 13:55:58 -08:00
Brad Beckmann
204d1776ca
ruby: Fixed Directory memory destructor
2009-11-18 13:55:58 -08:00
Brad Beckmann
b8c413e993
m5: Moved profile option since Simulation depends on it.
2009-11-18 13:55:58 -08:00
Brad Beckmann
6e1dc2546c
m5: Added isValidSrc and isValidDest calls to packet.hh
2009-11-18 13:55:58 -08:00
Brad Beckmann
90d6e2652f
ruby: included ruby config parameter ports per core
...
Slightly improved the major hack need to correctly assign the number of ports
per core. CPUs have two ports: icache + dcache. MemTester has one port.
2009-11-18 13:55:58 -08:00
Brad Beckmann
dce53610c3
ruby: Added error check for openning the ruby config file
2009-11-18 13:55:58 -08:00
Brad Beckmann
3cf24f9716
ruby: Support for merging ALPHA_FS and ruby
...
Connects M5 cpu and dma ports directly to ruby sequencers and dma
sequencers. Rubymem also includes a pio port so that pio requests
and be forwarded to a special pio bus connecting to device pio
ports.
2009-11-18 13:55:58 -08:00
Brad Beckmann
d7a4f665ed
ruby: Added more info to bridge error message
2009-11-18 13:55:57 -08:00
Brad Beckmann
17e14efa7e
ruby: Ruby 64-bit address output fixes.
2009-11-18 13:55:57 -08:00
