sanchayanmaity/gem5
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6 commits

Author SHA1 Message Date
Brad Beckmann
52540b1b78 x86: logSize and lruSeq are now optional ckpt params 2012-07-10 22:51:54 -07:00
Gabe Black
aacb676220 X86: Use the AddrTrie class to implement the TLB. 
This change also adjusts the TlbEntry class so that it stores the number of
address bits wide a page is rather than its size in bytes. In other words,
instead of storing 4K for a 4K page, it stores 12. 12 is easy to turn into 4K,
but it's a little harder going the other way.
 2012-04-14 23:24:18 -07:00
Joel Hestness
911ccef6c0 x86: Add checkpointing capability to arch components 
Add checkpointing capability to the x86 interrupt device and the TLBs
 2011-02-06 22:14:17 -08:00
Nathan Binkert
13d64906c2 copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
Gabe Black
fddfa71658 TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. 
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
 2007-10-25 19:04:44 -07:00
Gabe Black
504f90f763 X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging. 
--HG--
extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
 2007-10-02 23:00:37 -07:00