sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
6510 commits 2 branches 0 tags 204 MiB
Commit graph

6510 commits

This branch
This branch
All branches
Author SHA1 Message Date
Gabe Black
c4140d7d60 X86: Handle rotate left with carry instructions that go all the way around or more. 2009-08-05 03:02:28 -07:00
Gabe Black
3990445354 X86: Set the flags on rotate left with carry instructions. 2009-08-05 03:02:05 -07:00
Gabe Black
d265f7683e X86: Handle rotate right with carry instructions that go all the way around or more. 2009-08-05 03:01:49 -07:00
Gabe Black
77dc6b33ee X86: Fix the overflow bit for rotate right with carry. 2009-08-05 03:01:23 -07:00
Gabe Black
c8b1a4583e X86: Fix the computation of the bottom part of rotate right with carry. 2009-08-05 03:01:07 -07:00
Gabe Black
bab4597fc5 X86: Fix the computation of the upper part of rotate right with carry. 2009-08-05 03:00:43 -07:00
Gabe Black
4e4adcaaa8 X86: Set the flags for rotate right with carry instructions. 2009-08-05 03:00:23 -07:00
Gabe Black
64d7948692 X86: Handle rotating right all the way around or more. 2009-08-05 03:00:03 -07:00
Gabe Black
88041f75c4 X86: Set the flags on a rotate right instruction. 2009-08-05 02:59:39 -07:00
Gabe Black
029d360db2 X86: Make shifts/rotations that write to 32 bits of a register zero extend. 2009-08-05 02:59:25 -07:00
Gabe Black
7f9a3af250 X86: Handle left rotations that go all the way around or more. 2009-08-05 02:58:54 -07:00
Gabe Black
99adfd9dae X86: Actually set the flags on a rotate left instruction. 2009-08-05 02:58:20 -07:00
Gabe Black
c087b60af3 X86: Fix the sar carry flag. 2009-08-05 02:58:03 -07:00
Gabe Black
860f0f8350 X86: Fix sign extension when doing an arithmetic shift right by 0. 2009-08-05 02:57:47 -07:00
Gabe Black
a238959c34 X86: Fix the carry flag for shr. 2009-08-05 02:56:49 -07:00
Gabe Black
22a5f66820 X86: Fix the carry flag for shl. 2009-08-05 02:56:38 -07:00
Gabe Black
df2c862a07 X86: Fix how the parity flag is computed. 
It's only for the lowest order byte, and I had the polarity wrong.
 2009-08-05 02:56:12 -07:00
Derek Hower
7f012ef8da ruby: made mapAddressToRange based off a bit count 2009-08-04 23:05:37 -05:00
Derek Hower
33b28fde7a slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers 
This changeset contains a lot of different changes that are too
mingled to separate.  They are:

1.  Added MOESI_CMP_directory

I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller.  I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.

2.  DMA Sequencer uses a generic SequencerMsg

I will eventually make the cache Sequencer use this type as well.  It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.

3. Parameterized Controllers

SLICC controllers can now take custom parameters to use for mapping,
latencies, etc.  Currently, only int parameters are supported.
 2009-08-04 12:52:52 -05:00
Derek Hower
c1e0bd1df4 slicc: generate html by default 2009-08-04 12:42:45 -05:00
Nathan Binkert
bd7af84d5e slicc: better error messages when the python parser fails 2009-08-04 09:37:27 -07:00
Gabe Black
f5c21eaa1a Merged with head. 2009-08-03 11:06:19 -07:00
Gabe Black
676dc6d292 X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement. 2009-08-03 11:01:40 -07:00
Derek Hower
ac15e42c17 Automated merge with ssh://hg@m5sim.org/m5 2009-08-03 11:39:08 -05:00
Gabe Black
38c2af17a5 X86: Set up the IDE device correctly, ie. with and using legacy ports. 2009-08-02 18:01:13 -07:00
Gabe Black
80aa771dbc IDE: Configure the IDE control to reflect the initial value of the command register. 2009-08-02 18:01:09 -07:00
Gabe Black
aff57202b4 X86: Fix the high result of mul1s, and removed undefined shifts from the mult microops. 2009-08-02 08:39:29 -07:00
Steve Reinhardt
a13a706a20 Fix setting of INST_FETCH flag for O3 CPU. 
It's still broken in inorder.
Also enhance DPRINTFs in cache and physical memory so we
can see more easily whether it's getting set or not.
 2009-08-01 22:50:14 -07:00
Steve Reinhardt
1c28004654 Clean up some inconsistencies with Request flags. 2009-08-01 22:50:13 -07:00
Steve Reinhardt
c0755e6085 Rename internal Request fields to start with '_'. 
The inconsistency was causing a subtle bug with some of the
constructors where the params had the same name as the fields.
This is also a first step to switching the accessors over to
our new "standard", e.g., getVaddr() -> vaddr().
 2009-08-01 22:50:10 -07:00
Korey Sewell
aa75b9a7a7 merge mips fix and statetrace changes 2009-07-31 10:40:42 -04:00
Korey Sewell
60063cc700 mips: fix ll/sc pairs working incorrectly because of accidental clobber of LLFLAG 2009-07-31 09:34:29 -04:00
Derek Hower
8623b4b6ea regression: updated stats 2009-07-31 00:43:09 -05:00
Nathan Binkert
3dd3de5feb compile: fix accidental conversion of == into = 2009-07-30 17:42:57 -07:00
Gabe Black
4971331b4f ARM: Mul and mla ignore the c and v flags, but we were setting them to 1. 2009-07-29 22:24:00 -07:00
Derek Hower
d9ff3021ba ruby: fixed clearStats 2009-07-29 13:46:58 -05:00
Gabe Black
e09ae149af Statetrace: Make sure the current state is loaded to print the initial stack frame. 
The early call to child->step() was removed earlier because it confused the
new differences-only protocol ARM sendState() was using. It's necessary that
that gets called at least once before attempting to print the initial stack
frame, though, because otherwise statetrace doesn't know what the stack
pointer is. By putting the first call to child->step() in a common spot, both
needs are met.
 2009-07-29 00:35:49 -07:00
Gabe Black
b066e717f4 ARM: Fix an instruction in the cmpxchg kernel provided routine. 
The instruction was encoded as a load instead of the intended store.
 2009-07-29 00:18:26 -07:00
Gabe Black
c2da5bae17 ARM: Get rid of a stray line in the set_tls handler. 2009-07-29 00:17:20 -07:00
Gabe Black
1e04b6281d ARM: Make the ARM native tracer stop M5 if control diverges. 
If the control flow of M5's executable and statetrace's target process get out
of sync even a little, there will be a LOT of output, very little of which
will be useful. There's also almost no hope for recovery. In those cases, we
might as well give up and not generate a huge, mostly worthless trace file.
 2009-07-29 00:17:11 -07:00
Gabe Black
2871a13ab3 Simple CPU: Make the simple CPU handle the IntRegs trace flag. 2009-07-29 00:15:26 -07:00
Gabe Black
873112ea99 ARM: Make sure the target process doesn't run away from statetrace. 2009-07-29 00:14:43 -07:00
Ali Saidi
0a9eb59e6f ARM: Ignore the "times" system call. 2009-07-29 00:09:46 -07:00
Ali Saidi
19a4fb0ff3 ARM: Fix an ioctl constant. 2009-07-29 00:09:44 -07:00
Derek Hower
469256d823 ruby: removed unused/incorrect profiler state 2009-07-27 21:43:43 -05:00
Gabe Black
9e292c950a ARM: Update the stats for the EABI version of hello world. 2009-07-27 00:55:14 -07:00
Ali Saidi
daf8718da9 ARM: Update some syscall constants and delete others that are Alpha only. 2009-07-27 00:54:55 -07:00
Gabe Black
d3f2992e39 ARM: Decode fstmx and fldmx instructions. We can ignore them for now. 2009-07-27 00:54:50 -07:00
Gabe Black
52b4a7c36f ARM: Only send information that changed between statetrace and M5. 2009-07-27 00:54:30 -07:00
Gabe Black
90d3d3535b imported patch nativetracestreamline.patch 2009-07-27 00:54:24 -07:00