Commit graph

11076 commits

Author SHA1 Message Date
David Hashe 6511ab4654 mem: add request types for acquire and release
Add support for acquire and release requests.  These synchronization operations
are commonly supported by several modern instruction sets.
2015-07-20 09:15:18 -05:00
David Hashe 7e9562013b ruby: allocate a block in CacheMemory without updating LRU state 2015-07-20 09:15:18 -05:00
David Hashe 7e00772bda ruby: speed up function used for cache walks
This patch adds a few helpful functions that allow .sm files to directly
invalidate all cache blocks using a trigger queue rather than rely on each
individual cache block to be invalidated via requests from the mandatory
queue.
2015-07-20 09:15:18 -05:00
David Hashe 3454a4a36e slicc: support for arbitrary DPRINTF flags (not just RubySlicc)
This patch allows DPRINTFs to be used in SLICC state machines similar to how
they are used by the rest of gem5.  Previously all DPRINTFs in the .sm files
had to use the RubySlicc flag.
2015-07-20 09:15:18 -05:00
David Hashe 9324239922 slicc: support for local variable declarations in action blocks 2015-07-20 09:15:18 -05:00
David Hashe 1850ed410f ruby: initialize replacement policies with their own simobjs
this is in preparation for other replacement policies that take additional
parameters.
2015-07-20 09:15:18 -05:00
David Hashe 74ca89f8b7 ruby: give access to cache tag/data latencies from SLICC
This patch exposes the tag and data array latencies to the SLICC state machines
so that it can be used to determine the correct enqueue latency for response
messages.
2015-07-20 09:15:18 -05:00
David Hashe 536e3664e4 slicc: support for multiple cache entry types in the same state machine
To have multiple Entry types (e.g., a cache Entry type and
a directory Entry type), just declare one of them as a secondary
type by using the pair 'main="false"', e.g.:

  structure(DirEntry, desc="...", interface="AbstractCacheEntry",
            main="false") {

...and the primary type would be declared:

  structure(Entry, desc="...", interface="AbstractCacheEntry") {
2015-07-20 09:15:18 -05:00
David Hashe 910638f338 slicc: Fix bug in enqueue and peek statements.
These were not generating the correct c names for types declared within a
machine scope.
2015-07-20 09:15:18 -05:00
David Hashe 3d8c8a85fa slicc: fix missing inline function in LocalVariableAST 2015-07-20 09:15:18 -05:00
David Hashe 93fff6f636 slicc: improve support for prefix operations
This patch fixes the type handling when prefix operations are used.  Previously
prefix operators would assume a void return type, which made it impossible to
combine prefix operations with other expressions.  This patch allows SLICC
programmers to use prefix operations more naturally.
2015-07-20 09:15:18 -05:00
David Hashe ee0d414fa8 slicc: support for transitions with a wildcard next state
This patches adds support for transitions of the form:

transition(START, EVENTS, *) { ACTIONS }

This allows a machine to collapse states that differ only in the next state
transition to collapse into one, and can help shorten/simplfy some protocols
significantly.

When * is encountered as an end state of a transition, the next state is
determined by calling the machine-specific getNextState function. The next
state is determined before any actions of the transition execute, and
therefore the next state calculation cannot depend on any of the transition
actions.
2015-07-20 09:15:18 -05:00
David Hashe 6a288d9de3 slicc: support for multiple message types on the same buffer
This patch allows SLICC protocols to use more than one message type with a
message buffer. For example, you can declare two in ports as such:

  in_port(ResponseQueue_in, ResponseMsg, responseFromDir, rank=3) { ... }
  in_port(tgtResponseQueue_in, TgtResponseMsg, responseFromDir, rank=2) { ... }
2015-07-20 09:15:18 -05:00
Brad Beckmann b609b032aa slicc: fatal->panic on invalid transitions 2015-08-01 12:37:52 -04:00
David Hashe 3444d5f359 mem: Hit callback delay fix
This patch was created by Bihn Pham during his internship at AMD.

There is no need to delay hit callback response messages by a cycle because
the response latency is already incurred in the Ruby protocol. This ensures
correct timing of memory instructions.
2015-07-20 09:15:18 -05:00
David Hashe 8f71e667b3 cpu: Fixed a bug on where to fetch the next instruction from
Figure out if the next instruction to fetch comes from the micro-op ROM
or not. Otherwise, wrong instructions may be fetched.
2015-07-20 09:15:18 -05:00
David Hashe a2d9aae3c3 x86: x86 instruction-implementation bug fixes
Added explicit data sizes and an opcode type for correct execution.
2015-07-20 09:15:18 -05:00
Brad Beckmann 9560893f0d util: added .cl OpenCL extension to file_type.py 2015-07-20 09:15:18 -05:00
Brad Beckmann d87fe7b3f4 util: added .mk makefile extension to file_types.py 2015-07-20 09:15:18 -05:00
Brad Beckmann 0c78abb302 ruby: re-added the addressToInt slicc interface function
This helper function is very useful converting address offsets to integers
that can be used for protocol specific destination mapping.
2015-07-20 09:15:18 -05:00
David Hashe d0f6aad3c6 syscall: Add readlink to x86 with special case /proc/self/exe
This patch implements the correct behavior.
2015-07-20 09:15:18 -05:00
Brad Beckmann 4710eba588 ruby: add useful dprints to sequencer
Added two data block dprints that are useful when tracking down data check
failures in the ruby random tester.
2015-07-20 09:15:18 -05:00
David Hashe a254786a19 slicc: isinstance bugfix
This fix prevents spurious errors when searching for a symbol that may be
located in one of multiple symbol tables.
2015-07-20 09:15:18 -05:00
Anthony Gutierrez a72c75dcea util: add a vimrc that matches gem5 style guide 2015-07-31 22:53:17 -04:00
Andreas Sandberg 447a6b6442 stats: Update switcheroo reference stats
The Minor draining fixes affect perturb the timing slightly since it
affects how the simulator is drained. Update reference statistics to
reflect this expected change.
2015-07-31 17:04:59 +01:00
Andreas Sandberg f789d729b5 cpu: Update debug message from Fetch1 isDrained() in Minor
Fix a spurious %s and include the state of the Fetch1 stage in the
debug printout.
2015-07-31 17:04:59 +01:00
Andreas Sandberg f73b05431a cpu: Fix Minor drain issues when switched out
The Minor CPU currently doesn't drain properly when it is switched
out. This happens because Fetch 1 expects to be in the FetchHalted
state when it is drained. However, because the CPU is switched out, it
is stuck in the FetchWaitingForPC state. Fix this by ignoring drain
requests and returning DrainState::Drained from MinorCPU::drain() if
the CPU is switched out. This is always safe since a switched out CPU,
by definition, doesn't have any instructions in flight.
2015-07-31 17:04:59 +01:00
Andreas Sandberg c50e429001 stats: Bump stats after Minor switcheroo inclusion 2015-07-30 10:16:36 +01:00
Andreas Sandberg decd6b958e tests: Add Minor to the ARM full switcheroo tests
Add the Minor CPU to the RealView and RealView64 full switcheroo
tests.
2015-07-30 10:16:28 +01:00
Andreas Sandberg ff8195235e cpu: Only activate thread 0 in Minor if the CPU is active
Minor currently activates thread 0 in startup() to work around an
issue where activateContext() is called from LiveProcess before the
process entry point is known. When activateContext() is called, Minor
creates a branch instruction to the process's entry point. The first
time it is called, the branch points to an undefined location (0). The
call in startup() updates the branch to point to the actual entry
point.

When instantiating a switched out Minor CPU, it still tries to
activate thread 0. This is clearly incorrect since a switched out CPU
can't have any active threads. This changeset adds a check to ensure
that the thread is active before reactivating it.
2015-07-30 10:15:50 +01:00
Andreas Sandberg 473a0dcc63 cpu: Fix drain issues in the Minor CPU
The drain refactor patches introduced a couple of bugs in the way
Minor handles draining. This patch fixes an incorrect assert and a
case of infinite recursion when the CPU signals drain done.
2015-07-30 10:15:50 +01:00
Andreas Hansson d8f732273e stats: Update stats for clean eviction addition 2015-07-30 03:42:27 -04:00
Andreas Hansson 6fac40ceb0 mem: Add missing clean eviction on uncacheable access
This patch adds a missing clean eviction, occuring when an uncacheable
access flushes and invalidates an existing block.
2015-07-30 03:42:25 -04:00
Andreas Hansson 540e59fd70 mem: Remove unused RequestCause in cache
This patch removes the RequestCause, and also simplifies how we
schedule the sending of packets through the memory-side port. The
deassertion of bus requests is removed as it is not used.
2015-07-30 03:41:43 -04:00
David Guillen-Fandos 0c89c15b23 mem: Make caches way aware
This patch makes cache sets aware of the way number. This enables
some nice features such as the ablity to restrict way allocation. The
implemented mechanism allows to set a maximum way number to be
allocated 'k' which must fulfill 0 < k <= N (where N is the number of
ways). In the future more sophisticated mechasims can be implemented.
2015-07-30 03:41:42 -04:00
Andreas Hansson 5a18e181ff mem: Transition away from isSupplyExclusive for writebacks
This patch changes how writebacks communicate whether the line is
passed as modified or owned. Previously we relied on the
isSupplyExclusive mechanism, which was originally designed to avoid
unecessary snoops.

For normal cache requests we use the sharedAsserted mechanism to
determine if a block should be marked writeable or not, and with this
patch we transition the writebacks to also use this
mechanism. Conceptually this is cleaner and more consistent.
2015-07-30 03:41:40 -04:00
Andreas Hansson 5902e29e84 mem: Tidy up CacheBlk class
This patch modernises and tidies up the CacheBlk, removing dead code.
2015-07-30 03:41:39 -04:00
Andreas Hansson 41b39b22cd mem: Tidy up packet
Some minor fixes and removal of dead code. Changing the flags to be
enums rather than static const (to avoid any linking issues caused by
the latter). Also adding a getBlockAddr member which hopefully can
slowly finds its way into caches, snoop filters etc.
2015-07-30 03:41:38 -04:00
Andreas Hansson 222d920d6b stats: Bump stats to match current behaviour
Somehow this one seems to have slipped through. Perhaps
non-determinism somewhere?
2015-07-30 03:41:36 -04:00
Andreas Hansson 85a44e24dc cpu: Fix issue identified by UBSan 2015-07-30 03:41:22 -04:00
Nilay Vaish aafa5c3f86 revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
Nilay Vaish 608641e23c cpu: implements vector registers
This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.
2015-07-26 10:21:20 -05:00
Nilay Vaish 6e354e82d9 cpu: o3: slight correction to identation in rename_impl.hh 2015-07-26 10:20:07 -05:00
Brandon Potter 4f7c969e27 style: change Process function calls to use camelCase
The Process class methods were using an improper style and this subsequently
bled into the system call code.  The following regular expressions should be
helpful if someone transitions private system call patches on top of these
changesets:

s/alloc_fd/allocFD/
s/sim_fd(/simFD(/
s/sim_fd_obj/getFDEntry/
s/fix_file_offsets/fixFileOffsets/
s/find_file_offsets/findFileOffsets/
2015-07-24 12:25:23 -07:00
Brandon Potter d5a7f09eb1 syscall_emul: standardized file descriptor name and add return checks.
The patch clarifies whether file descriptors are host file descriptors or
target file descriptors in the system call code.  (Host file descriptors
are file descriptors which have been allocated through real system calls
where target file descriptors are allocated from an array in the Process
class.)
2015-07-24 12:25:23 -07:00
Brandon Potter b90711ea53 base: refactor process class (specifically FdMap and friends)
This patch extends the previous patch's alterations around fd_map.  It cleans
up some of the uglier code in the process file and replaces it with a more
concise C++11 version.  As part of the changes, the FdMap class is pulled out
of the Process class and receives its own file.
2015-07-24 12:25:22 -07:00
Brandon Potter ef08046af4 syscall_emul: file descriptor interface changes
This patch gets rid of unused Process::dup_fd method and does minor
refactoring in the process class files.  The file descriptor max has been
changed to be the number of file descriptors since this clarifies the loop
boundary condition and cleans up the code a bit.  The fd_map field has been
altered to be dynamically allocated as opposed to being an array; the
intention here is to build on this is subsequent patches to allow processes
to share their file descriptors with the clone system call.
2015-07-24 12:25:22 -07:00
Brandon Potter 582793468d ruby: dma sequencer: removes redundant code 2015-07-24 12:25:22 -07:00
Nilay Vaish 1b71a20391 ruby: network: NetworkLink inherits from Consumer now. 2015-07-22 11:20:07 -05:00
Nilay Vaish 0b163ea707 configs: network test: remove redundant physical memory 2015-07-21 10:08:25 -05:00