sanchayanmaity/gem5
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485 commits

Author SHA1 Message Date
Vince Weaver
0f569b4d9d SPARC: Make resTemp in udivcc wide enough to hold all the bits we need. 2009-09-15 05:48:20 -07:00
Steve Reinhardt
1c28004654 Clean up some inconsistencies with Request flags. 2009-08-01 22:50:13 -07:00
Gabe Black
ef4e8b04a6 SPARC: Fix a minor compile bug in native trace on gcc > 4.1. 2009-07-25 15:14:00 -07:00
Gabe Black
3e8e813218 CPU: Separate out native trace into ISA (in)dependent code and SimObjects. 
--HG--
rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc
rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh
rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
 2009-07-19 23:54:56 -07:00
Gabe Black
64fe7af51a SPARC: Set up a lookup table for integer register flattening. 
Using a look up table changed the run time of the SPARC_FS solaris boot
regression from:

real    14m45.951s
user    13m57.528s
sys     0m3.452s

to:

real    12m19.777s
user    12m2.685s
sys     0m2.420s
 2009-07-10 01:01:47 -07:00
Gabe Black
60d47aa5f9 SPARC: Fold the MiscRegFile all the way into the ISA object. 2009-07-09 20:28:50 -07:00
Gabe Black
c9a27d85b9 Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. 2009-07-08 23:02:22 -07:00
Gabe Black
b398b8ff1b Registers: Add a registers.hh file as an ISA switched header. 
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.

--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
 2009-07-08 23:02:21 -07:00
Gabe Black
5c37d10624 Registers: Eliminate the ISA defined RegFile class. 2009-07-08 23:02:21 -07:00
Gabe Black
43345bff6c Registers: Move the PCs out of the ISAs and into the CPUs. 2009-07-08 23:02:21 -07:00
Gabe Black
faa6ebebe1 SPARC: Phase out SPARC's intregfile.hh. 2009-07-08 23:02:20 -07:00
Gabe Black
a480ba00b9 Registers: Eliminate the ISA defined integer register file. 2009-07-08 23:02:20 -07:00
Gabe Black
0cb180ea0d Registers: Eliminate the ISA defined floating point register file. 2009-07-08 23:02:20 -07:00
Gabe Black
25884a8773 Registers: Get rid of the float register width parameter. 2009-07-08 23:02:20 -07:00
Gabe Black
32daf6fc3f Registers: Add an ISA object which replaces the MiscRegFile. 
This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
 2009-07-08 23:02:20 -07:00
Gabe Black
240e214236 SPARC: Fix the parenthesis in inUserMode. 2009-07-05 16:07:09 -07:00
Nathan Binkert
8d2e51c7f5 includes: sort includes again 2009-05-17 14:34:52 -07:00
Nathan Binkert
709d859530 includes: use base/types.hh not inttypes.h or stdint.h 2009-05-17 14:34:51 -07:00
Nathan Binkert
eef3a2e142 types: Move stuff for global types into src/base/types.hh 
--HG--
rename : src/sim/host.hh => src/base/types.hh
 2009-05-17 14:34:50 -07:00
Gabe Black
9d0fa27d09 SPARC: Tighten up the clone system call and SPARCs copyRegs. 2009-04-24 23:11:21 -07:00
Steve Reinhardt
52b6764f31 syscall: Resolve conflicts between m5threads and Gabe's recent SE changes. 2009-04-21 08:17:36 -07:00
Daniel Sanchez
b0e9654f86 Commit m5threads package. 
This patch adds limited multithreading support in syscall-emulation
mode, by using the clone system call.  The clone system call works
for Alpha, SPARC and x86, and multithreaded applications run
correctly in Alpha and SPARC.
 2009-04-21 08:17:36 -07:00
Gabe Black
ca85981478 SE mode: Make keeping track of the number of syscalls less hacky. 2009-04-19 04:15:32 -07:00
Steve Reinhardt
8882dc1283 Get rid of the Unallocated thread context state. 
Basically merge it in with Halted.
Also had to get rid of a few other functions that
called ThreadContext::deallocate(), including:
 - InOrderCPU's setThreadRescheduleCondition.
 - ThreadContext::exit().  This function was there to avoid terminating
   simulation when one thread out of a multi-thread workload exits, but we
   need to find a better (non-cpu-centric) way.
 2009-04-15 13:13:47 -07:00
Nathan Binkert
e0de2c3443 tlb: More fixing of unified TLB 2009-04-08 22:21:27 -07:00
Gabe Black
7b5a96f06b tlb: Don't separate the TLB classes into an instruction TLB and a data TLB 2009-04-08 22:21:27 -07:00
Steve Reinhardt
307905095c Fix Num_Syscall_Descs check bug in non-x86 ISAs. 
(See cset d35d2b28df38 for x86 fix.)
 2009-02-28 20:14:22 -05:00
Gabe Black
9a000c5173 Processes: Make getting and setting system call arguments part of a process object. 2009-02-27 09:22:14 -08:00
Gabe Black
437b02884d ISA: Get rid of the get*RegName functions. 2009-02-25 10:22:31 -08:00
Gabe Black
3b01535ec1 SPARC: Get rid of the state keeping track of register frames. 2009-02-25 10:22:25 -08:00
Gabe Black
4633677145 ISA: Set up common trace flags for tracing registers. 2009-02-25 10:22:17 -08:00
Gabe Black
44d5351071 ISA: Get rid of FlattenIntIndex function. 2009-02-25 10:22:09 -08:00
Gabe Black
c1c61d52a0 SPARC: Get rid of flattenIndex in the int register file. 2009-02-25 10:21:59 -08:00
Gabe Black
ce2e50a64c ISA: Use the "Stack" traceflag for DPRINTFs about the initial stack frame. 2009-02-25 10:21:52 -08:00
Gabe Black
9d5b6e377f SPARC: Get rid of the setGlobals function. 2009-02-25 10:21:46 -08:00
Gabe Black
f41ce6b5e9 SPARC: Get rid of the setCWP function. 2009-02-25 10:21:40 -08:00
Gabe Black
88ee7d4c32 SPARC: Add a traceflag for register windows. 2009-02-25 10:21:33 -08:00
Gabe Black
6ed47e9464 CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it. 2009-02-25 10:16:15 -08:00
Gabe Black
15940d06b5 SPARC: Adjust a few instructions to not write registers in initiateAcc. 2009-02-25 10:16:04 -08:00
Gabe Black
5605079b1f ISA: Replace the translate functions in the TLBs with translateAtomic. 2009-02-25 10:15:44 -08:00
Lisa Hsu
5d029ff11e sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. 2009-02-16 17:47:39 -05:00
Ali Saidi
e7293dd24e Errors: Use the correct panic/warn/fatal/info message in some places. 2009-01-30 20:04:17 -05:00
Gabe Black
d9794784ba CPU: Add a setCPU function to the interrupt objects. 2009-01-25 20:29:03 -08:00
Nathan Binkert
c9d3113015 tracing: Add help strings for some of the trace flags 2009-01-19 09:59:14 -08:00
Nathan Binkert
8153790d00 SCons: centralize the Dir() workaround for newer versions of scons. 
Scons bug id: 2006 M5 Bug id: 308
 2009-01-13 14:17:50 -08:00
Gabe Black
02cd18f536 SPARC: Truncate syscall args and return values appropriately. 2008-12-16 23:06:37 -08:00
Lisa Hsu
993b7be4bb imported patch aux-fix.patch 2008-12-07 15:07:42 -05:00
Lisa Hsu
e2c7618e50 This patch pulls out the auxiliary vector struct from individual ISA 
LiveProcesses to the base LiveProcess definition so anyone can use them.
 2008-12-04 18:03:35 -05:00
Steve Reinhardt
4514f565e3 syscalls: fix latent brk/obreak bug. 
Bogus calls to ChunkGenerator with negative size were triggering
a new assertion that was added there.
Also did a little renaming and cleanup in the process.
 2008-11-15 09:30:10 -08:00
Nathan Binkert
9c49bc7b00 mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00