Commit graph

9 commits

Author SHA1 Message Date
Lena Olson 7c39d5df7e ruby: restrict Address to being a type and not a variable name
Change all occurrances of Address as a variable name to instead use Addr.
Address is an allowed name in slicc even when Address is also being used as a
type, leading to declarations of "Address Address". While this works, it
prevents adding another field of type Address because the compiler then thinks
Address is a variable name, not type.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2013-06-18 16:58:33 -05:00
Nilay Vaish 5ffc165939 ruby: improved support for functional accesses
This patch adds support to different entities in the ruby memory system
for more reliable functional read/write accesses. Only the simple network
has been augmented as of now. Later on Garnet will also support functional
accesses.
The patch adds functional access code to all the different types of messages
that protocols can send around. These messages are functionally accessed
by going through the buffers maintained by the network entities.
The patch also rectifies some of the bugs found in coherence protocols while
testing the patch.

With this patch applied, functional writes always succeed. But functional
reads can still fail.
2012-10-15 17:51:57 -05:00
Nilay Vaish d58f84c481 ruby: remove unused code in protocols 2012-10-02 14:35:44 -05:00
Nilay Vaish 95664da097 MI coherence protocol: add copyright notice 2012-09-30 13:20:53 -05:00
Brad Beckmann faf1d97f24 ruby: fixed dma mi example to work with multiple dma ports 2009-11-18 13:55:58 -08:00
Derek Hower 33b28fde7a slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers
This changeset contains a lot of different changes that are too
mingled to separate.  They are:

1.  Added MOESI_CMP_directory

I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller.  I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.

2.  DMA Sequencer uses a generic SequencerMsg

I will eventually make the cache Sequencer use this type as well.  It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.

3. Parameterized Controllers

SLICC controllers can now take custom parameters to use for mapping,
latencies, etc.  Currently, only int parameters are supported.
2009-08-04 12:52:52 -05:00
Derek Hower 4b7ea4cb51 ruby: fixed dma sequencer bug
The DMASequencer was still using a parameter from the old RubyConfig,
causing an offset error when the requested data wasn't block aligned.
This changeset also includes a fix to MI_example for a similar bug.
2009-07-18 17:03:51 -05:00
Nathan Binkert 92de70b69a ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it.  One known regression
is that atomic memory operations do not seem to work properly anymore.
2009-07-06 15:49:47 -07:00
Nathan Binkert 2f30950143 ruby: Import ruby and slicc from GEMS
We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
2009-05-11 10:38:43 -07:00