Commit graph

5 commits

Author SHA1 Message Date
Ali Saidi
bd367d4825 implement vtophys and 32bit gdb support
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/sparc/arguments.hh:
    move Copy* to vport since it's generic for all the ISAs
src/arch/sparc/isa_traits.hh:
    the Solaris kernel sets up a virtual-> real mapping for all memory starting at SegKPMBase
src/arch/sparc/pagetable.hh:
    add a class for getting bits out of the TteTag
src/arch/sparc/remote_gdb.cc:
    add 32bit support kinda.... If its 32 bit
src/arch/sparc/remote_gdb.hh:
    Add 32bit register offsets too.
src/arch/sparc/tlb.cc:
    cleanup generation of tsb pointers
src/arch/sparc/tlb.hh:
    add function to return tsb pointers for an address
    make lookup public so vtophys can use it
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    write vtophys for sparc
src/base/bitfield.hh:
    return a mask of bits first->last
src/mem/vport.cc:
src/mem/vport.hh:
    move Copy* here since it's ISA generic

--HG--
extra : convert_revision : c42c331e396c0d51a2789029d8e232fe66995d0f
2007-02-18 19:57:46 -05:00
Ali Saidi
271b9a5435 first cut at a sparc tlb
src/arch/sparc/SConscript:
    Add code to serialize/unserialze tlb entries
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
    update asi names for how they're listed in the supplement
    add asis
    add more asi functions
src/arch/sparc/isa_traits.hh:
    move the interrupt stuff and some basic address space stuff into isa traits
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
    add mmu registers to tlb
    get rid of implicit asi stuff... the tlb will handle it
src/arch/sparc/regfile.hh:
    make isnt/dataAsid return ints not asis
src/arch/sparc/tlb.cc:
src/arch/sparc/tlb.hh:
    first cut at sparc tlb
src/arch/sparc/vtophys.hh:
    pagatable nedes to be included here
src/mem/request.hh:
    add asi and if the request is a memory mapped register to the requset object
src/sim/host.hh:
    fix incorrect definition of LL

--HG--
extra : convert_revision : 6c85cd1681c62c8cd8eab04f70b1f15a034b0aa3
2006-11-23 01:42:57 -05:00
Kevin Lim
eb0e416998 Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar.

src/arch/alpha/arguments.cc:
src/arch/alpha/arguments.hh:
src/arch/alpha/ev5.cc:
src/arch/alpha/faults.cc:
src/arch/alpha/faults.hh:
src/arch/alpha/freebsd/system.cc:
src/arch/alpha/freebsd/system.hh:
src/arch/alpha/isa/branch.isa:
src/arch/alpha/isa/decoder.isa:
src/arch/alpha/isa/main.isa:
src/arch/alpha/linux/process.cc:
src/arch/alpha/linux/system.cc:
src/arch/alpha/linux/system.hh:
src/arch/alpha/linux/threadinfo.hh:
src/arch/alpha/process.cc:
src/arch/alpha/regfile.hh:
src/arch/alpha/stacktrace.cc:
src/arch/alpha/stacktrace.hh:
src/arch/alpha/tlb.cc:
src/arch/alpha/tlb.hh:
src/arch/alpha/tru64/process.cc:
src/arch/alpha/tru64/system.cc:
src/arch/alpha/tru64/system.hh:
src/arch/alpha/utility.hh:
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/mips/faults.cc:
src/arch/mips/faults.hh:
src/arch/mips/isa_traits.cc:
src/arch/mips/isa_traits.hh:
src/arch/mips/linux/process.cc:
src/arch/mips/process.cc:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/arch/mips/regfile/regfile.hh:
src/arch/mips/stacktrace.hh:
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/linux/process.cc:
src/arch/sparc/linux/process.hh:
src/arch/sparc/process.cc:
src/arch/sparc/regfile.hh:
src/arch/sparc/solaris/process.cc:
src/arch/sparc/stacktrace.hh:
src/arch/sparc/ua2005.cc:
src/arch/sparc/utility.hh:
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
src/base/remote_gdb.cc:
src/base/remote_gdb.hh:
src/cpu/base.cc:
src/cpu/base.hh:
src/cpu/base_dyn_inst.hh:
src/cpu/checker/cpu.cc:
src/cpu/checker/cpu.hh:
src/cpu/checker/exec_context.hh:
src/cpu/cpu_exec_context.cc:
src/cpu/cpu_exec_context.hh:
src/cpu/cpuevent.cc:
src/cpu/cpuevent.hh:
src/cpu/exetrace.hh:
src/cpu/intr_control.cc:
src/cpu/memtest/memtest.hh:
src/cpu/o3/alpha_cpu.hh:
src/cpu/o3/alpha_cpu_impl.hh:
src/cpu/o3/alpha_dyn_inst_impl.hh:
src/cpu/o3/commit.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/regfile.hh:
src/cpu/o3/thread_state.hh:
src/cpu/ozone/back_end.hh:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/cpu_impl.hh:
src/cpu/ozone/front_end.hh:
src/cpu/ozone/front_end_impl.hh:
src/cpu/ozone/inorder_back_end.hh:
src/cpu/ozone/lw_back_end.hh:
src/cpu/ozone/lw_back_end_impl.hh:
src/cpu/ozone/lw_lsq.hh:
src/cpu/ozone/lw_lsq_impl.hh:
src/cpu/ozone/thread_state.hh:
src/cpu/pc_event.cc:
src/cpu/pc_event.hh:
src/cpu/profile.cc:
src/cpu/profile.hh:
src/cpu/quiesce_event.cc:
src/cpu/quiesce_event.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
src/cpu/thread_state.hh:
src/dev/alpha_console.cc:
src/dev/ns_gige.cc:
src/dev/sinic.cc:
src/dev/tsunami_cchip.cc:
src/kern/kernel_stats.cc:
src/kern/kernel_stats.hh:
src/kern/linux/events.cc:
src/kern/linux/events.hh:
src/kern/system_events.cc:
src/kern/system_events.hh:
src/kern/tru64/dump_mbuf.cc:
src/kern/tru64/tru64.hh:
src/kern/tru64/tru64_events.cc:
src/kern/tru64/tru64_events.hh:
src/mem/vport.cc:
src/mem/vport.hh:
src/sim/faults.cc:
src/sim/faults.hh:
src/sim/process.cc:
src/sim/process.hh:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
src/sim/syscall_emul.cc:
src/sim/syscall_emul.hh:
src/sim/system.cc:
src/cpu/thread_context.hh:
src/sim/system.hh:
src/sim/vptr.hh:
    Change ExecContext to ThreadContext.

--HG--
rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh
extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e
2006-06-06 17:32:21 -04:00
Ali Saidi
cb0cf2dd8a Updated Authors from bk prs info
--HG--
extra : convert_revision : 77f475b156d81c03a2811818fa23593d5615c685
2006-05-31 19:26:56 -04:00
Ali Saidi
dc29a7c8ae split off fullsystem and se iprs into two functions to remove lots of #ifs
setup all initialization stuff for UA2005
Setup fullsys build options
Start to make fullsystem compile

src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    RCS to BitKeeper
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Add support for doing virtual to physical translation using the in-memory
    page table
src/arch/sparc/vtophys.cc:
    a tad bit of error checking
src/arch/sparc/vtophys.hh:
    Cleanup of full-system global variables, primarily in simple_cpu.cc,
    to allow multi-system simulations.  (Multiple systems not yet yested
    though.)  Also changes to build sim_smt in full-system mode (though
    with only SimpleCPU and not the full timing CPU for now).

    Still to do: minimize changes in SimpleCPU code between full-system
    and application modes... way too many ifdefs there.  Much of the
    full-system stuff moved into SimpleCPU should be put in a new System
    object to allow multiprocessor simulations.

    Converted last remaining modules from C to C++ (mostly in /old).
    Renamed all .c files to .cc and a few .h files to .hh.

    Renamed architecture-specific files in arch/$TARGET from
    $TARGET.{cc,hh,def} to machine.{cc,hh,def} to get rid of pointless
    intermediate files in object directory.  Split exo-specific
    definitions out of machine.hh into machine_exo.h.

    Specifics:

    In machine.def, null resource descriptors must be FUClamd_NA (and not
    NA) to pass C++ type checking.

    Enhanced error checking/reporting in bas
src/arch/sparc/vtophys.cc:
    - Get rid of my String class, the Vector class, the bitvector class, and my
    doubly linked list class.
    - Convert tokenize, to_number (formerly StringToNumber) and eat_white to
    function on stl strings.
    - Change most cases of char * and const char * to string, or const string &
    - Some formatting and style nits, but not too many.
src/arch/sparc/vtophys.cc:
    simplify
src/arch/sparc/vtophys.cc:

    Renamed SimpleCPU::(read|write)_(byte|half|word|qword) to just read &
    write, overloaded on the type of the 'data' argument.  Merged the
    full-system and non-full-system implementations of these eight
    original functions into two common template functions.

    To support this, also renamed (read|write)[1248] on memory_object and
    derivatives to just read & write, again overloaded on the type of the
    'data' argument.  Many of these functions could now be condensed into
    a few template functions (though with a level of indirection so that
    the interface can remain virtual).  I did not do that though.
src/arch/sparc/vtophys.cc:
    First pass at compiling with gcc 3.x.  Lots of "std::" in header files,
    "using namespace std" in source files.  (Note policy of not putting "using"
    statements in headers or before includes in sources.)

    Still not able to compile with gcc 3.2.
    Errors:
    - Can't create an ifstream from a file descriptor anymore (breaks IniFile).
    - "`class MSHR::MSHRegister' is private" errors in mshr.cc and prefetch_cache.cc:
    not clear why since it's in the public part of the class declaration.
    - cpu.cc:879: can't match a reference and 0 (specifically "no match for `bool ?
    SimObjectParam<PipeTrace*>& : int' operator")
    - pipetrace.cc: "invalid conversion from `int' to `std::_Ios_Fmtflags'"
    Warnings:
    - strstream now deprecated... needs some rewriting in sat_counter.hh
    and hybrid_pred.hh (need to get all that code out of the headers anyway)
    - trace.hh macro problem: cpp now says 'pasting "::" and "Event" does not
    give a valid preprocessing token'
    - major "implicit typename" issues in base/sized.hh
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Implement some interval statistics for full system mode.
    Create a callpal function that is called when a callpal occurs so it's easier
    to manipulate the statics.
    Rework the vtophys stuff to make it a bit cleaner.
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Get rid of almost all old-style object names.  This commit is equivalent
    to running the following script on the current head:

    #! /bin/sh

    find \( -name '*.cc' -o -name '*.hh' \) -exec perl -pi -e '\
    s/\bmemory_object\b(?!\.hh)/FunctionalMemory/g;\
    s/\bvirtual_memory\b(?!\.hh)/VirtualMemory/g;\
    s/\bmain_memory\b(?!\.hh)/MainMemory/g;\
    s/\bphysical_memory\b(?!\.hh)/PhysicalMemory/g;\
    s/\bspec_memory\b(?!\.hh)/SpeculativeMemory/g;\
    s/\bMemObj\b(?!\.hh)/TimingMemObj/g;\
    s/\bmemory_translation\b(?!\.hh)/AddressTranslator/g;\
    s/\balpha_tlb\b(?!\.hh)/AlphaTlb/g;\
    s/\balpha_itb\b(?!\.hh)/AlphaItb/g;\
    s/\balpha_dtb\b(?!\.hh)/AlphaDtb/g;\
    s/\bmemory_controller\b(?!\.hh)/MemoryController/g;\
    s/\bstorebuffer_t\b(?!\.hh)/StoreBuffer/g;\
    s/\bstorebuffer_entry_t\b(?!\.hh)/StoreBufferEntry/g;\
    s/\bcreate_vector_t\b(?!\.hh)/CreateVector/g;\
    s/\bcv_spec_state\b(?!\.hh)/CreateVecSpecState/g;\
    s/\bspec_state_list\b(?!\.hh)/SpecStateList/g;\
    s/\bdyn_inst_t\b(?!\.hh)/DynInst/g;' {} \;
src/arch/sparc/vtophys.cc:
    since cprintf properly deals with 64-bit types, stop using FMT* as much as
    possible
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Change byte_t etc. to C99 standard int8_t etc.
    Other than old/host.h, all other changes were produced by this script:

    #! /bin/sh

    find \( -name '*.cc' -o -name '*.hh' -o -name '*.c' -o -name '*.h' -o -name 'machine.def' \) -exec perl -pi -e '\
    s/\bbyte_t\b(?!\.hh)/uint8_t/g;\
    s/\bsbyte_t\b(?!\.hh)/int8_t/g;\
    s/\bhalf_t\b(?!\.hh)/uint16_t/g;\
    s/\bshalf_t\b(?!\.hh)/int16_t/g;\
    s/\bword_t\b(?!\.hh)/uint32_t/g;\
    s/\bsword_t\b(?!\.hh)/int32_t/g;\
    s/\bqword_t\b(?!\.hh)/uint64_t/g;\
    s/\bsqword_t\b(?!\.hh)/int64_t/g;\
    s/\bbool_t\b(?!\.hh)/bool/g;\
    s/\bdfloat_t\b(?!\.hh)/double/g;\
    s/\bsfloat_t\b(?!\.hh)/float/g;' {} \;
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Add CVS Id tags
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Massive renaming to (almost) eliminate all md_* and MD_* names
    in preparation for total exorcism of machine.def.

    Most of the changes in this commit were performed with the
    following perl script (perl -pi <script> <files>).  A small
    amount of manual fixup was needed to (mostly getting rid of
    the Addr typedefs in the various memory objects now that
    the former md_addr_t has that name).

    # rename machine-dependent types and constants (will be moving into ISA traits object)
    s/md_addr_t/Addr/g;
    s/md_intreg_t/IntReg/g;
    s/md_gpr_t/IntRegFile/g;
    s/md_fpreg_t/FloatReg/g;
    s/md_fpr_t/FloatRegFile/g;
    s/md_ctrlreg_t/MiscReg/g;
    s/md_ctrl_t/MiscRegFile/g;
    s/md_ipr_t/InternalProcReg/g;
    s/md_anyreg_t/AnyReg/g;
    s/md_inst_t/MachInst/g;
    s/regs_t/RegFile/g;
    # manually fix declaration in old/regs.h and a few forward decls
    s/struct RegFile/RegFile/g;
    s/MD_NUM_IREGS/NumIntRegs/g;
    s/MD_NUM_FREGS/NumFloatRegs/g;
    s/MD_NUM_CREGS/NumMiscRegs/g;
    s/MD_IPR_NUM/NumInternalProcRegs/g;
    s/MD_TOTAL_REGS/TotalNumRegs/g;
    s/MD_REG_ZERO/ZeroReg/g;
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    New ISA description system.  No more machine.def!
    Instructions are now decoded into StaticInst objects, and all static
    instruction properties (including execution behavior) are associated
    with those objects.  Extended documentation in progress.
    Currently supports Alpha only; PISA will not compile.
    Use END_OF_MACHINE_DOT_DEF tag to extract previous version.
src/arch/sparc/vtophys.cc:
    get rid of MD_IPR_foo and call it IPR_foo
    add some comments to describe what the various PALtemp registers do
    formatting
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    license
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    a little style
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Add attribution to license.
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Make include paths explicit.
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    CopyData and CopyString moved from kernel.cc to vtophys.cc
    kernel.cc and kernel.hh moved to kern/tru64
src/arch/sparc/vtophys.hh:
    Include isa_traits.hh for Addr
src/arch/sparc/vtophys.cc:
    formatting fixes
src/arch/sparc/vtophys.cc:
    fix up vtophys to deal with translations if there
    is no ptbr, and to deal with PAL addresses
    add ptomem which is just a wrapper for dma_addr
src/arch/sparc/vtophys.hh:
    add ptomem which is a wrapper for dma_addr with the
    same usage as vtomem
src/arch/sparc/vtophys.cc:
    Fix to remote debugger while in PAL code
src/arch/sparc/vtophys.cc:
    Remote an old hack that is now unnecessary
src/arch/sparc/vtophys.cc:
    Removed buggy code that tries to fix PAL addresses (may cause problems
    while trying to debug in PAL code, but that should do this fix outside
    of vtophys)
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Updated Copyright
src/arch/sparc/vtophys.cc:
    added back some code andrew removed and couldn't remember why.
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    rename CopyData to CopyOut and implement CopyIn to copy data
    from the simulator into the simulatee
src/arch/sparc/vtophys.cc:
    fixed a bad merge from linux<->tru64
src/arch/sparc/vtophys.cc:
    Check max address pal can be at so we don't do the wrong conversion
    if gdb asks for an unaligned access.
src/arch/sparc/vtophys.cc:
    PGOFSET -> ALPHA_PGOFSET to avoid include file problems
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    in the arch/alpha directory we should use arch/alpha, not
    targetarch.  sort includes while we're here.
src/arch/sparc/vtophys.cc:
    use new constants, functions and structs to clean up the
    vtophys code.
src/arch/sparc/vtophys.hh:
    Clean up a little bit and make the protypes match new changes.
src/arch/sparc/vtophys.cc:
    deal with isa addition
src/arch/sparc/vtophys.cc:
    shuffle files around for new directory structure
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Remove RCS Id string
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    Update copyright dates and author list
src/arch/sparc/vtophys.cc:
    Added a using directive for AlphaISA
src/arch/sparc/vtophys.hh:
    Added the AlphaISA namespace specifier where needed
src/arch/sparc/vtophys.hh:
    Made Addr a global type
src/arch/sparc/vtophys.cc:
    Change access to the IPR to go through the XC.
src/arch/sparc/vtophys.cc:
    Avoid directly accessing objects within the XC.
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    fixed for new memory system
    put in namespace AlphaISA
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
    Remove authors from copyright.
src/arch/sparc/vtophys.cc:
    bk cp alpha/vtophys.cc sparc/vtophys.cc
src/arch/sparc/vtophys.hh:
    bk cp alpha/vtophys.hh sparc/vtophys.hh
src/arch/sparc/SConscript:
    remove fullsystem files that don't exist
src/arch/sparc/isa_traits.hh:
    split off fullsystem and se iprs into two functions to remove lots of #ifs
src/arch/sparc/regfile.hh:
    split off fullsystem and se iprs into two functions to remove lots of #ifs
    setup all initialization stuff for UA2005
src/arch/sparc/system.cc:
src/arch/sparc/system.hh:
    Add system level tick storage to make stick be syncronized across multiple processors
src/arch/sparc/vtophys.hh:
    start to create a vtophys for Sparc
src/base/loader/symtab.hh:
    Addr is defined in sim/host.hh

--HG--
extra : convert_revision : ae4658e6bc2e2b51d7fb1c711d069ffe99e1377d
2006-05-29 16:53:47 -04:00