Commit graph

192 commits

Author SHA1 Message Date
Nathan Binkert
91f5736fd3 Move max_time and progress_interval parameters to the Root
object and get rid of the ParamContext that each used to have.

python/m5/objects/Root.py:
    Add max_time and progress_interval to the Root object
sim/root.cc:
    Add max_time and progress_interval to the Root object.  These
    parameters used to be in their own contexts in sim_events.cc
sim/sim_events.cc:
    Get rid of the ParamContext for max cycles and the progress
    event.  Move the functionality to the Root object
sim/sim_events.hh:
    Move ProgressEvent declaration to the header so that it can
    be used in other files.

--HG--
extra : convert_revision : ff664b806855e8eb9201b8a25392aa53204464f0
2005-06-22 09:59:13 -04:00
Steve Reinhardt
ad8b9636f8 Many files:
Update copyright dates and author list

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
    Update copyright dates and author list

--HG--
extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-05 05:16:00 -04:00
Nathan Binkert
e71ee12eac move eio stuff to encumbered
--HG--
extra : convert_revision : 9061382dba285c84931f8825e7159db0e9899944
2005-06-05 02:26:19 -04:00
Nathan Binkert
fb1282de1a Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : b0c9b044b44a1bfc4cded2ebfa240b799dd4a5a0
2005-06-05 00:45:10 -04:00
Steve Reinhardt
8170b4308f Get rid of broken "long help" option.
--HG--
extra : convert_revision : 8b7c646ce416d2a2a4919acbb87c0b6d65920d42
2005-06-04 23:13:09 -04:00
Nathan Binkert
13c005a8af shuffle files around for new directory structure
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
2005-06-04 20:50:10 -04:00
Nathan Binkert
b46730c7ec BaseSystem -> System
Make System an object that can be instantiated.  For operating
systems that don't need any OS specific hacks.

python/m5/objects/AlphaConsole.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Tsunami.py:
    BaseSystem -> System

--HG--
rename : python/m5/objects/BaseSystem.py => python/m5/objects/System.py
extra : convert_revision : e5d12db02abef1b0eda720b50dd2c09cb1ac5232
2005-06-04 14:19:05 -04:00
Steve Reinhardt
22eccce34b Additions/fixes for Tru64 syscall emulation.
We can now run the SimpleScalar wupwise binary
to completion on the test input.
Didn't have time to do more testing, but I fixed
a major problem w/getdirentries that should help
a lot more programs run.

arch/alpha/alpha_tru64_process.cc:
    Add truncate, ftruncate, statfs, and fstatfs.
    Add v4.x (pre-F64) stat, fstat, and lstat.
    Add setsysinfo (though all it does is provide more
    specific warning messages).
    Fix subtle but major bug in getdirentries.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Add truncate, ftruncate, statfs, and fstatfs.

--HG--
extra : convert_revision : 9037393d00dc49b0074a41603ea647587f5a9ec7
2005-06-03 16:19:34 -04:00
Nathan Binkert
ba73e1cc39 clean up command line stuff
sim/main.cc:
    Clean uo usage output and print usage when no options are given
    Don't accept mpy files anymore since we don't use them.

--HG--
extra : convert_revision : c3b16f602f301d2de12547285334c0037d829998
2005-06-02 11:20:31 -04:00
Steve Reinhardt
62fa781fee Rename sim/universe.{cc,hh} to root.{cc,hh} (since the
object defined there was renamed Root long ago).

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
    Rename sim/universe.{cc,hh} to root.{cc,hh}.

--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
2005-06-01 21:59:27 -04:00
Steve Reinhardt
8031cd93b5 Standardize clock parameter names to 'clock'.
Fix description for Bus clock_ratio (no longer a ratio).
Add Clock param type (generic Frequency or Latency).

cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/beta_cpu/alpha_full_cpu_builder.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/sinic.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
sim/universe.cc:
    Standardize clock parameter names to 'clock'.
    Fix description for Bus clock_ratio (no longer a ratio).
python/m5/config.py:
    Minor tweaks on Frequency/Latency:
    - added new Clock param type to avoid ambiguities
    - factored out init code into getLatency()
    - made RootFrequency *not* a subclass of Frequency so it
    can't be directly assigned to a Frequency paremeter

--HG--
extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
2005-06-01 21:44:00 -04:00
Nathan Binkert
5a7ee2b495 Make code more portable and port to cygwin
arch/alpha/alpha_tru64_process.cc:
    getdirent isn't implemented by cygwin.  panic if this function is
    executed.  (It shouldn't be too much to emulate it using opendir,
    readdir, etc.)
arch/alpha/pseudo_inst.cc:
    Use lseek once and read instead pread.
base/intmath.hh:
    we want int, long, and long long variations of FloorLog2 instead
    of int32_t, int64_t.  Otherwise, we leave one out.
base/socket.cc:
    Fix define that seems to be for apple
sim/serialize.cc:
    don't use the intXX_t stuff, instead, use the real types
    so we're sure that we cover all of them.

--HG--
extra : convert_revision : 9fccaff583100b06bbaafd95a162c4e19beed59e
2005-04-22 13:12:03 -04:00
Nathan Binkert
0f894a7b25 Make the exit after max checkpoints code compile.
sim/serialize.cc:
    call exitNow instead of SimExit.  Include the header too.

--HG--
extra : convert_revision : 633a8533b23cac914a2b09bd2d3ea5d85243c675
2005-04-13 14:26:56 -04:00
Nathan Binkert
d86bed198a Add support to limit the number of checkpoints dropped.
sim/serialize.hh:
    Add variables to keep track of the number of checkpoints
    dropped and maximum allowed.

--HG--
extra : convert_revision : 32241b90c58def6958ec84c53cc2cca996007506
2005-04-13 09:38:50 -04:00
Nathan Binkert
5eab6c4b41 Make the notion of a global event tick independent of the actual
CPU cycle ticks.  This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency.  For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.

arch/alpha/ev5.cc:
    The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
    frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
    frequency isn't the cpu parameter anymore, cycleTime is.
    create several public functions for getting the cpu frequency
    and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
    Now that ticks aren't cpu cycles, fixup code to advance
    by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
    Provide a function to get the number of ticks for a given
    number of cycles.
dev/alpha_console.cc:
    Update for changes in the way that frequencies and latencies are
    accessed.  Move some stuff to init()
dev/alpha_console.hh:
    Need a pointer to the system and the cpu to get the frequency
    so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
    outline the constructor and destructor
dev/platform.hh:
    outline the constructor and destructor.
    don't keep track of the interrupt frequency.  Only provide the
    accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
    outline the constructor and destructor
    Don't set the interrupt frequency here.  Get it from the actual device
    that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
    Make the interrupt interval a configuration parameter.  (And convert
    the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
kern/tru64/tru64_system.cc:
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
python/m5/config.py:
    Fix support for cycle_time relative latencies and frequencies.
    Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
    All CPUs now have a cycle_time.  The default is the global frequency,
    but it is now possible to set the global frequency to some large value
    (like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
    Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
    We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
    Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
    this frequency isn't needed.  We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
    The clock generator should hold the frequency
sim/eventq.hh:
    Need to remove this assertion because the writeback event
    queue is different from the CPU's event queue which can cause
    this assertion to fail.
sim/process.cc:
    Fix comment.
sim/system.hh:
    Struct member to hold the boot CPU's frequency.
sim/universe.cc:
    remove unneeded variable.

--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 15:32:06 -04:00
Nathan Binkert
c82562c740 full_system isn't a useful parameter anymore, get rid of it.
python/m5/objects/Root.mpy:
sim/universe.cc:
util/stats/stats.py:
    full_system isn't a useful parameter

--HG--
extra : convert_revision : 557091be1faa3cf121c55102aba4e6f4c1bd45ef
2005-04-06 16:58:40 -04:00
Nathan Binkert
43a9caa221 expose variables for number of global events per simulated second,
millisecond, microsecond, etc. so that the user can explicitly
convert between system ticks and time and know what sorts of
expensive operations are being used for that conversion.

arch/alpha/alpha_tru64_process.cc:
arch/alpha/pseudo_inst.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ns_gige.cc:
dev/sinic.cc:
dev/tsunami_io.cc:
dev/uart.cc:
sim/stat_control.cc:
sim/syscall_emul.hh:
    Use the new variables for getting the event clock
dev/etherdump.hh:
    delete variables that are no longer needed.

--HG--
extra : convert_revision : d95fc7d44909443e1b7952a24ef822ef051c7cf2
2005-03-29 07:55:44 -05:00
Ron Dreslinski
f2dd820972 No need for this ifdef, since the entire process.hh is surounded by an ifndef FULL_SYSTEM
--HG--
extra : convert_revision : 81009e5c468eaaee06c83c35f1d05ed2863299a4
2005-03-16 18:26:32 -05:00
Ron Dreslinski
d97590e29d Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 848757d0f18cfb33620cfa4b084a9b102b2744c0
2005-03-16 10:31:22 -05:00
Ron Dreslinski
df012f26fa Fix the bad addr check to check for allowable addresses in the nxm address space
arch/alpha/alpha_tru64_process.cc:
sim/process.cc:
sim/process.hh:
    Add an address range for the nxm
sim/syscall_emul.hh:
    Check to make sure that if we have an nxm config space that the mmap hasn't grown into it

--HG--
extra : convert_revision : e479e5240080ae488080d228bafea488835d6e77
2005-03-16 10:30:33 -05:00
Nathan Binkert
0f8067fbf6 Hard code the SimObject::Params struct
sim/sim_object.cc:
    Add a new constructor that can take the params struct and
    tweak the old one to create a params struct if we use the
    old constructor.
sim/sim_object.hh:
    Hard code a Params struct for SimObject that all other params
    structs can derive from.  Move the name string into the struct
    and update the code accordingly.  New constructor that takes
    the params struct.

--HG--
extra : convert_revision : 30761dab31d7257f9e8c864dcd6cae37309163f2
2005-03-15 17:11:54 -05:00
Steve Reinhardt
1b841a871e - Add capability to auto-generate Param structs from
.mpy SimObject descriptions.  Structs are defined
in simobj/param/ObjectName.hh.
- Move compile-time python params (from CPPDEFINES) to
separate dict from run-time params (from os.environ).
The former are needed to generate proper param structs.
This also helps prevent users from messing things up
by setting the wrong environment vars (which could have
overridden compile-time settings in the old system).
- Other misc cleanup of m5 python package.

SConscript:
    Include simobj/SConscript
build/SConstruct:
    Fix type in comment
python/SConscript:
    Move CPPDEFINES dict-generating code to m5scons.flatten_defines
python/m5/__init__.py:
    - Generate a build_env SmartDict here to hold compile-time
    params (passed in via __main__.m5_build_env).
    - Move panic and env here from config.py.
python/m5/config.py:
    Move panic, env to top level (m5/__init__.py)
python/m5/objects/BaseCPU.mpy:
    Use build_env instead of env for compile-time params
python/m5/smartdict.py:
    Add some comments.
sim/sim_object.hh:
    Include auto-generated Param struct.  Not used yet,
    just here as proof of concept.
test/genini.py:
    Put -E arguments in build_env as well as os.environ

--HG--
extra : convert_revision : cf6f4a2565b230c495b33b18612d6030988adac5
2005-03-14 07:46:26 -05:00
Nathan Binkert
cf05fa476d stick all python stuff into a top level python directory.
create an m5 package in python/m5
move the objects package into the m5 package
move the m5config into the m5 package as config
leave both importers outside of the package.

SConscript:
sim/main.cc:
    move sim/pyconfig/* -> python
python/SConscript:
    m5config.py -> m5/config.py (now automatically embedded)
    objects -> python/m5/objects
    embed all python files in python/m5
python/m5/config.py:
    importer renamed mpy_importer
    move code to m5/__init__.py
test/genini.py:
    deal with new python organization
    keep track of paths we want to add and add them after parameters
    are parsed.

--HG--
rename : sim/pyconfig/SConscript => python/SConscript
rename : sim/pyconfig/m5config.py => python/m5/config.py
rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy
rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy
rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy
rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy
rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy
rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy
rename : objects/Bus.mpy => python/m5/objects/Bus.mpy
rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy
rename : objects/Device.mpy => python/m5/objects/Device.mpy
rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy
rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy
rename : objects/Ide.mpy => python/m5/objects/Ide.mpy
rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy
rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy
rename : objects/Pci.mpy => python/m5/objects/Pci.mpy
rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy
rename : objects/Platform.mpy => python/m5/objects/Platform.mpy
rename : objects/Process.mpy => python/m5/objects/Process.mpy
rename : objects/Repl.mpy => python/m5/objects/Repl.mpy
rename : objects/Root.mpy => python/m5/objects/Root.mpy
rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy
rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy
rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy
rename : objects/Uart.mpy => python/m5/objects/Uart.mpy
extra : convert_revision : aebf6ccda33028b1125974ca8b6aeab6f7570f30
2005-03-11 18:28:38 -05:00
Ali Saidi
ad9b28f98e Removed unecessary constructor call at each return.
arch/alpha/isa_traits.hh:
    updated copyright date

--HG--
extra : convert_revision : 30c5fc0eb94138ebd4ee047ebdbff5121f95e5f1
2005-03-10 14:20:12 -05:00
Ali Saidi
2897665685 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a61ddd67647fc6a6e8e12d918cc71ae9da69f869
2005-03-09 15:56:29 -05:00
Ali Saidi
232134a816 Changed all syscalls to use syscall return object.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
cpu/exec_context.hh:
sim/process.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Changed all syscalls to use syscall return object
arch/alpha/isa_traits.hh:
    Added syscall return object that packages return value and return
    status into an object.
sim/process.cc:
    renamed variable name to nm so base class function name() can be called

--HG--
extra : convert_revision : 6609c5ffecc9e3519d7a0cd160879fd21d54abfc
2005-03-09 15:52:10 -05:00
Nathan Binkert
7d91bda6bf Add support for using the variables that m5 was compiled with for
determining which parameters belong to a class.  This allows us to
remove the disable flag since it is not the correct model
for variable checking anyway.

objects/BaseCPU.mpy:
    Use the FULL_SYSTEM environment variable to enable or disable
    parameters.
sim/pyconfig/m5config.py:
    remove the disable flag since it is not the correct model
    for variable checking.

--HG--
extra : convert_revision : a8ccb78ba16d23006225df282a09187d32557608
2005-03-09 14:42:30 -05:00
Nathan Binkert
4a3ad218e1 We should import m5config *after* we do the CPPDEFINES stuff,
otherwise m5config and the object descriptions cannot take
advantage of them.

sim/pyconfig/SConscript:
    We should import m5config *after* we do the CPPDEFINES stuff,
    otherwise m5config and the object descriptions cannot take
    advantage of them.  This means that we can't use the env dict
    alias.  We should instead use os.environ.

--HG--
extra : convert_revision : 392f99a3c15cfba74a5cde79a709ecfad3820e63
2005-03-09 14:39:35 -05:00
Steve Reinhardt
dbd60761f5 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5-head

--HG--
extra : convert_revision : daaeb6a596b08fbedd6a14833dcb3825c637d486
2005-03-09 00:17:20 -05:00
Steve Reinhardt
4b69debac6 Fix a couple of bugs introduced (or tickled) by the .ini sorting change.
sim/pyconfig/m5config.py:
    Don't sort child nodes, as this can change timing in memory system.
    (Really ought to be fixed in memory system, but we'll just take the
    sort back out for now to avoid intoducing gratuitous changes.)

--HG--
extra : convert_revision : 07e950c25911443cbc7a84435969ca596fb04348
2005-03-09 00:17:09 -05:00
Nathan Binkert
d191b14ff7 Pass all scons defined pre-processor macro variables to the
python configuration stuff as environment variables.

sim/pyconfig/SConscript:
    generate a python file that updates the env dict with all
    variables in the CPPDEFINES so the python code can use those
    variables in configuration scripts.

--HG--
extra : convert_revision : 50b0719b044f7adc87ce6ae1571d156ca0c5644c
2005-03-08 23:06:54 -05:00
Nathan Binkert
689f6d1b02 Split the string importer from the rest of the mpy parsing
and importing stuff to avoid some confusion.

sim/pyconfig/SConscript:
    Split the string importer from the rest of the importer code.
    The importer.py code can be embedded like m5config.py
sim/pyconfig/m5config.py:
    import what we need from importer

--HG--
extra : convert_revision : 9d57f43381b55e717b5b10adfb8f0a522280ac57
2005-03-08 22:07:26 -05:00
Steve Reinhardt
c720389366 More restructuring on Python config code for auto-generating
of Param structs.

objects/CoherenceProtocol.mpy:
objects/Ide.mpy:
    Update for new Enum syntax.
sim/pyconfig/m5config.py:
    More modest restructuring heading for auto-generating
    of param structs.

    - Revamped Enum handling: Enums are regular classes so they
    know their names now (makes it easier for generating C++
    equivalents).

    - Created MetaSimObject class and moved some SimObject-specific
    stuff there (i.e. does not apply to ConfigNodes in general).

--HG--
extra : convert_revision : a93b40dda3b038ebe8bffecac97e9079c22af561
2005-03-07 20:56:02 -05:00
Steve Reinhardt
e5f945967b Sort fields in .ini files generated by Python config
to make it easier to diff output from modified versions.

sim/pyconfig/m5config.py:
    Sort .ini outputs for repeatable results across versions.

--HG--
extra : convert_revision : fa918f2c53635eca3a02ce02af9b320eacd1f057
2005-03-05 19:28:43 -05:00
Nathan Binkert
6172f79d9e add some comments.
sim/pyconfig/m5config.py:
    Add some comments to indicate what the decorators mean.

--HG--
extra : convert_revision : fbcbcbe4ad8cd62f2bd12af6b1f141c66752b870
2005-03-01 11:07:44 -05:00
Ali Saidi
107233adf1 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a63405fac7237014c4ef8b765d31d59d3e1bb500
2005-02-24 15:59:29 -05:00
Nathan Binkert
b78b634107 Fix the python panic message
sim/pyconfig/m5config.py:
    Fix panic

--HG--
extra : convert_revision : 56d93398e992ed6e95380f6dcdb61cbee54b3893
2005-02-23 12:26:35 -05:00
Ali Saidi
27a338fe2b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : f149b8ea762d4a83ef76b3bb95f28e0709391ecf
2005-02-23 11:47:49 -05:00
Ali Saidi
9ebeb9b2de Added mmap start and end so detailed CPU can know if an access is
in a mmaped region

--HG--
extra : convert_revision : e4ee0520c84d94a0d2e804d02035228766abe71f
2005-02-23 11:45:25 -05:00
Steve Reinhardt
af33e74638 Small initial steps toward generating C++ param structs
from Python object descriptions.  Mostly cleanup of Python
code based on things I encountered trying to figure out
what's going on.  Main reason I'm committing this now is
to transfer work from my laptop to zizzer.

sim/pyconfig/m5config.py:
    Small steps toward param struct generation: all param
    objects should now have a _cppname attribute that holds
    their corresponding C++ type name.

    Made Param ptype attribute an actual type instead of a
    string.  String is still stored in ptype_string.

    Get rid of AddToPath() and Import() (redundant copies
    are in importer, and that seems to be the more logical
    place for them).

    Add a few comments, delete some unused code.
test/genini.py:
    A few fixes to make the environment more compatible
    with what really happens when configs are executed
    from the m5 binary.

--HG--
extra : convert_revision : 9fc8f72cd0c22ba3deada02f37484787342534f2
2005-02-22 23:53:34 -05:00
Nathan Binkert
9b1e2db811 Clean up CPU stuff and make it use params structs
cpu/base_cpu.cc:
cpu/base_cpu.hh:
    Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
    Don't have any default parameters.
cpu/memtest/memtest.hh:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
    Convert to use a params struct.
    remove default parameters
cpu/simple_cpu/simple_cpu.hh:
    convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    this isn't really a cpu.  don't derive from BaseCPU
objects/MemTest.mpy:
    we only need one max_loads parameter
sim/main.cc:
    Don't check for the number of CPUs since we may be doing something
    else going on.  If we don't have anything to simulate, the
    simulator will exit anyway.

--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
2005-02-19 11:46:41 -05:00
Kevin Lim
f4d3f781f1 Include errno.h to fix compile errors in gcc 3.4
sim/main.cc:
    Include errno.h

--HG--
extra : convert_revision : ff91579ae590b3c1d11f7468b71f295e6f3edd68
2005-02-17 19:22:42 -05:00
Nathan Binkert
cfe6ed7c48 Fix compile on linux
sim/main.cc:
    For some unknown reason linux's basename doesn't take a const char *

--HG--
extra : convert_revision : 30289195881e16a05429f7025abab7914a9e3eb6
2005-02-17 03:40:17 -05:00
Nathan Binkert
5de3bba758 Make code more portable.
sim/main.cc:
    basename is in libgen

--HG--
extra : convert_revision : 1af6ff2f492b4deee9e56edfa5ee6ea235cd4eb0
2005-02-17 02:50:34 -05:00
Nathan Binkert
a24016c731 Several tweaks to make binning work in any simulation
configuration so that we can always have binning on.

base/statistics.cc:
    If we're binning, and there is no bin active at the time
    we check all stats stuff, create a bin.
base/statistics.hh:
    FS_MEASURE doesn't exist anymore
base/stats/text.cc:
    don't print out bin names if there is only one bin
sim/process.cc:
    don't zero stats.  It happens automatically.
    Don't activate the context at the time it is registered,
    instead activate the first context in a startup callback.
sim/process.hh:
    Add startup callback to initialize the first exec context

--HG--
extra : convert_revision : bcb23cdb184b0abf7cecd79902f8a59b50f71fe4
2005-02-17 02:48:56 -05:00
Nathan Binkert
10ee909fbd Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/merge

--HG--
extra : convert_revision : 5d73046310a64b80a6ba3832df3b30b55532d707
2005-02-11 09:48:23 -05:00
Nathan Binkert
06a4686af9 Rework the command line paramters for python output and how
output files and the output directory are are handled.  Make
the output directory configuration via a command line parameter,
or an environment variable.

SConscript:
    Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
    use new output file code
cpu/base_cpu.cc:
    use new output file code to generate output streams
dev/etherdump.cc:
    use the output file code to find the output directory
    use a real stream instead of a pointer
dev/etherdump.hh:
    use a real stream instead of a pointer
objects/Root.mpy:
    output_dir and config_output_file are not longer configured here.
sim/main.cc:
    - Completely rework the command line argument passing to deal with
    changes in python and output files.
    - Update help output to reflect changes.
    - Remove all direct support for .ini files.  They are strictly
    for intermediate representation.
    - Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
    syntax for python.  This will generate: foo.bar = 'blah' in the python
    script.
    - Add '-d' to set the output directory.
    - Use new output file code to access the output stream.
sim/serialize.cc:
    use the new code to find the output directory
sim/universe.cc:
    Get rid of makeOutputStream.  Use the new output file code.
    Remove output_dir and config_output_file as parameters.

--HG--
extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
2005-02-11 09:47:41 -05:00
Nathan Binkert
60b263466e Make sure we have all values when trying to generate the ini file
sim/pyconfig/m5config.py:
    When getting all values, make sure we get the ones that are
    parameter defaults as well.

--HG--
extra : convert_revision : 2b1c4b2f27dfab17ef9df18d7e5936e4a00bb12e
2005-02-11 01:40:49 -05:00
Nathan Binkert
8efd7d9063 More fixes to the pbs stuff to make it more robust.
sim/pyconfig/SConscript:
    Embed the jobfile.py script into the binary so that we don't
    need to copy it into the Base directory every time.
test/genini.py:
    Add the util/pbs directory to the path so we can get to
    jobfile.py
    Add a -I argument to set to add to the path.
util/pbs/pbs.py:
    Create a MyPOpen class.  This is a lot like the popen2.Popen3 class
    in the python library except that my version allows redirection of
    standard in and standard out to a file instead of a pipe.
    Use this popen class to execute qsub or ssh qsub.  This was important
    for the ssh version of qsub because we need to pipe the script into
    standard in of ssh so that the script can get to the qsub command.
    (Otherwise we have a problem discovering the path.)
util/pbs/send.py:
    Tweak the script so it figures out paths in NFS correctly.
    Use the new system for running qsub.

--HG--
extra : convert_revision : 1289915ba99cec6fd464b71215c32d2197ff2824
2005-02-09 23:55:21 -05:00
Nathan Binkert
b46baf107f enable the Trace, Statistics, and Serialize param contexts.
objects/Root.mpy:
    Fake the param context stuff for now.
sim/param.cc:
    Make empty vector enums work
sim/serialize.cc:
    serialize_dir is always valid

--HG--
extra : convert_revision : c46373f0f4c70e6a2f01a81c0fa6bacab72d4c4f
2005-02-09 17:33:28 -05:00