Ali Saidi
e7293dd24e
Errors: Use the correct panic/warn/fatal/info message in some places.
2009-01-30 20:04:17 -05:00
Ali Saidi
f4291aac25
Errors: Print a URL with a hash of the format string to find more information about an error.
2009-01-30 20:04:15 -05:00
Ali Saidi
35a85a4e86
Config: Cause a fatal() when a parameter without a default value isn't set(FS #315 ).
2009-01-30 19:08:13 -05:00
Nathan Binkert
0b228fc1ab
Fix typo
2009-01-29 22:27:11 -08:00
Gabe Black
56e182a6a9
X86: Add a dummy minimal DMA controller that doesn't do anything.
2009-01-25 20:35:00 -08:00
Gabe Black
151bc018dd
X86: Add a device to back the non-existant floppy drive controller.
2009-01-25 20:34:17 -08:00
Gabe Black
dbe28da1be
X86: Add fake devices for non-existant serial ports.
2009-01-25 20:33:52 -08:00
Gabe Black
52defeb4e7
X86: Implement the xadd instruction.
2009-01-25 20:33:27 -08:00
Gabe Black
3c5988b86c
X86: Implement the bswap instruction.
2009-01-25 20:32:43 -08:00
Gabe Black
919c3e7fb6
Dev: Make the RTC device ignore writes to a read only bit.
2009-01-25 20:32:26 -08:00
Gabe Black
0449fb2b7a
X86: Fix a bug in the iret microcode.
2009-01-25 20:31:17 -08:00
Gabe Black
389fbfdab1
X86: Make the interrupt object wake up the CPU when something becomes pending.
2009-01-25 20:30:51 -08:00
Gabe Black
d9794784ba
CPU: Add a setCPU function to the interrupt objects.
2009-01-25 20:29:03 -08:00
Gabe Black
3f9e2350a1
Devices: Make the destructor virtual on the CopyEnginChannel object.
...
This fixes a compile warning which becomes an error.
2009-01-25 20:26:53 -08:00
Nathan Binkert
64ed39f61b
pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.
...
It's instantaneous and so it's somewhat bogus, but it's a first step.
2009-01-24 07:27:22 -08:00
Nathan Binkert
f0fb3ac060
cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.
...
Make interrupts use the new wakeup method, and pull all of the interrupt
stuff into the cpu base class so that only the wakeup code needs to be updated.
I tried to make wakeup, wakeCPU, and the various other mechanisms for waking
and sleeping a little more sane, but I couldn't understand why the statistics
were changing the way they were. Maybe we'll try again some day.
2009-01-24 07:27:21 -08:00
Ali Saidi
56d5212ba7
Trace: Add DPRINTFS macro that takes parameter to call name() for trace printing.
2009-01-23 17:19:48 -05:00
Ali Saidi
37ffe52ca4
IGbE: Fix two e1000 driver bugs that I missed before.
2009-01-23 17:19:47 -05:00
Nathan Binkert
10fc45da27
o3cpu: give a name to the activity recorder for better tracing
2009-01-21 14:56:18 -08:00
Nathan Binkert
dbac448b08
thread_context: move getSystemPtr so SE mode can get to it.
...
There was really no reason that it should be FS only.
2009-01-19 20:36:49 -08:00
Nathan Binkert
81b8c0c79a
python: add fatal() function to the m5 package and use it
2009-01-19 14:43:09 -08:00
Nathan Binkert
da14789c32
python: Try to isolate the stuff that's in the m5.internal package a bit more.
2009-01-19 09:59:15 -08:00
Nathan Binkert
c9d3113015
tracing: Add help strings for some of the trace flags
2009-01-19 09:59:14 -08:00
Nathan Binkert
0876c822dd
tracing: panic() if people try to use tracing, but TRACING_ON is not set.
...
Also clean things up so that help strings can more easily be added.
Move the help function into trace.py
2009-01-19 09:59:13 -08:00
Nathan Binkert
f15f252d4e
python: Rework how things are imported
2009-01-19 09:59:13 -08:00
Nathan Binkert
51d780fa4d
scons: Don't add all objects to the library twice
2009-01-19 09:03:41 -08:00
Ali Saidi
b4227bd7f6
Fix issue 326: glibc non-deterministic because it reads /proc
2009-01-17 18:56:46 -05:00
Ali Saidi
140b4b891e
CopyEngine: Implement a I/OAT-like copy engine.
2009-01-17 18:55:09 -05:00
Nathan Binkert
8153790d00
SCons: centralize the Dir() workaround for newer versions of scons.
...
Scons bug id: 2006 M5 Bug id: 308
2009-01-13 14:17:50 -08:00
Richard Strong
81180a3bf0
This fix addresses an ill formed if statement that fails
...
to compile. The fix was the simple addition of another set
of parenthesis to ensure the correct condition resolution.
2009-01-11 22:45:03 -08:00
Steve Reinhardt
c370a9cb98
FastAlloc: track allocation tick in debug mode,
...
minor enhancements to debug output
2009-01-08 14:13:33 -08:00
Gabe Black
b23633ad1b
X86: Hook in the M5 pseudo insts.
2009-01-06 23:55:46 -08:00
Gabe Black
115b1a7ed3
X86: Autogenerate macroop generateDisassemble function.
2009-01-06 22:55:27 -08:00
Gabe Black
8cab1805f9
X86: Move the function that prints memory args into the inst base class.
2009-01-06 22:46:28 -08:00
Gabe Black
9e24d8c599
X86: Move the macroop class out of the isa description into C++.
2009-01-06 22:44:59 -08:00
Gabe Black
7b7a72158a
X86: Change indentation on microop disassembly.
2009-01-06 22:40:41 -08:00
Gabe Black
b0ab5c894d
Tracing: Make tracing aware of macro and micro ops.
2009-01-06 22:34:18 -08:00
Ali Saidi
2adc60795b
IGbE: Implement header splitting with large MTU
2009-01-06 10:36:57 -05:00
Ali Saidi
11ac0c7acf
INET: Add functions to header types to get offset in packet and start of payload; add function to split packet at last known header
2009-01-06 10:36:56 -05:00
Ali Saidi
9f89d43b65
IGbE: Remove is8257 variable
2009-01-06 10:36:55 -05:00
Steve Reinhardt
1704ba2273
Make Alpha pseudo-insts available from SE mode.
2008-12-17 09:51:18 -08:00
Gabe Black
02cd18f536
SPARC: Truncate syscall args and return values appropriately.
2008-12-16 23:06:37 -08:00
Gabe Black
f0d1a20971
PCI: Add some missing breaks to a couple case statements.
2008-12-15 00:47:01 -08:00
Author Name
13f7fdcf67
The ide_ctrl serialize and unserialize were broken.
...
Multiple channels were saving their state under the
same name. This patch separates the saved state of
the primary and secondary channel.
2008-12-14 23:29:49 -08:00
Richard Strong
dae531c049
IDE: Fix serialization for the IDE controller.
2008-12-09 10:34:08 -08:00
Nathan Binkert
d0c0c25ebc
eventq: Add some debugging code to the eventq.
2008-12-08 07:17:48 -08:00
Nathan Binkert
19273164da
output: Change default output directory and files and update tests.
...
--HG--
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr => tests/long/00.gzip/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout => tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr => tests/long/00.gzip/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout => tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr => tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout => tests/long/00.gzip/ref/sparc/linux/o3-timing/simout
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr => tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout => tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr => tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout => tests/long/00.gzip/ref/sparc/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stderr => tests/long/00.gzip/ref/x86/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout => tests/long/00.gzip/ref/x86/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stderr => tests/long/00.gzip/ref/x86/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stdout => tests/long/00.gzip/ref/x86/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/m5stats.txt => tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stderr => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stdout => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/m5stats.txt => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stderr => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stdout => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/m5stats.txt => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stderr => tests/long/10.mcf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout => tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stderr => tests/long/10.mcf/ref/sparc/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout => tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stderr => tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout => tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stderr => tests/long/10.mcf/ref/x86/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stdout => tests/long/10.mcf/ref/x86/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/m5stats.txt => tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stderr => tests/long/20.parser/ref/x86/linux/simple-atomic/simerr
rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stdout => tests/long/20.parser/ref/x86/linux/simple-atomic/simout
rename : tests/long/20.parser/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/20.parser/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/20.parser/ref/x86/linux/simple-timing/stderr => tests/long/20.parser/ref/x86/linux/simple-timing/simerr
rename : tests/long/20.parser/ref/x86/linux/simple-timing/stdout => tests/long/20.parser/ref/x86/linux/simple-timing/simout
rename : tests/long/20.parser/ref/x86/linux/simple-timing/m5stats.txt => tests/long/20.parser/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr => tests/long/30.eon/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout => tests/long/30.eon/ref/alpha/tru64/o3-timing/simout
rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/30.eon/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr => tests/long/30.eon/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout => tests/long/30.eon/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/30.eon/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr => tests/long/30.eon/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout => tests/long/30.eon/ref/alpha/tru64/simple-timing/simout
rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/30.eon/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stderr => tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stdout => tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout
rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stderr => tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout => tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stderr => tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout => tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout
rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr => tests/long/50.vortex/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout => tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout
rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr => tests/long/50.vortex/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout => tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout
rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr => tests/long/50.vortex/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout => tests/long/50.vortex/ref/sparc/linux/simple-atomic/simout
rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/50.vortex/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr => tests/long/50.vortex/ref/sparc/linux/simple-timing/simerr
rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout => tests/long/50.vortex/ref/sparc/linux/simple-timing/simout
rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/50.vortex/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr => tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout => tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout
rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stderr => tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout => tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stderr => tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout => tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout
rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/stderr => tests/long/60.bzip2/ref/x86/linux/simple-atomic/simerr
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout => tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/stderr => tests/long/60.bzip2/ref/x86/linux/simple-timing/simerr
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/stdout => tests/long/60.bzip2/ref/x86/linux/simple-timing/simout
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/m5stats.txt => tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr => tests/long/70.twolf/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout => tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stderr => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/stderr => tests/long/70.twolf/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout => tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/stderr => tests/long/70.twolf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout => tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/stderr => tests/long/70.twolf/ref/sparc/linux/simple-timing/simerr
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout => tests/long/70.twolf/ref/sparc/linux/simple-timing/simout
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/stderr => tests/long/70.twolf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout => tests/long/70.twolf/ref/x86/linux/simple-atomic/simout
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/stderr => tests/long/70.twolf/ref/x86/linux/simple-timing/simerr
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/stdout => tests/long/70.twolf/ref/x86/linux/simple-timing/simout
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/m5stats.txt => tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stderr => tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout => tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/m5stats.txt => tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr => tests/quick/00.hello/ref/alpha/linux/o3-timing/simerr
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout => tests/quick/00.hello/ref/alpha/linux/o3-timing/simout
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/linux/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr => tests/quick/00.hello/ref/alpha/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout => tests/quick/00.hello/ref/alpha/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/alpha/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stderr => tests/quick/00.hello/ref/alpha/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout => tests/quick/00.hello/ref/alpha/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr => tests/quick/00.hello/ref/alpha/tru64/o3-timing/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout => tests/quick/00.hello/ref/alpha/tru64/o3-timing/simout
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stderr => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stderr => tests/quick/00.hello/ref/alpha/tru64/simple-timing/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout => tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/stderr => tests/quick/00.hello/ref/mips/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout => tests/quick/00.hello/ref/mips/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/stderr => tests/quick/00.hello/ref/mips/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/stdout => tests/quick/00.hello/ref/mips/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stderr => tests/quick/00.hello/ref/sparc/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout => tests/quick/00.hello/ref/sparc/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/stderr => tests/quick/00.hello/ref/sparc/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout => tests/quick/00.hello/ref/sparc/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stderr => tests/quick/00.hello/ref/x86/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout => tests/quick/00.hello/ref/x86/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stderr => tests/quick/00.hello/ref/x86/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stdout => tests/quick/00.hello/ref/x86/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/x86/linux/simple-timing/stats.txt
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr => tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout => tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt => tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr => tests/quick/02.insttest/ref/sparc/linux/o3-timing/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout => tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt => tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr => tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout => tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt => tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr => tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout => tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt => tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr => tests/quick/20.eio-short/ref/alpha/eio/detailed/simerr
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout => tests/quick/20.eio-short/ref/alpha/eio/detailed/simout
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/detailed/stats.txt
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simerr
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stderr => tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stdout => tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/m5stats.txt => tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stderr => tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stdout => tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/m5stats.txt => tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stderr => tests/quick/50.memtest/ref/alpha/linux/memtest/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stdout => tests/quick/50.memtest/ref/alpha/linux/memtest/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/m5stats.txt => tests/quick/50.memtest/ref/alpha/linux/memtest/stats.txt
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
2008-12-08 07:16:40 -08:00
Gabe Black
9192b7f1ef
Devices: Clean up the IDE controller.
2008-12-07 12:59:48 -08:00
Lisa Hsu
993b7be4bb
imported patch aux-fix.patch
2008-12-07 15:07:42 -05:00
Gabe Black
e4790bcbe2
X86: Add add_entry back in.
2008-12-06 14:48:59 -08:00
Nathan Binkert
489e3e7381
eventq: use the flags data structure
2008-12-06 14:18:18 -08:00
Nathan Binkert
cbbc4501c8
eventq: move virtual function definitiions to the .cc file.
2008-12-06 14:18:18 -08:00
Nathan Binkert
a0d322be40
traceflags: Make "All" a valid trace flag.
2008-12-06 14:18:18 -08:00
Nathan Binkert
e08c6be9fe
SimObject: change naming of vectors so there are the same numbers of digits.
...
i.e. we used to have Foo0, Foo1, ..., Foo10, Foo11, ..., Foo100
now we have Foo000, Foo001, ..., Foo010, Foo011, ..., Foo100
2008-12-06 14:18:18 -08:00
Nathan Binkert
e141cb7441
flags: Change naming of functions to be clearer
2008-12-06 14:18:18 -08:00
Ali Saidi
dd788a23c9
IGbE: Add support for newer 8257x based Intel NICs
2008-12-05 13:58:22 -05:00
Ali Saidi
400e516261
IGbE: Add support for TCP segment offload
2008-12-05 13:58:21 -05:00
Ali Saidi
aab595a306
INet: Allow updating on id, len, seq, and flag field for TCP segment offload
2008-12-05 13:58:21 -05:00
Lisa Hsu
854aa60fdc
Automated merge with ssh://m5sim.org//repo/m5
2008-12-05 12:11:46 -05:00
Lisa Hsu
f1430941cf
This brings M5 closer to modernity - the kernel being advertised is newer so it won't die on binaries compiled with newer glibc's, and enables use of TLS-toolchain built binaries for ALPHA_SE by putting auxiliary vectors on the stack. There are some comments in the code to help. Finally, stats changes for ALPHA are from slight perturbations to the initial stack frame, all minimal diffs.
2008-12-05 12:09:29 -05:00
Lisa Hsu
e2c7618e50
This patch pulls out the auxiliary vector struct from individual ISA
...
LiveProcesses to the base LiveProcess definition so anyone can use them.
2008-12-04 18:03:35 -05:00
Nathan Binkert
74f10be526
cprintf: support a configurable width and precision ("*" in printf)
2008-12-03 04:57:54 -08:00
Steve Reinhardt
041ca19edc
Assume files w/o obvious OS are Linux (with warning)
...
instead of giving a fatal error.
2008-11-20 19:08:46 -08:00
Steve Reinhardt
ce4c9a7c10
Sort trace flags before printing them.
2008-11-17 12:41:50 -08:00
Clint Smullen
3087be945d
Output: Include gzstream package to allow automatically-gzipped output
...
The gzstream package provides an ostream-interface for writing gzipped files.
The package comes from:
http://www.cs.unc.edu/Research/compgeom/gzstream/
And is distributed under the LGPL license. Both the license and version
information has been preservered, though all other files in the package have
been purged. Minor modifications to the code have been made. The output module
detects when a filename ends in .gz and constructs an ogzstream object instead
of an ofstream object. This works for both the create(...) and find(...)
commands. Additionally, since gzstream objects needs to be closed to ensure
proper file termination, I have the output deconstructor deleting all ostream's
that it manages on behalf of find(...). At the moment, the only output file
that I know this functionality works for is stats, i.e. by specifying
"--stats-file=m5stats.txt.gz" on the command line.
2008-11-15 23:42:11 -05:00
Steve Reinhardt
4514f565e3
syscalls: fix latent brk/obreak bug.
...
Bogus calls to ChunkGenerator with negative size were triggering
a new assertion that was added there.
Also did a little renaming and cleanup in the process.
2008-11-15 09:30:10 -08:00
Steve Reinhardt
640b415688
Cache: get rid of obsolete Tag methods.
...
I think readData() and writeData() were used for Erik's compression
work, but that code is gone, these aren't called anymore, and they
don't even really do what their names imply.
2008-11-14 14:14:35 -08:00
Nathan Binkert
5711282f87
Fix a bunch of bugs I introduced when I changed the flags stuff for packets.
...
I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for pointing this out. I should have run the opt regressions instead
of the fast. I also screwed up some of the logical functions in the Flags
class.
2008-11-14 04:55:30 -08:00
Gabe Black
7a4d75bae3
CPU: Refactor read/write in the simple timing CPU.
2008-11-13 23:30:37 -08:00
Nathan Binkert
4d64d7664c
SCons: Allow top level directory of EXTRAS able to contain SConscripts.
...
The current EXTRAS will fail if the top level directory pointed to by EXTRAS
has a SConscript file in it. We allow this by including the directory name
of the EXTRA in the build directory which prevents a clash between
src/SConscript and extra/SConscript. Maintain compatibility with older uses
of EXTRAS by adding a -I for each top level extra directory.
2008-11-10 11:51:18 -08:00
Nathan Binkert
eb5d9ba72b
pseudo inst: Add rpns (read processor nanoseconds) instruction.
...
This instruction basically returns the number of nanoseconds that the CPU
has been running.
2008-11-10 11:51:18 -08:00
Nathan Binkert
c25d966b06
Clean up the SimpleTimingPort class a little bit.
...
Move the constructor into the .cc file and get rid of the typedef for
SendEvent.
2008-11-10 11:51:18 -08:00
Nathan Binkert
ea70a44c9f
clean: Move some stuff from the hh file to the cc file.
2008-11-10 11:51:18 -08:00
Nathan Binkert
4e02e7c217
python: Fix the reference counting for python events placed on the eventq.
...
We need to add a reference when an object is put on the C++ queue, and remove
a reference when the object is removed from the queue. This was not happening
before and caused a memory problem.
2008-11-10 11:51:18 -08:00
Clint Smullen
1adfe5c7f3
O3CPU: Make the instcount debugging stuff per-cpu.
...
This is to prevent the assertion from firing if you have a large multicore.
Also make sure that it's not compiled in when NDEBUG is defined
2008-11-10 11:51:18 -08:00
Nathan Binkert
9c49bc7b00
mem: update stuff for changes to Packet and Request
2008-11-10 11:51:17 -08:00
Nathan Binkert
3535d746ab
style: clean up the Packet stuff
2008-11-10 11:51:17 -08:00
Nathan Binkert
2dd699ed3d
flags: Provide an object for managing boolean flags for an object.
...
In many cases it might be preferable to use bitset, but this object
allows the user more easily manipulate groups of flags because the
underlying type (e.g. uint64_t) is exposed.
2008-11-10 11:51:17 -08:00
Nathan Binkert
194f0310d3
safe_cast: add a new cast function for casts that should always succeed.
...
In DEBUG mode, this does a dynamic_cast and asserts that the result is
non null. Otherwise, it just does a static_cast. Again, this is only
intended for cases where the cast should always succeed and what's
desired is a debugging check to make sure.
2008-11-10 11:51:17 -08:00
Steve Reinhardt
27e8f3c98a
DmaDevice: fix minor type in error message.
2008-11-10 14:45:31 -08:00
Steve Reinhardt
63127cbf37
mem: Assert that requests have non-negative size.
...
Would have saved me much debugging time if these
had been in there previously.
2008-11-10 14:11:07 -08:00
Steve Reinhardt
42bd460d7f
Cache: Refactor packet forwarding a bit.
...
Makes adding write-through operations easier.
2008-11-10 14:10:28 -08:00
Gabe Black
846cb450f9
CPU: Make unaligned accesses work in the timing simple CPU.
2008-11-09 21:56:28 -08:00
Gabe Black
8c15518f30
X86: Fix completeAcc get call.
2008-11-09 21:55:43 -08:00
Gabe Black
909380f3ee
X86: Make the timing simple CPU handle variable length instructions.
2008-11-09 21:55:01 -08:00
Nathan Binkert
44839d6b71
Fix a few more places where the context stuff wasn't changed
2008-11-05 07:20:03 -08:00
Lisa Hsu
46b56bb7b6
Fix SPARC_FS compile
2008-11-05 16:19:17 -05:00
Lisa Hsu
07969dbbf1
Right now a single thread cpu 1 could get assigned context Id != 1, depending
...
on the order in which it's registered with the system. To make them match,
here is a little change.
2008-11-05 15:30:49 -05:00
Lisa Hsu
c68032ddcb
decouple eviction from insertion in the cache.
2008-11-04 11:35:58 -05:00
Lisa Hsu
4ab52cb986
Change the findBlock(addr, lat) to accessBlock, which I think has better connotations for what is really happening and how it should be used.
2008-11-04 11:35:57 -05:00
Lisa Hsu
dd99ff23c6
get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
...
redundancies with threadId() as their replacement.
2008-11-04 11:35:42 -05:00
Lisa Hsu
d857faf073
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
...
the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
2008-11-02 21:57:07 -05:00
Lisa Hsu
67fda02dda
Make it so that all thread contexts are registered with the System, even in
...
SE. Process still keeps track of the tc's it owns, but registration occurs
with the System, this eases the way for system-wide context Ids based on
registration.
2008-11-02 21:57:06 -05:00
Lisa Hsu
c55a467a06
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
...
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
2008-11-02 21:56:57 -05:00
Clint Smullen
95af120e60
CPU: The API change to EventWrapper did not get propagated to the entirety of TimingSimpleCPU.
...
The constructor no-longer schedules an event at construction and the implict conversion between int and bool was allowing the old code to compile without warning.
Signed-off By: Ali Saidi
2008-10-27 18:18:04 -04:00
Clint Smullen
cfa32d8de7
Checkpointing: createCountedDrain function, it was only returning an Event, which does not expose a setCount method to Python.
...
Signed-off By: Ali Saidi
2008-10-27 19:46:01 -04:00
Lisa Hsu
8788d703f8
s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos in
...
comments.
2008-10-23 16:49:17 -04:00
Lisa Hsu
546a6c0c1b
probe function no longer used anywhere.
2008-10-23 16:49:13 -04:00
Lisa Hsu
7a28ab2d18
remove the totally obsolete split cache
2008-10-23 16:11:28 -04:00
Nathan Binkert
9836d81c2b
style: Use the correct m5 style for things relating to interrupts.
2008-10-21 07:12:53 -07:00
Ali Saidi
b760b99f4d
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes
...
the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal
call sys and thus the translation fails because the user is attempting to access a super page address.
Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think
this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs.
Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were
removed since a great deal of manual patching would be required to only remove the hwrei change.
2008-10-20 16:22:59 -04:00
Lisa Hsu
4fac54f227
Automated merge with ssh://daystrom.m5sim.org//z/repo/m5
2008-10-19 22:50:53 -04:00
Nathan Binkert
9b8011e255
need to add packet_access.hh in order to get tempalte definition
2008-10-16 22:22:47 -07:00
Nathan Binkert
81f5da1e89
get rid of local variable that's only used in an assert so fast compiles
2008-10-16 22:22:17 -07:00
Lisa Hsu
101c2d9174
Automated merge with ssh://daystrom.m5sim.org//z/repo/m5
2008-10-16 14:16:26 -04:00
Lisa Hsu
90e40ca982
This function declaration isn't used anywhere.
...
HG: user: Lisa Hsu <hsul@eecs.umich.edu> HG: branch default HG: changed
src/mem/cache/cache.hh
2008-10-14 17:22:03 -04:00
Nathan Binkert
5b07448cf1
eventq: make python events actually work
2008-10-14 09:34:11 -07:00
Nathan Binkert
ff2eea1ba3
eventq: revert code for unserializing events.
...
Since I never implemented a proper solution, put it back to something that
at least works for now. Once I add more event queues, I'll have to really
fix this though
2008-10-14 09:33:52 -07:00
Gabe Black
809f6cb6d1
CPU: Explain why some code is commented out.
2008-10-12 23:52:02 -07:00
Gabe Black
34ca72d16d
Get rid of some commented out code.
2008-10-12 23:50:22 -07:00
Gabe Black
3c4567f2a6
X86: Set the delayed commit flag in x86 microops appropriately.
2008-10-12 23:29:10 -07:00
Gabe Black
33ebd04474
X86: Make the local APIC timer event generate an interrupt.
2008-10-12 23:28:49 -07:00
Gabe Black
bdc28d793d
X86: Implement the EOI register in the local APIC.
2008-10-12 23:28:11 -07:00
Gabe Black
fd37688294
X86: Add some DPRINTFs to the local APIC.
2008-10-12 23:27:45 -07:00
Gabe Black
be6055e0f2
X86: Make auto eoi mode work in the I8259 PIC.
2008-10-12 23:27:08 -07:00
Gabe Black
fb5bb434a9
X86: Make non-specific EOI commands work.
2008-10-12 23:25:48 -07:00
Gabe Black
8e664f3959
X86: Make the I8259 PIC accept a specific EOI command.
2008-10-12 23:22:58 -07:00
Gabe Black
e3004c579f
X86: Fix the segment setting code in IRET, and make it restore the flags.
2008-10-12 23:05:22 -07:00
Gabe Black
349a155b6e
X86: Panic when an unimplemented fault is invoked, rather than spinning forever
2008-10-12 23:00:28 -07:00
Gabe Black
564eda827b
X86: Implement the swapgs instruction.
2008-10-12 23:00:07 -07:00
Gabe Black
a2e0d539d8
X86: Add wrval/rdval microops for reading significant miscregs.
2008-10-12 22:55:55 -07:00
Gabe Black
9e8e2f9ec6
X86: Make the x86 interrupt fault kick off the interrupt microcode.
2008-10-12 22:42:10 -07:00
Gabe Black
4c19c56a77
X86: Implement entering an interrupt in microcode.
2008-10-12 22:42:03 -07:00
Gabe Black
f813a4be49
X86: Make sure register microops set fault rather than returning one.
2008-10-12 22:24:06 -07:00
Gabe Black
961b40cdb5
X86: Implement an wrdh microop which loads bases/offsets from 16 byte descriptors.
2008-10-12 22:16:53 -07:00
Gabe Black
989fa4fc0f
X86: Make the MicroPC type 16 bit.
2008-10-12 20:48:24 -07:00
Gabe Black
6074b1abf2
X86: Implement local labels for the ROM that actually refer into the ROM.
2008-10-12 20:44:11 -07:00
Gabe Black
6b46e5204d
X86: Implement the chks check of interrupt gate target code segments.
2008-10-12 20:38:22 -07:00
Gabe Black
30feb90c1c
X86: Add a check type for interrupt gates.
2008-10-12 20:33:37 -07:00
Gabe Black
15f5bb3055
X86: Fix chks checking the submode for stack segments.
2008-10-12 20:29:52 -07:00
Gabe Black
9e1fe2050a
X86: Let segment manipulation microops be conditional.
2008-10-12 20:25:06 -07:00
Gabe Black
e9158d763a
X86: Let the microassembler know about the microcode only H segment.
2008-10-12 20:17:38 -07:00
Gabe Black
223fc41c07
X86: Fix the rdbase microop
2008-10-12 20:07:46 -07:00
Gabe Black
0756dbb37a
X86: Don't fetch in the simple CPU if you're in the ROM.
2008-10-12 19:32:06 -07:00
Gabe Black
f245358343
Get rid of old RegContext code.
2008-10-12 17:57:46 -07:00
Gabe Black
cefb768131
X86: Create a handy way to access labels from the ROM in microcode.
2008-10-12 17:52:51 -07:00
Gabe Black
e5f8092467
X86: Make X86's microcode ROM actually do something.
2008-10-12 17:48:44 -07:00
Gabe Black
c9ea0b7349
CPU: Make the highest order bit in the micro pc determine if it's combinational or from the ROM.
2008-10-12 16:59:55 -07:00
Gabe Black
2736086d7c
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
2008-10-12 15:59:21 -07:00
Gabe Black
6fd4eff68f
X86: Create an eret microop which returns from ROM to combinational decoding.
2008-10-12 15:53:04 -07:00
Gabe Black
4aa18aa800
X86: Make Br never report itself as the last microop.
2008-10-12 15:43:35 -07:00
Gabe Black
77c0e1d110
X86: Create a SeqOp class of microops and make Br one of them.
2008-10-12 15:33:17 -07:00
Gabe Black
a76c4b8ca1
X86: Implement CPUID with a magical function instead of microcode.
2008-10-12 15:31:28 -07:00
Gabe Black
d0a43ce2b2
X86: Fix the ordering of special physical address ranges.
2008-10-12 14:01:06 -07:00
Gabe Black
3a1905157e
X86: Create a mechanism for the IO APIC to access I8259 vectors.
2008-10-12 13:54:57 -07:00
Gabe Black
c35da8e495
X86: Actually use the extra vector bits we get from ICW2.
2008-10-12 13:51:48 -07:00
Gabe Black
ec9d3aad71
X86: Make the local APIC process interrupts and send them to the CPU.
2008-10-12 13:45:21 -07:00
Gabe Black
876f4845f2
X86: Make the local APIC handle interrupt messages from the IO APIC.
2008-10-12 13:44:24 -07:00
Gabe Black
4d5c7f7038
X86: Change the default value for the IO APIC redirection table.
2008-10-12 13:35:26 -07:00
Gabe Black
3420ad7644
X86: Make the bases for x86 fault class public.
2008-10-12 13:29:26 -07:00
Gabe Black
557bde43c3
X86: Make APICs communicate through the memory system.
2008-10-12 13:28:54 -07:00
Gabe Black
e459013182
Create a message port for sending messages as apposed to reading/writing a memory range.
2008-10-12 12:08:51 -07:00
Gabe Black
e0f137a87c
X86: Add a LocalApic trace flag.
2008-10-12 12:07:25 -07:00
Gabe Black
42ebebf99a
X86: Make the local APIC accessible through the memory system directly, and make the timer work.
2008-10-12 11:08:00 -07:00
Gabe Black
d9f9c967fb
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
2008-10-12 09:09:56 -07:00
Gabe Black
c4f1cc3b48
CPU: Eliminate the get_vec function.
2008-10-12 08:24:09 -07:00
Gabe Black
0c3848732e
CPU: Add a getInterruptController function
2008-10-11 16:13:58 -07:00
Gabe Black
168e524b9b
X86: Create an IO APIC device.
2008-10-11 16:08:14 -07:00
Gabe Black
a2599e4fc1
X86: Set up a mechanism for the I8254 timer to cause interrupts.
2008-10-11 15:15:34 -07:00
Gabe Black
526933e5d0
X86: Add an Intel MP table to the simulation.
2008-10-11 15:14:37 -07:00
Gabe Black
f621b7b81f
CPU: Eliminate the simPalCheck funciton.
2008-10-11 12:17:24 -07:00
Gabe Black
da7209ec93
CPU: Eliminate the hwrei function.
2008-10-11 02:27:21 -07:00
Gabe Black
3af428606a
X86: Rename the PC device to Pc.
...
--HG--
rename : src/dev/x86/PC.py => src/dev/x86/Pc.py
2008-10-11 02:23:40 -07:00
Gabe Black
826621eb17
X86: Bring the South Bridge device into dev/x86 and get rid of south_bridge directory.
...
--HG--
rename : src/dev/x86/south_bridge/SouthBridge.py => src/dev/x86/SouthBridge.py
rename : src/dev/x86/south_bridge/south_bridge.cc => src/dev/x86/south_bridge.cc
rename : src/dev/x86/south_bridge/south_bridge.hh => src/dev/x86/south_bridge.hh
2008-10-11 02:21:44 -07:00
Gabe Black
bc2217eefc
X86: Change I8254 and PCSpeaker devices from subdevices to SimObjects and eliminate subdevices.
...
--HG--
rename : src/dev/x86/south_bridge/i8254.cc => src/dev/x86/i8254.cc
rename : src/dev/x86/south_bridge/i8254.hh => src/dev/x86/i8254.hh
rename : src/dev/x86/south_bridge/speaker.cc => src/dev/x86/speaker.cc
rename : src/dev/x86/south_bridge/speaker.hh => src/dev/x86/speaker.hh
2008-10-11 02:16:11 -07:00
Gabe Black
a6600fdd88
Devices: Make the Intel8254Timer device only use pointers to its counters.
2008-10-11 01:49:39 -07:00
Gabe Black
539563e04b
X86: Make the CMOS and I8259 devices use IntDev and IntPin.
2008-10-11 01:45:25 -07:00
Gabe Black
119e127d71
X86: Create the IntDev and IntPin system.
...
The IntDev class is a base for anything that supports IntPins. IntPins allow
devices to generically trigger interrupts on a particular pin of an IntDev
device without having to know what the device is or what pin they're attached
to.
2008-10-11 01:37:04 -07:00
Gabe Black
8c532d6297
X86: Hook the CMOS device to the I8259 PICs.
2008-10-11 01:31:32 -07:00
Gabe Black
cf9afbba51
X86: Make the I8259 decipher the commands it's given, and add some of it's registers.
2008-10-11 01:28:35 -07:00
Gabe Black
2753c07dc5
X86: Change the I8259 from a subdevice into a real SimObject.
...
--HG--
rename : src/dev/x86/south_bridge/i8259.cc => src/dev/x86/i8259.cc
rename : src/dev/x86/south_bridge/i8259.hh => src/dev/x86/i8259.hh
2008-10-11 01:22:20 -07:00
Gabe Black
f22c7d48f3
X86: Change the CMOS from a sub-device to a real SimObject
...
--HG--
rename : src/dev/x86/south_bridge/cmos.cc => src/dev/x86/cmos.cc
rename : src/dev/x86/south_bridge/cmos.hh => src/dev/x86/cmos.hh
2008-10-11 01:13:11 -07:00
Gabe Black
8c5dfa4532
TLB: Make all tlbs derive from a common base class in both python and C++.
2008-10-10 23:47:42 -07:00
Gabe Black
3d1734ec29
X86: Create SimObjects in python and C++ to represent the ACPI system description tables.
2008-10-10 23:43:33 -07:00
Gabe Black
f85a7f00c0
X86: Make the time on the RTC configurable.
2008-10-10 23:42:31 -07:00
Gabe Black
b03c95d075
X86: Create SimObjects in python and C++ to represent the Intel MP tables.
2008-10-10 23:39:53 -07:00
Nathan Binkert
89f016aacb
cprintf: properly deal with pointer types
2008-10-10 21:45:35 -07:00
Nathan Binkert
1f57193439
swig: Add in a %rename to allow the same name to appear in multiple namespaces.
2008-10-10 21:45:34 -07:00
Nathan Binkert
96936c6bf5
Rename the info function to inform to avoid likely name conflicts
2008-10-10 12:17:53 -07:00
Nathan Binkert
8ac63c48a4
automerge
2008-10-10 10:38:53 -07:00
Nathan Binkert
afb279b1bb
output: Make panic/fatal/warn more flexible so we can add some new ones.
...
The major thrust of this change is to limit the amount of code
duplication surrounding the code for these functions. This code also
adds two new message types called info and hack. Info is meant to be
less harsh than warn so people don't get confused and start thinking
that the simulator is broken. Hack is a way for people to add runtime
messages indicating that the simulator just executed a code "hack"
that should probably be fixed. The benefit of knowing about these
code hacks is that it will let people know what sorts of inaccuracies
or potential bugs might be entering their experiments. Finally, I've
added some flags to turn on and off these message types so command
line options can change them.
2008-10-10 10:18:28 -07:00
Nathan Binkert
b25e56b32a
gdb: add a debugging function that enters the python interpreter.
2008-10-10 10:15:01 -07:00
Nathan Binkert
70dbe61ffc
jobfile: Add support for dictionaries as jobfile options.
...
If the same dictionary option is seen in several options, those
dictionaries are composed. If you define the same dictionary key in
multiple options, the system flags an error.
Also, clean up the jobfile code so that it is more debuggable.
2008-10-10 10:15:01 -07:00
Nathan Binkert
84364f36d0
python: Add a utility for nested attribute dicts.
...
Change attrdict so that attributes that begin with an underscore don't
go into the dict.
2008-10-10 10:15:00 -07:00
Nathan Binkert
5586b1539b
misc: remove #include <cassert> from misc.hh since not everyone needs it.
2008-10-10 10:15:00 -07:00
Gabe Black
ec0fb05d64
X86: Turn SMBios structures into simobjects.
2008-10-10 03:50:51 -07:00
Gabe Black
9be6e08227
X86: Add a couple comments to the bios SConscript
2008-10-10 03:50:42 -07:00
Gabe Black
d897aa939f
X86: Move the smbios objects into a folder for BIOS objects.
2008-10-10 03:50:18 -07:00
Gabe Black
57d663877e
X86: Fix compilation with new eventq API.
2008-10-10 03:50:07 -07:00
Nathan Binkert
94b08bed07
SimObjects: Clean up handling of C++ namespaces.
...
Make them easier to express by only having the cxx_type parameter which
has the full namespace name, and drop the cxx_namespace thing.
Add support for multiple levels of namespace.
2008-10-09 22:19:39 -07:00
Nathan Binkert
4ecc5d53a3
range_map: Add a method to find which range a single value falls into.
2008-10-09 22:19:38 -07:00
Nathan Binkert
6ccf28c896
style: conform to M5 style.
2008-10-09 09:25:41 -07:00
Nathan Binkert
b556dc4119
mem: Add a method for setting the time on a packet.
2008-10-09 04:58:24 -07:00
Nathan Binkert
e06321091d
eventq: convert all usage of events to use the new API.
...
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
2008-10-09 04:58:24 -07:00
Nathan Binkert
8291d9db0a
eventq: Major API change for the Event and EventQueue structures.
...
Since the early days of M5, an event needed to know which event queue
it was on, and that data was required at the time of construction of
the event object. In the future parallelized M5, this sort of
requirement does not work well since the proper event queue will not
always be known at the time of construction of an event. Now, events
are created, and the EventQueue itself has the schedule function,
e.g. eventq->schedule(event, when). To simplify the syntax, I created
a class called EventManager which holds a pointer to an EventQueue and
provides the schedule interface that is a proxy for the EventQueue.
The intent is that objects that frequently schedule events can be
derived from EventManager and then they have the schedule interface.
SimObject and Port are examples of objects that will become
EventManagers. The end result is that any SimObject can just call
schedule(event, when) and it will just call that SimObject's
eventq->schedule function. Of course, some objects may have more than
one EventQueue, so this interface might not be perfect for those, but
they should be relatively few.
2008-10-09 04:58:23 -07:00
Nathan Binkert
68c75c589b
pdb: Try to make pdb work better.
...
I've done a few things here. First, I invoke the script a little bit
differently so that pdb doesn't get confused. Second, I've stored the
actual filename in the module's __file__ so that pdb can find the
source file on your machine.
2008-10-09 04:58:23 -07:00
Nathan Binkert
886c5f8fe5
SINIC: Commit old code from ASPLOS 2006 studies.
...
NOTE: This code was written by Nathan Binkert in 2006 and is properly copyright
"The Regents of the University of Michigan"
2008-10-09 04:58:23 -07:00
Nathan Binkert
eb89a23556
eventq: Don't use inline friend function when a static function will do.
...
Another good reason to avoid this is that swig will try to wrap the friend,
but it won't try to wrap a private static function.
2008-10-09 04:58:23 -07:00
Nathan Binkert
a589eb4053
SCons: add code to provide a libm5 shared library.
...
Targets look like libm5_debug.so. This target can be dynamically
linked into another C++ program and provide just about all of the M5
features. Additionally, this library is a standalone module that can
be imported into python with an "import libm5_debug" type command
line.
2008-10-09 04:58:23 -07:00
Nathan Binkert
0b83563a9c
eventq: I'm sick of the warning about MaxTick being unused.
2008-10-09 04:58:23 -07:00
Nathan Binkert
7cc2a88038
stats: use properly signed types for looping and comparison
2008-10-09 04:58:23 -07:00
Nathan Binkert
a52dce6d62
style: Bring statistics code in line with the proper style.
2008-10-09 04:58:23 -07:00
Gabe Black
b66eb3b8d1
O3: Generaize the O3 IMPL class so it isn't split out by ISA.
...
--HG--
rename : src/cpu/o3/sparc/cpu_builder.cc => src/cpu/o3/cpu_builder.cc
rename : src/cpu/o3/sparc/dyn_inst.cc => src/cpu/o3/dyn_inst.cc
rename : src/cpu/o3/sparc/impl.hh => src/cpu/o3/impl.hh
rename : src/cpu/o3/sparc/thread_context.cc => src/cpu/o3/thread_context.cc
2008-10-09 00:10:02 -07:00
Gabe Black
f57c286d2c
O3: Generaize the O3 dynamic instruction class so it isn't split out by ISA.
...
--HG--
rename : src/cpu/o3/dyn_inst.hh => src/cpu/o3/dyn_inst_decl.hh
rename : src/cpu/o3/alpha/dyn_inst_impl.hh => src/cpu/o3/dyn_inst_impl.hh
2008-10-09 00:09:26 -07:00
Gabe Black
e09c403d32
O3: Generalize the O3 CPU object so it isn't split out by ISA.
2008-10-09 00:08:50 -07:00
Gabe Black
975c9e3af8
Microcode: Fix a silent typo error in the microcode assembler.
2008-10-09 00:07:38 -07:00
Gabe Black
523531a40e
Microcode: Fix a very old bug with parsing external labels in microcode.
2008-10-09 00:07:21 -07:00
Gabe Black
c5c6ad7ed6
CPU: Fix where setMicroPC was being called instead of setNextMicroPC.
2008-10-09 00:06:05 -07:00
Gabe Black
e1b306fa53
X86: Fix the debugging microops. The debug functions can't handle a string object format.
2008-10-09 00:05:39 -07:00
Gabe Black
569db520ad
X86: Make far ret modify CS instead of some random selector.
2008-10-09 00:04:36 -07:00
Nathan Binkert
6b2bb53fd6
python: cleanup options parsing stuff so that it properly deals with defaults.
...
While we're at it, make it possible to run main.py in a somewhat
standalone mode again so that we can test things without compiling.
2008-10-06 09:31:51 -07:00
Korey Sewell
6c046a28dc
fix shadow set bugs in MIPS code that caused out of bounds access...
...
panic rdpgpr/wrpgpr instructions until a better impl.
of MIPS shadow sets is available.
2008-10-06 02:07:04 -04:00
Nathan Binkert
b25755993b
unittest: Add unit tests to the scons framework.
...
Also fix the unit tests so they actually compile correctly.
2008-10-02 11:27:01 -07:00
Nathan Binkert
52493b2720
unittest: Cleanup unit tests. Follow style. Garbage Collect.
...
--HG--
rename : src/unittest/rangemaptest2.cc => src/unittest/rangemultimaptest.cc
2008-10-02 11:26:59 -07:00
Nathan Binkert
67a2918abc
stats: Fix small bug pointed out by unit testing.
2008-10-02 11:26:59 -07:00
Ali Saidi
0a1613abe1
Output: Verify output files are open after opening them.
2008-10-02 12:46:57 -04:00
Steve Reinhardt
7bf6a219db
Make overriding port assignments in Python work,
...
and print better error messages when it doesn't.
2008-09-29 23:30:14 -07:00
Steve Reinhardt
45cba35fc1
Fix EVENTQ_DEBUG vs DEBUG_EVENTQ #define inconsistency.
2008-09-29 23:30:14 -07:00
Nathan Binkert
1e9c428522
alpha: Need to include cstring so that g++ 4.3 works.
2008-09-29 07:15:30 -07:00
Nathan Binkert
80d9be86e6
gcc: Add extra parens to quell warnings.
...
Even though we're not incorrect about operator precedence, let's add
some parens in some particularly confusing places to placate GCC 4.3
so that we don't have to turn the warning off. Agreed that this is a
bit of a pain for those users who get the order of operations correct,
but it is likely to prevent bugs in certain cases.
2008-09-27 21:03:49 -07:00
Nathan Binkert
cf7ddd8e8a
style: Make a style pass over the whole arch/alpha directory.
2008-09-27 21:03:48 -07:00
Nathan Binkert
82f5723c7a
alpha: Clean up namespace usage.
2008-09-27 21:03:47 -07:00
Nathan Binkert
8ea5176b7f
arch: TheISA shouldn't really ever be used in the arch directory.
...
We should always refer to the specific ISA in that arch directory.
This is especially necessary if we're ever going to make it to the
point where we actually have heterogeneous systems.
2008-09-27 21:03:46 -07:00
Nathan Binkert
0b30c345f1
alpha: Get rid fo the namespace called EV5.
...
We're never going to do an alpha platform other than the one we've got.
2008-09-27 21:03:45 -07:00
Nathan Binkert
819023b8e2
style
2008-09-27 07:25:04 -07:00
Nathan Binkert
83f3bff643
add a bit of style
2008-09-27 00:15:45 -07:00
Nathan Binkert
ca4baf3871
style: missed space after switch
2008-09-26 09:37:21 -07:00
Nathan Binkert
9838be2521
When nesting if statements, use braces to avoid ambiguous else clauses.
2008-09-26 08:18:57 -07:00
Nathan Binkert
abca171e24
Use logical operator instead of bitwise operator for correctness.
2008-09-26 08:18:56 -07:00
Nathan Binkert
6798aa14ed
style: bring this file into M5 style, use the new pte translate function.
2008-09-26 08:18:55 -07:00
Nathan Binkert
a053055e17
scons: disable several gcc warnings for swig autogenerated wrapper code.
2008-09-26 08:18:54 -07:00
Nathan Binkert
0309c877f3
style: These files didn't even come close to following the M5 style guide.
2008-09-26 08:18:53 -07:00
Kevin Lim
b784903207
O3CPU: Fix thread writeback logic.
...
Fix the logic in the LSQ that determines if there are any stores to
write back. In the commit stage, check for thread specific writebacks
instead of just any writeback.
2008-09-26 07:44:07 -07:00
Kevin Lim
712a8ee700
O3CPU: Add a hack to ensure that nextPC is set correctly after syscalls.
...
Just check CPU's nextPC before and after syscall and if it changes,
update this instruction's nextPC because the syscall must have changed
the nextPC.
2008-09-26 07:44:06 -07:00
Nathan Binkert
70ec46de17
sparc: Fix style, create a helper function for translation.
...
The translate function simplifies code and removes some compiler
warnings in gcc 3.4
2008-09-23 20:38:02 -07:00
Nathan Binkert
38dd9687ce
scons: Separate swig environment so we can have different flags.
...
Swig code isn't quite perfect, so let's not turn on all of the warnings.
2008-09-22 08:25:58 -07:00
Nathan Binkert
6efb930e19
gcc: Version 4.3 is pretty anal about shadowing types, placate it.
...
In the future, it would be nice to put the O3CPU into its own
namespace so that we don't end up hardcoding pointers to the global
namespace.
2008-09-22 08:25:57 -07:00
Nathan Binkert
f3f4b17c5b
style
2008-09-22 08:21:47 -07:00
Nathan Binkert
4826610d86
We're using the static keyword improperly in some cases.
2008-09-19 09:42:54 -07:00
Nathan Binkert
ce3d8c2b03
atomicio: provide atomic read and write functions.
...
These functions keep trying to read and write until all data has been
transferred, or an error occurrs. In the case where an end of file
hasn't been reached, but all of the bytes have not been read/written,
try again. On EINTR, try again.
2008-09-19 09:42:31 -07:00
Nathan Binkert
af9c5e05f7
Use C++ limits where applicable for portability
2008-09-19 09:11:43 -07:00
Nathan Binkert
befae3c0b0
Use the proper version of C++ headers
2008-09-19 09:11:43 -07:00
Nathan Binkert
ea83cedcf6
Check the return value of I/O operations for failure
2008-09-19 09:11:42 -07:00
Nathan Binkert
f066db7fcd
inifile: Whack preprocessor access.
...
We haven't used the preprocessor feature of the inifile stuff in a
very long time, so let's get rid of it since it would otherwise take
effort to maintain.
2008-09-19 09:11:40 -07:00
Ali Saidi
3a3e356f4e
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
2008-09-10 14:26:15 -04:00
Nathan Binkert
09a8fb0b52
style: this file did not conform to style
2008-09-09 16:27:17 -07:00
Nathan Binkert
496d3f2789
style: This file hugely violated the M5 style.
...
Remove a bunch of unused cruft from the interface while we're at it
2008-09-08 18:03:52 -07:00
Gabe Black
30bc897613
X86: Fix the microcode for sign/zero extending moves that use high byte registers.
2008-09-03 00:52:54 -04:00
Clint Smullen
4aa017affc
Device: Fix bug in DmaPort::recvRetry. The interface attempts to send the same packet again.
...
It doesn't cause a problem currently, however with a different Memory Object it could cause
problems
2008-08-26 02:37:26 -04:00
Ali Saidi
3d5fe0c372
IGbE: Patches I neglected to apply before pushing the previous igbe changeset
2008-08-24 15:27:49 -04:00
Gabe Black
3633a916c2
CPU: Get rid of two more duplicated CPU params.
2008-08-19 21:59:09 -07:00
Richard Strong
8d018aef0f
Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its
...
python type of a latency. In addition, the multiple definitions of profile in the different cpu models caused
problems for intialization of the interval value. If a child class's profile value was defined, the parent
BaseCPU::ProfileEvent interval field would be initialized with a garbage value. The fix was to remove the
multiple redifitions of profile in the child CPU classes.
2008-08-18 10:50:58 -07:00
Ali Saidi
6248e12704
Add the ability to specify a think time before descriptor fetch/writeback starts/ends as well as after read/write dmas
2008-08-13 17:41:58 -04:00
Ali Saidi
549c43b2d0
Add the ability for a DMA to tack on an extra delay after the DMA is actually finished.
2008-08-13 17:41:56 -04:00
Ali Saidi
05954e1ba7
More subtle fixes to how interrupts are supposed to work in the device. Fix postedInterrupts statistics.
2008-08-13 16:30:30 -04:00
Ali Saidi
91d968783e
Return an UnimpFault for an ITB translation of an uncachable address. We don't support fetching from uncached addresses in Alpha and it means that a speculative fetch can clobber device registers.
2008-08-13 16:29:59 -04:00
Nathan Binkert
1b1a7e33e7
style
2008-08-11 14:47:49 -07:00
Nathan Binkert
9cf8ad3a17
params: Get rid of the remnants of the old style parameter configuration stuff.
2008-08-11 12:22:17 -07:00
Nathan Binkert
ee62a0fec8
params: Convert the CPU objects to use the auto generated param structs.
...
A whole bunch of stuff has been converted to use the new params stuff, but
the CPU wasn't one of them. While we're at it, make some things a bit
more stylish. Most of the work was done by Gabe, I just cleaned stuff up
a bit more at the end.
2008-08-11 12:22:16 -07:00
Steve Reinhardt
3448a12208
Make time format in 'started' line same as 'compiled'.
...
Also make -B output consistent with normal header, and
only include actual build options.
2008-08-04 01:46:46 -04:00
Steve Reinhardt
58c63ea8b1
Get rid of outputStream... wasn't really being used
...
(except for warn()) and new -r/-e options make it
not worth fixing.
2008-08-04 01:45:12 -04:00
Steve Reinhardt
fe8aeff362
Add -r/-e options to redirect stdout/stderr.
...
Better than using shell since it automatically uses -d directory
for output files (creating it as needed).
2008-08-04 00:40:31 -04:00
Nathan Binkert
50ef39af82
sockets: Add a function to disable all listening sockets.
...
When invoking several copies of m5 on the same machine at the same
time, there can be a race for TCP ports for the terminal connections
or remote gdb. Expose a function to disable those ports, and have the
regression scripts disable them. There are some SimObjects that have
no other function than to be used with ports (NativeTrace and
EtherTap), so they will panic if the ports are disabled.
2008-08-03 18:19:55 -07:00
Nathan Binkert
ede89c2d54
libm5: Create a libm5 static library for embedding m5.
...
This should allow m5 to be more easily embedded into other simulators.
The m5 binary adds a simple main function which then calls into the m5
libarary to start the simulation. In order to make this work
correctly, it was necessary embed python code directly into the
library instead of the zipfile hack. This is because you can't just
append the zipfile to the end of a library the way you can a binary.
As a result, Python files that are part of the m5 simulator are now
compile, marshalled, compressed, and then inserted into the library's
data section with a certain symbol name. Additionally, a new Importer
was needed to allow python to get at the embedded python code.
Small additional changes include:
- Get rid of the PYTHONHOME stuff since I don't think anyone ever used
it, and it just confuses things. Easy enough to add back if I'm wrong.
- Create a few new functions that are key to initializing and running
the simulator: initSignals, initM5Python, m5Main.
The original code for creating libm5 was inspired by a patch Michael
Adler, though the code here was done by me.
2008-08-03 18:19:54 -07:00
Nathan Binkert
678abbc364
syscall: Avoid a compiler warning which turns into a bug.
...
Simply cast the result to an int and life is good.
2008-08-03 18:19:53 -07:00
Steve Reinhardt
62c08a75ad
Make default PhysicalMemory latency slightly more realistic.
...
Also update stats to reflect change.
2008-08-03 18:13:29 -04:00
Gabe Black
b179c3f4cd
X86: Make hint nops consume their modrm byte.
2008-08-03 14:43:24 -07:00
Nathan Binkert
e98ccd309b
kill unused code
2008-08-02 20:42:15 -07:00
Nathan Binkert
4b1e0d235d
scons: Get rid of generate.py in the build system.
...
I decided that separating some of the scons code into generate.py was
just a bad idea because it caused the dependency system to get all
messed up. If separation is the right way to go in the future, we
should probably use the sconscript mechanism, not the mechanism that I
just removed.
2008-07-31 08:01:38 -07:00
Michael Adler
f3a3ab7f2c
syscall: Fix TTY emulation in fstat() user-mode simulation for fd 1 (stdout).
...
The code didn't set S_IFCHR in the st_mode
2008-07-24 16:31:33 -07:00
Michael Adler
5f42bfcd56
process: separate stderr from stdout
...
- Add the option of redirecting stderr to a file. With the old
behaviour, stderr would follow stdout if stdout was to a file, but
stderr went to the host stderr if stdout went to the host stdout. The
new default maintains stdout and stderr going to the host. Now the
two can specify different files, but they will share a file descriptor
if the name of the files is the same.
- Add --output and --errout options to se.py to go with --input.
2008-07-23 14:41:34 -07:00
Michael Adler
2cd04fd6da
syscalls: Add a bunch of missing system calls.
...
readlink, umask, truncate, ftruncate, mkdir, and getcwd.
2008-07-23 14:41:33 -07:00
Michael Adler
8c4f18f6f5
RemoteGDB: add an m5 command line option for setting or disabling remote gdb.
2008-07-23 14:41:33 -07:00
Steve Reinhardt
aa2bb4f7b9
Get rid of useless m5_assert macro.
...
Its only purpose was to print the cycle number but that already
happens in the SIGABRT handler. No one used it anyway.
2008-07-15 14:38:51 -04:00
Steve Reinhardt
8e7ddce284
Use ReadResp instead of LoadLockedResp for LoadLockedReq responses.
2008-07-15 14:38:51 -04:00
Steve Reinhardt
6262e0d909
Add missing newlines to Bus DPRINTFs.
2008-07-15 14:38:51 -04:00
Nathan Binkert
f9a597ddf3
m5ops: clean up the m5ops stuff.
...
- insert warnings for deprecated m5ops
- reserve opcodes for Ali's stuff
- remove code for stuff that has been deprecated forever
- simplify m5op_alpha
2008-07-11 08:52:50 -07:00
Nathan Binkert
88766f7c71
style: fix indentation and formatting of the pseudo insts.
2008-07-11 08:52:50 -07:00
Nathan Binkert
f90b08a5cc
eventq: change the event datastructure back to LIFO.
...
The status quo is preferred since it is less likely that people will
rely on LIFO than FIFO, and when we move to a parallelized M5, no
ordering between events of the same time/priority will be guaranteed.
2008-07-11 08:48:50 -07:00
Nathan Binkert
10df68dd72
eventq: new eventq data structure. The new data structure is singly
...
linked list sorted by time and priority. For things of the same time
and priority, a second, circularly linked list maintains the data
structure. Events of the same time and priority are now inserted in
FIFO order instead of LIFO order. This dramatically improves the
performance of systems that schedule multiple events at the same time.
The FIFO order version is not preferred to LIFO (because it may cause
people to rely on it), but I'm going to commit it anyway and
immediately commit the preferred LIFO version on top.
2008-07-11 08:38:31 -07:00
Nathan Binkert
93517dd90c
eventq: Clean up the Event class so that it uses fewer bytes. This
...
will hopefullly allow it to fit in a cache line.
2008-07-10 21:35:42 -07:00
Ali Saidi
7a83c50a59
Fix cases where RADV interrupt timer is used and make ITR interrupt moderation not always delay if no interrupts have been posted for the ITR value.
2008-07-01 10:30:08 -04:00
Ali Saidi
a4a7a09e96
Remove delVirtPort() and make getVirtPort() only return cached version.
2008-07-01 10:25:07 -04:00
Ali Saidi
c5fbbf376a
Change everything to use the cached virtPort rather than created their own each time.
...
This appears to work, but I don't want to commit it until it gets tested a lot more.
I haven't deleted the functionality in this patch that will come later, but one question
is how to enforce encourage objects that call getVirtPort() to not cache the virtual port
since if the CPU changes out from under them it will be worse than useless. Perhaps a null
function like delVirtPort() is still useful in that case.
2008-07-01 10:24:19 -04:00
Ali Saidi
50e3e50e1a
Make the cached virtPort have a thread context so it can do everything that a newly created one can.
2008-07-01 10:24:16 -04:00
Ali Saidi
9bd0bfe559
After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFraction statistic is really wrong.
...
The notIdleFraction statistic isn't updated when the statistics reset, probably because the cpu Status information
was pulled into the atomic and timing cpus. This changeset pulls Status back into the BaseSimpleCPU object. Anyone
care to comment on the odd naming of the Status instance? It shouldn't just be status because that is confusing
with Port::Status, but _status seems a bit strage too.
2008-07-01 10:24:09 -04:00
Steve Reinhardt
96bbccc36b
Automated merge after backout.
2008-06-28 13:20:00 -04:00
Steve Reinhardt
caaac16803
Backed out changeset 94a7bb476fca: caused memory leak.
2008-06-28 13:19:38 -04:00
Ali Saidi
3205768ea5
Automated merge with http://repo.m5sim.org/m5-stable
2008-06-24 15:51:12 -04:00
Ali Saidi
57b5de6b9f
Checkpoinging/SWIG: Undo part of changeset 5464 since it broke checkpointing.
2008-06-24 15:48:45 -04:00
Gabe Black
18c83be507
SimObject: Add in missing includes of <string> and fix minor style problem.
2008-06-21 14:23:58 -04:00
Steve Reinhardt
1434b86943
Make bus address conflict error more informative
2008-06-21 01:06:27 -04:00
Steve Reinhardt
6b45238316
Generate more useful error messages for unconnected ports.
...
Force all non-default ports to provide a name and an
owner in the constructor.
2008-06-21 01:04:43 -04:00
Nathan Binkert
c1584e4227
imported patch sim_object_params.diff
2008-06-18 12:07:15 -07:00
Nathan Binkert
67a33eed40
AtomicSimpleCPU: Separate data stalls from instruction stalls.
...
Separate simulation of icache stalls and dat stalls.
2008-06-18 10:15:21 -07:00
Nathan Binkert
1099a9838a
Ethernet: share statistics between all ethernet devices and apply some
...
of those statistics to the e1000 model.
2008-06-17 22:22:44 -07:00
Nathan Binkert
87d03d00cd
inet: initialization fixes.
...
Make sure variables are properly initialized and also make sure that
truth testing works properly.
2008-06-17 22:14:12 -07:00
Nathan Binkert
8042b8f4c7
PacketFifo: Get slack out of the EthPacketData structure. This allows
...
a packet to exist in multiple FIFOs if desired.
2008-06-17 21:34:27 -07:00
Nathan Binkert
163465ac08
ThreadState: Ensure that kernelStats is properly initialized
2008-06-17 21:11:20 -07:00
Nathan Binkert
9dc4e2952c
rename MipsConsole to MipsBackdoor
...
--HG--
rename : src/dev/mips/MipsConsole.py => src/dev/mips/MipsBackdoor.py
rename : src/dev/mips/console.cc => src/dev/mips/backdoor.cc
rename : src/dev/mips/console.hh => src/dev/mips/backdoor.hh
2008-06-17 20:39:51 -07:00
Nathan Binkert
934523c3a0
rename AlphaConsole to AlphaBackdoor
...
--HG--
rename : src/dev/alpha/AlphaConsole.py => src/dev/alpha/AlphaBackdoor.py
rename : src/dev/alpha/console.cc => src/dev/alpha/backdoor.cc
rename : src/dev/alpha/console.hh => src/dev/alpha/backdoor.hh
2008-06-17 20:36:39 -07:00
Nathan Binkert
6ff4539901
Change the default output filename for the terminal so it's more obvious.
...
--HG--
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.drivesys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.testsys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal
2008-06-17 20:30:37 -07:00
Nathan Binkert
00df9016fe
Rename SimConsole to Terminal since it makes more sense
...
--HG--
rename : src/dev/SimConsole.py => src/dev/Terminal.py
rename : src/dev/simconsole.cc => src/dev/terminal.cc
rename : src/dev/simconsole.hh => src/dev/terminal.hh
2008-06-17 20:29:06 -07:00
Nathan Binkert
fa8f91fdc0
physmem: Add a null option to physical memory so it doesn't store data.
2008-06-15 21:39:29 -07:00
Nathan Binkert
e3c267a3db
port: Clean up default port setup and port switchover code.
2008-06-15 21:34:32 -07:00
Nathan Binkert
b429b1759d
params: Prevent people from setting attributes on vector params.
2008-06-15 21:26:33 -07:00
Nathan Binkert
6dedc645f7
add compile flags to m5
2008-06-15 20:56:35 -07:00
Nathan Binkert
b2036bfda8
Command line option to print out List of SimObjects and their parameters
2008-06-14 21:51:08 -07:00
Nathan Binkert
bbeb8082a5
main: add .m5/options.py processing. This file is processed before
...
arguments are parsed so that they can change the default options for
various config parameters.
2008-06-14 21:16:00 -07:00
Nathan Binkert
fc48d1dcf5
Add .m5 configuration directory
2008-06-14 21:15:59 -07:00
Nathan Binkert
779c31077c
python: Separate the options parsing stuff. Remove options parsing stuff from
...
main.py so things are a bit more obvious.
2008-06-14 21:15:58 -07:00
Nathan Binkert
4afdc40d70
params: Fix the memory bandwidth parameter
2008-06-14 20:42:45 -07:00
Nathan Binkert
3d2e7797cc
params: Fix floating point parameters
2008-06-14 20:39:31 -07:00
Nathan Binkert
f82d4e2364
python: Move various utility classes into a new m5.util package so
...
they're all in the same place. This also involves having just one
jobfile.py and moving it into the utils directory to avoid
duplication. Lots of improvements to the utility as well.
--HG--
rename : src/python/m5/attrdict.py => src/python/m5/util/attrdict.py
rename : util/pbs/jobfile.py => src/python/m5/util/jobfile.py
rename : src/python/m5/util.py => src/python/m5/util/misc.py
rename : src/python/m5/multidict.py => src/python/m5/util/multidict.py
rename : util/stats/orderdict.py => src/python/m5/util/orderdict.py
2008-06-14 20:19:49 -07:00
Nathan Binkert
fe325c7f43
MemReq: Add option to reset the time on a request.
2008-06-14 19:39:01 -07:00
Nathan Binkert
ce43e46576
Fix various SWIG warnings
2008-06-14 12:57:21 -07:00
Nathan Binkert
7a58b5a38a
Add missing dependencies on .i files
2008-06-14 12:10:50 -07:00
Nathan Binkert
2d037682ff
scons: proper fix for hg version stuff
2008-06-14 10:30:18 -07:00
Nathan Binkert
fe4fd9f414
scons: fix program_info.cc generation
2008-06-13 17:34:22 -07:00
Steve Reinhardt
dace77dc4a
Automated merge with ssh://m5sim.org//repo/m5
2008-06-13 01:59:10 -04:00
Steve Reinhardt
caccbd1edc
Get rid of bogus bus assertion.
...
It runs out that if a MemObject turns around and does a send in its
receive callback, and there are other sends already scheduled, then
it could observe a state where it's not at the head of the list but
the bus's sendEvent is not scheduled (because we're still in the
middle of processing the prior sendEvent).
2008-06-13 01:33:49 -04:00
Steve Reinhardt
024ec4c5c3
Get rid of bogus cache assertion.
...
I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.
2008-06-13 01:29:20 -04:00
Ali Saidi
907b28cc62
HG: Add compiled hg revision and date to the standard M5 output.
2008-06-13 01:09:04 -04:00
Gabe Black
2b4874449c
Alpha: Get rid of an old include of a non-existant file.
2008-06-12 01:54:21 -04:00
Gabe Black
7be8e671f1
Params: Allow nested namespaces in cxx_namespace
2008-06-12 01:00:29 -04:00
Gabe Black
5b5875341c
X86: Make the cpuid processor identifier return a real string.
2008-06-12 01:00:19 -04:00
Gabe Black
c625cf0ae1
X86: Make the code compile as 32 bit.
2008-06-12 01:00:05 -04:00
Gabe Black
23c04b8c66
Params: Remove an unnecessary include.
2008-06-12 00:59:58 -04:00
Gabe Black
bceaa257a3
X86: Make the e820 table manually or automatically configurable from python.
2008-06-12 00:58:36 -04:00
Gabe Black
4f4ff17578
X86: Make the disassembly for halt conform with the other microops.
2008-06-12 00:58:27 -04:00
Gabe Black
31d40ad7c2
X86: Implement and hook up STI and CLI instructions.
2008-06-12 00:58:19 -04:00
Gabe Black
da20c0ec54
X86: Make sure there's something to catch when the kernel messes with ports "behind" the pci config magic ports.
2008-06-12 00:58:13 -04:00
Gabe Black
1f5b992b58
X86: Make the platform object initialize channel 0 of the PIT.
2008-06-12 00:56:54 -04:00
Gabe Black
16e26fbf03
X86: Hook the speaker device to the pit device.
2008-06-12 00:56:17 -04:00
Gabe Black
da7f512067
Timer: Fill out the periodic modes a little.
2008-06-12 00:56:07 -04:00
Gabe Black
4f9a0402f6
Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.
2008-06-12 00:54:48 -04:00
Gabe Black
0368ccdeda
BitUnion: Take out namespace declaration so bitunions can be declared inside classes.
2008-06-12 00:54:32 -04:00
Gabe Black
81936ae2ed
X86: Add an event for the apic timer timeout. It doesn't get used yet.
2008-06-12 00:54:19 -04:00
Gabe Black
6b8d0363ee
X86: Rename the divide count register to divide configuration.
2008-06-12 00:54:12 -04:00
Gabe Black
b10742ee2b
X86: Make the apic isr and irr work.
2008-06-12 00:54:05 -04:00
Gabe Black
69000baef3
X86: Make the apic task priority register work.
2008-06-12 00:54:01 -04:00
Gabe Black
e9c481ea4a
X86: Make the logical destination and destination format work.
2008-06-12 00:53:50 -04:00
Gabe Black
ed23a4970b
X86: Make the apic ID register work.
2008-06-12 00:53:43 -04:00
Gabe Black
8a6723e038
X86: Make the apic version register work.
2008-06-12 00:53:37 -04:00
Gabe Black
8d2416c6e9
X86: Implement a partial, sort of correct version of the protected mode variant of iret.
2008-06-12 00:53:01 -04:00
Gabe Black
66f54a6037
X86: Change how segment loading is performed.
2008-06-12 00:52:12 -04:00
Gabe Black
129831c116
X86: Make pushes and pops use the stack size instead of the data size.
2008-06-12 00:51:57 -04:00
Gabe Black
b05299253f
X86: In non 64bit mode, throw a fault when a NULL segment is accessed.
2008-06-12 00:51:50 -04:00
Gabe Black
a8384311d5
X86: Take advantage of the new meta register.
2008-06-12 00:51:14 -04:00
Gabe Black
d4e7c7edd3
X86: Keep handy values like the operating mode in one register.
2008-06-12 00:50:25 -04:00
Gabe Black
fa7c81c6df
X86: Change what the microop chks does.
...
Instead of computing the segment descriptor address, this now checks if a
selector value/descriptor are legal for a particular purpose.
2008-06-12 00:50:10 -04:00
Gabe Black
6bd9cf3594
X86: Add a microop to read a segments attribute register.
2008-06-12 00:50:05 -04:00
Gabe Black
e0c20386ac
X86: Add microops and supporting code to manipulate the whole rflags register.
2008-06-12 00:49:50 -04:00
Gabe Black
2bb8933f78
X86: Add microops which panic, fatal, warn, and warn_once.
2008-06-12 00:49:25 -04:00
Gabe Black
bbc1f394ff
X86: Truncate descriptors to 16 bits.
2008-06-12 00:49:16 -04:00
Gabe Black
6106b05b6e
X86: Redo BSF.
2008-06-12 00:48:58 -04:00
Gabe Black
dfc2d44ea3
X86: Flesh out 3dnow instruction decoding a bit and grab the byte immediate.
2008-06-12 00:48:46 -04:00
Gabe Black
de6eeaaa27
X86: Make string instructions work when rcx=0.
2008-06-12 00:48:15 -04:00
Gabe Black
8688ef3fe5
X86: Have all 8 machine check registers since the kernel assumes they're there.
2008-06-12 00:48:02 -04:00
Gabe Black
a8e3001df8
X86: Bypass unaligned access support for register addressed MSRs.
2008-06-12 00:47:25 -04:00
Gabe Black
b3e55339f9
X86: Remove enforcement of APIC register access alignment. Panic if more than one register is accessed at a time.
2008-06-12 00:46:22 -04:00
Gabe Black
8e2991b529
X86: Fix the implementation of BSF.
2008-06-12 00:46:04 -04:00
Gabe Black
16e189fad2
X86: Bit scan forward/reverse were accidentally transposed.
2008-06-12 00:45:52 -04:00
Gabe Black
254cc07650
X86: Fix a byte register indexing issue in the sign extending move from memory microcode.
2008-06-12 00:45:22 -04:00
Gabe Black
8501a90f59
X86: Add in some support for the tsc register.
2008-06-12 00:39:10 -04:00
Gabe Black
d093fcb079
CPU: Make the simple cpu trace data for loads/stores.
2008-06-12 00:35:50 -04:00
Ali Saidi
5797ff1016
X86: Fix building on *BSD hosts
2008-06-11 10:54:12 -04:00
Ali Saidi
fd3e661cd3
SCons: Fix more SCons version issues
2008-06-11 10:54:08 -04:00
Ali Saidi
f5e36d156d
IGbE: Implement sending packet that is contained in more than 2 descriptors.
...
--HG--
extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
2008-05-20 16:06:56 -04:00
Stephen Hines
b7af65f414
SCons: Fixing SCons bug 2006 issues for non-alpha ISAs
...
--HG--
extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
2008-05-20 14:04:53 -04:00
Ali Saidi
e71a5270a2
Make sure that output files are always checked success before they're used.
...
Make OutputDirectory::resolve() private and change the functions using
resolve() to instead use create().
--HG--
extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
2008-05-15 19:10:26 -04:00
Ali Saidi
4a4317ae18
SCons: More scons fixing for SCons bug 2006
...
--HG--
extra : convert_revision : d3656ab1e3c18251d4bcf6f5a31103d4b2dfdc43
2008-05-06 16:22:14 -04:00
Ali Saidi
8af6dc118c
SCons: add comments to SConscript documenting bug workaround
...
--HG--
extra : convert_revision : e6cdffe953d56b96c76c7ff14d2dcc3de3ccfcc3
2008-04-10 15:38:10 -04:00
Ali Saidi
fe12f38353
PhysicalMemory: Add parameter for variance in memory delay.
...
--HG--
extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
2008-04-10 14:44:52 -04:00
Ali Saidi
ed27c4c521
SCons: Manually specifying header only directories with Dir() works around the problem
...
--HG--
extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3
2008-04-08 11:08:26 -04:00
Ali Saidi
1605fbebc8
IGbE: Fix bug that limits wire performance a bit
...
--HG--
extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
2008-03-25 15:58:54 -04:00
Steve Reinhardt
ba1f7d31e0
Automated merge with ssh://daystrom.m5sim.org//repo/m5
...
--HG--
extra : convert_revision : 7922848bb1145bcb2ee07d672d21cfe2dd98fc03
2008-03-25 10:04:52 -04:00
Steve Reinhardt
29be31ce31
Fix handling of writeback-induced writebacks in atomic mode.
...
--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
2008-03-25 10:01:21 -04:00
Gabe Black
93dd1978a7
X86: Put an RTC into the CMOS part of the southbridge.
...
--HG--
extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3
2008-03-25 02:15:23 -04:00
Gabe Black
e5bdae15f3
Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.
...
--HG--
extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
2008-03-25 02:15:06 -04:00
Gabe Black
af9a57566a
X86: Turn #defines into consts.
...
--HG--
extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa
2008-03-25 02:09:18 -04:00
Gabe Black
48409ca512
X86: Start implementing the south bridge stuff.
...
--HG--
extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
2008-03-25 02:08:54 -04:00
Gabe Black
b0c52885ce
X86: Change the Opteron platform to be the PC platform.
...
--HG--
extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
2008-03-25 02:06:53 -04:00
Steve Reinhardt
623dd7ed3a
Delete the Request for a no-response Packet
...
when the Packet is deleted, since the requester
can't possibly do it.
--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
2008-03-24 01:08:02 -04:00
Steve Reinhardt
93ab43288a
Don't FastAlloc MSHRs since we don't allocate them on the fly.
...
--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
2008-03-24 01:08:02 -04:00
Steve Reinhardt
627592c2f2
Add FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct options.
...
--HG--
extra : convert_revision : 56a7f646f2ac87019c78ba7fa62c5f4bdc00ba44
2008-03-24 01:08:02 -04:00
Steve Reinhardt
407710d387
Fix cache problem with writes to tempBlock
...
getting wrong writeback address.
--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
2008-03-22 22:17:15 -04:00
Gabe Black
3fe1af7952
MIPS: Check endianness of binaries in SE mode.
...
--HG--
extra : convert_revision : e6c4bda6078eb68a26f8834411f744078c6bf5a9
2008-03-20 02:10:21 -04:00
Steve Reinhardt
b051ae6acc
Fix a few Packet memory leaks.
...
--HG--
extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a
2008-03-17 03:08:28 -04:00
Steve Reinhardt
131c65f429
Restructure bus timing calcs to cope with pkt being deleted by target.
...
--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
2008-03-17 03:07:38 -04:00
Steve Reinhardt
19c367fa8f
Fix subtle cache bug where read could return stale data
...
if a prior write miss arrived while an even earlier
read miss was still outstanding.
--HG--
extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
2008-03-15 05:03:55 -07:00
Gabe Black
50946b1673
Merge
...
--HG--
extra : convert_revision : ec5f41b2007ade15f6f4c4a1533e50f9cba2798e
2008-03-06 21:09:15 -05:00
Gabe Black
a245b0eedf
X86: Refine the local APIC.
...
--HG--
extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2
2008-03-06 20:37:28 -05:00
Vilas Sridharan
21fd15ad9a
O3CPU: Don't call dumpInsts if DEBUG is not defined
...
--HG--
extra : convert_revision : 3194bde4c624d118969bfbf92282539963a72245
2008-03-06 00:27:09 -05:00
Gabe Black
66aaabf4ae
X86: Don't map the local APIC into the physical address space in SE mode.
...
--HG--
extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208
2008-03-01 00:05:12 -05:00
Steve Reinhardt
19dfde2317
Automated merge with ssh://daystrom.m5sim.org//repo/m5
...
--HG--
extra : convert_revision : f4bcd342e7abb86ca83840b723e6ab0b861ecf5b
2008-02-27 18:18:56 -05:00
Korey Sewell
8fb74c238c
Add comments in code to describe bug conditions.
...
This should help if somebody gets to the bug
fix before me (or someone else)...
--HG--
extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2
2008-02-27 17:50:29 -05:00
Korey Sewell
b45cf21a8e
Fix Load/Store Queue squashing after a SMT thread is removed but ensuring
...
you are squashing from the current instruction # causing the thread exit.
--HG--
extra : convert_revision : ccbeece7dd1d5fee43f30ab19370908972113473
2008-02-27 16:53:08 -05:00
Korey Sewell
34715cc691
Fix offset in removeThread() function so that float registers start freeing up
...
from the right point (#32 usually) instead of restarting at 0 and double-freeing.
Commented out assert line in free_list.hh that will check for when double-free condition
goes bad.
--HG--
extra : convert_revision : 08d5f9b6a874736e487d101e85c22aaa67bf59ae
2008-02-27 16:48:33 -05:00
Steve Reinhardt
e6d6adc731
Revamp cache timing access mshr check to make stats sane again.
...
--HG--
extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea
2008-02-26 22:03:28 -08:00
Rick Strong
fcfc8b8c4f
Configs: Make using Simpoints easier with some config files that support them easily
...
--HG--
extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
2008-02-27 00:35:09 -05:00
Gabe Black
43ecce5fda
X86: Put in initial implementation of the local APIC.
...
--HG--
extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
2008-02-26 23:39:53 -05:00
Gabe Black
98d2ca403e
X86: Implement the INVLPG instruction and the TIA microop.
...
--HG--
extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2008-02-26 23:39:22 -05:00
Gabe Black
8b4796a367
TLB: Make a TLB base class and put a virtual demapPage function in it.
...
--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
2008-02-26 23:38:51 -05:00
Gabe Black
7bde0285e5
X86: Get PCI config space to work, and adjust address space prefix numbering scheme.
...
--HG--
extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
2008-02-26 23:38:01 -05:00
Steve Reinhardt
bdf3323915
Cache: better comments particularly regarding writeback situation.
...
--HG--
extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362
2008-02-26 20:17:26 -08:00
Gabe Black
ec1a4cbbc7
Bus: Fix the bus timing to be more realistic.
...
--HG--
extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc
2008-02-26 02:20:08 -05:00
Steve Reinhardt
4597a71cef
Make L2+ caches allocate new block for writeback misses
...
instead of forwarding down the line.
--HG--
extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
2008-02-16 14:58:03 -05:00
Ali Saidi
9faec83ac5
CPU: move the PC Events code to a place where the code won't be executed multiple times if an instruction faults.
...
--HG--
extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68
2008-02-14 16:14:35 -05:00
Ali Saidi
a33a3f7c55
Update copyright dates
...
--HG--
extra : convert_revision : 547e7ddff6b8005a9eaad60970bc51984e84fcd1
2008-02-11 12:35:28 -05:00
Steve Reinhardt
71835d42df
Automated merge with file:/home/stever/hg/m5-orig
...
--HG--
extra : convert_revision : 86a55cd98a9704f756a70aa0cbd2820cf92c821d
2008-02-11 08:31:26 -08:00
Steve Reinhardt
2f7421b12b
EXTRAS now points to src instead of needing 'src' subdir.
...
--HG--
extra : convert_revision : 8e7e4516ace8c7852eeea3c479bfd567839a8061
2008-02-11 08:04:01 -08:00
Nicolas Zea
4c7eb21119
Bus: Only update port cache when there is an item to update it with.
...
--HG--
extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8
2008-02-10 19:41:03 -05:00
Ali Saidi
d167e2bb97
IGbE: Fix a couple of bugs.
...
--HG--
extra : convert_revision : a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca
2008-02-10 19:32:12 -05:00
Steve Reinhardt
9d7a69c582
Fix #include lines for renamed cache files.
...
--HG--
extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5
2008-02-10 14:45:25 -08:00
Steve Reinhardt
d56e77c180
Rename cache files for brevity and consistency with rest of tree.
...
--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62
2008-02-10 14:15:42 -08:00
Stephen Hines
6cc1573923
Make the Event::description() a const function
...
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-06 16:32:40 -05:00
Stephen Hines
0ccf9a2c37
Add base ARM code to M5
...
--HG--
extra : convert_revision : d811bf87d1a0bfc712942ecd3db1b48fc75257af
2008-02-05 23:44:13 -05:00
Steve Reinhardt
b96631e1a0
Cleaned up os.path imports a bit.
...
--HG--
extra : convert_revision : ee75bf9abd249ab053e804739cc50972475cd5b6
2008-02-05 17:43:45 -08:00
Steve Reinhardt
d725ff450d
Make EXTRAS work for SConsopts too.
...
Requires pushing source files down into 'src' subdir relative
to directory listed in EXTRAS.
--HG--
extra : convert_revision : ca04adc3e24c60bd3e7b63ca5770b31333d76729
2008-02-05 17:40:08 -08:00
Gabe Black
ca313e2303
X86: Put an SMBios/DMI table in memory.
...
This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.
--HG--
extra : convert_revision : c1610c0dfa211b7e0d091a04133695d84f500a1c
2008-01-23 15:28:54 -05:00
Gabe Black
423bbe6499
X86: Optomize the bit scanning instruction microassembly a little. More can be done.
...
--HG--
extra : convert_revision : 3cf6e972f0e41e3529a633ecbb31289e1bd17f0f
2008-01-23 08:18:27 -05:00
Gabe Black
60c2d98fc0
X86: Implement and attach the BSR and BSF instructions.
...
--HG--
extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908
2008-01-22 00:10:33 -05:00
Gabe Black
f809637011
X86: Fill out group17 in the decoder.
...
--HG--
extra : convert_revision : 66ab9c0fc3086f66e3d6d82d47964ecf406c3a8a
2008-01-21 16:27:40 -05:00
Gabe Black
657b52fea1
X86: Use the existing boot_osflags instead of duplicating it.
...
--HG--
extra : convert_revision : e04e438d7d261a61c52b946c23cd126ed648814a
2008-01-21 04:32:34 -05:00
Ke Meng
0b6876a0c0
The reason is that the event is supposed to put the instructions ready to execute for next cycle. And the FUCompletion event has a lower priority than CPU tick event. It is called after the iew->tick() for current cycle has already been executed and the issueToExecuteQueue has already advanced this time. And assume the issueToExecuteLatency is 1, to catch up, the increasement should be made at access(-1) instead of access(0). Otherwise I found it could increase the actual op_latency of the instructions to execute by 1 cycle and potentially put the simulated CPU into a permanent idle state.
...
Signed-off by: Ali Saidi <saidi@eecs.umich.edu>
--HG--
extra : convert_revision : dafc16814383e8e8f8320845edf6ab2bcfed1e1d
2008-01-14 11:47:32 -05:00
Gabe Black
c08b7802a9
X86: Redo the bit test instructions.
...
--HG--
extra : convert_revision : 433c2a9f3675ed02f3be5ce759a440f2686d2ccd
2008-01-12 06:41:32 -05:00
Gabe Black
b705eba6e5
X86: Fix the wrmsr instruction.
...
--HG--
extra : convert_revision : 12bc7e71226ebafb8eedadf6a3db82929e15e722
2008-01-12 06:40:55 -05:00
Gabe Black
0ee67d4210
X86: Make the effective segment base shadow the regular one, not the selector.
...
--HG--
extra : convert_revision : 498c7c16d664c784b196885b1f35c3c6386c9cfc
2008-01-12 06:40:10 -05:00
Gabe Black
223e48e6ae
X86: Make the IO ports work using extra physical address lines. Add a serial port.
...
--HG--
extra : convert_revision : a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6
2008-01-12 06:39:15 -05:00
Gabe Black
0e394fdfa4
X86: Fix the general IO instructions dataSize.
...
--HG--
extra : convert_revision : 9774a52cb6a8e7632d1b1dc0706e5791cc18d238
2008-01-12 06:37:35 -05:00
Geoffrey Blake
f9c54d5a4b
Temporary fix for ll/sc bug see flyspray task for more info:
...
http://www.m5sim.org/flyspray/task/197
Signed-off by: Ali Saidi <saidi@eecs.umich.edu>
--HG--
extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81
2008-01-06 00:19:45 -05:00
Steve Reinhardt
6c5a3ab8b2
Add ReadRespWithInvalidate to handle multi-level coherence situation
...
where we defer a response to a read from a far-away cache A, then later
defer a ReadExcl from a cache B on the same bus as us. We'll assert
MemInhibit in both cases, but in the latter case MemInhibit will keep
the invalidation from reaching cache A. This special response tells
cache A that it gets the block to satisfy its read, but must immediately
invalidate it.
--HG--
extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b
2008-01-02 15:22:38 -08:00
Steve Reinhardt
bf9b3821bd
Mark cache-to-cache MSHRs as downstreamPending when necessary.
...
Don't mark upstream MSHR as pending if downstream MSHR is already in service.
--HG--
extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f
2008-01-02 15:18:33 -08:00
Steve Reinhardt
538da9e24d
Don't DPRINTF in the middle of a PrintReq.
...
--HG--
extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb
2008-01-02 14:42:42 -08:00
Steve Reinhardt
87e5fd1755
Bug fix: functional cache port now needs otherPort set.
...
--HG--
extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548
2008-01-02 14:42:24 -08:00
Steve Reinhardt
cde5a79eab
Additional comments and helper functions for PrintReq.
...
--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
2008-01-02 13:46:22 -08:00
Steve Reinhardt
3952e41ab1
Add functional PrintReq command for memory-system debugging.
...
--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7
2008-01-02 12:20:15 -08:00
Steve Reinhardt
659aef3eb8
Fix formatting and comments in cache_impl.hh
...
--HG--
extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41
2008-01-02 12:15:48 -08:00
Gabe Black
2cb7d4f068
SPARC: Fix a bug where the TLB would match against the wrong entries.
...
--HG--
extra : convert_revision : 631b3b6a1416121b54bd9717ca1cdccdd5b8a1eb
2008-01-01 18:20:08 -05:00
Ali Saidi
45ea1549c9
Checkpointing: Fix a bug in the simulation script when restoring without standard switch and change some ifs to work with the default port since every port is now connected to something.
...
--HG--
extra : convert_revision : 72507cf13e58465291b0dce6322e853bee5a2b89
2007-12-18 01:52:57 -05:00
Ali Saidi
71909a50de
CPU: Update where the simple cpus read their cpu id from the thread context to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.
...
--HG--
extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3
2007-12-16 03:48:13 -05:00
Gabe Black
27cc351688
X86: Please excuse my dear Aunt Sally. (precedence bug)
...
--HG--
extra : convert_revision : 9ad4f31e7a962c3177896bcbfb93e2e54720d117
2007-12-03 14:32:56 -08:00
Gabe Black
73caca57a8
X86: Make sure the memory index is calculated using the address size for bit test instructions.
...
--HG--
extra : convert_revision : 9634675857dae53b5e79e49267c864a0265afde1
2007-12-02 01:46:38 -08:00
Gabe Black
b5d4018382
X86: Fix a copy/paste mistake where the bit test instructions were using an immediate where they should use a register.
...
--HG--
extra : convert_revision : b0ee80e4c7fdb58a1eb85b3bcc82a0cdaa93330a
2007-12-02 01:46:29 -08:00
Gabe Black
62ad1d2872
X86: Make the page not present panic more descriptive.
...
--HG--
extra : convert_revision : 9360e47adb61e164ac218f2ea231eaa60bf3229d
2007-12-02 01:46:14 -08:00
Gabe Black
82e705d713
X86: Start setting up the real mode data structure.
...
--HG--
extra : convert_revision : ba6d4939d4d58da5586655c83f1617f47dc7e359
2007-12-02 00:04:31 -08:00
Gabe Black
5de71e39d8
X86: Make the 0xA0-0xA3 versions of mov use the right sized immediates.
...
--HG--
extra : convert_revision : a702403de29772618abb5bd5c5555279d91bdd59
2007-12-02 00:02:51 -08:00
Gabe Black
4c37f828f1
X86: Add in a missing "break".
...
--HG--
extra : convert_revision : 2e48d8b0292bc3b78e4caa27dec20113d40e7d74
2007-12-01 23:11:23 -08:00
Gabe Black
9805916cec
X86: Actually do something for the MiscRegFile clear function.
...
--HG--
extra : convert_revision : 36f8abaa9d09700d8ba9e09b4a10fa4dce580f36
2007-12-01 23:10:42 -08:00
Gabe Black
42ae409746
X86: Move startup code to the system object to initialize a Linux system.
...
--HG--
extra : convert_revision : a4796c79f41aa8b8f38bf2f628bee8f1b3af64be
2007-12-01 23:09:56 -08:00
Gabe Black
e7fc5c42f3
X86: Add a missing microcode file to the sconscript.
...
--HG--
extra : convert_revision : 6da8a67e07bada169abf7f10aded8a90d4e63eae
2007-12-01 23:07:41 -08:00
Gabe Black
67fee01026
X86: Fix a copy paste error in the bts microcode.
...
--HG--
extra : convert_revision : c4ac007d35ac13211f9816f1104c84f2b447ddba
2007-12-01 23:06:52 -08:00
Gabe Black
988c6f227a
X86: Implement mov from control register.
...
--HG--
extra : convert_revision : c8280f0686a3ae6d5c405327540ad15a3a5531f9
2007-12-01 23:06:03 -08:00
Gabe Black
fe833dd2c3
X86: First crack at far returns. This is grossly approximate.
...
--HG--
extra : convert_revision : 23da0338af1f7663ae5ddf2289fb45dd32f37c42
2007-12-01 23:05:01 -08:00
Gabe Black
dc6f960171
X86: Reorganize segmentation and implement segment selector movs.
...
--HG--
extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
2007-12-01 23:03:39 -08:00
Gabe Black
a548067b01
X86: Make the "fault" microop predicated.
...
--HG--
extra : convert_revision : ded34133afcd6af1f55b8991b82bad45258069d3
2007-12-01 23:01:56 -08:00
Gabe Black
557bc80647
X86: Implement the LIDT instruction.
...
--HG--
extra : convert_revision : 380515e985318311632e00b13000585afb052e3b
2007-12-01 23:01:31 -08:00
Gabe Black
62c79ca637
X86: Implement the lgdt instruction.
...
--HG--
extra : convert_revision : d1698a82df3c57cc9bbf8d5d190f271bfc7cb2e4
2007-12-01 23:01:17 -08:00
Gabe Black
4e3ff42762
X86: Implement wrbase and wrlimit for loading pseudo descriptors.
...
--HG--
extra : convert_revision : fe03c4aed95ef12773e80cdb3d9cff68a2b20f02
2007-12-01 23:00:58 -08:00
Gabe Black
bfc62d1a70
X86: Separate the effective seg base and the "hidden" seg base.
...
--HG--
extra : convert_revision : 5fcb8d94dbab7a7d6fe797277a5856903c885ad4
2007-12-01 23:00:15 -08:00
Gabe Black
7433032b39
SPARC: Fixes for invalidateAll and demapAll in the SPARC TLBs.
...
--HG--
extra : convert_revision : 8de6c60b0e3e725eac11047a9d9888097dd359ff
2007-11-30 16:49:27 -08:00
Gabe Black
38e804f7cd
SPARC: Fix 32 bit register window flushing endian conversion.
...
--HG--
extra : convert_revision : be91d6fecb44a85e983343704a098b456948af8a
2007-11-29 20:20:18 -08:00
Gabe Black
fa5e3b47c8
SPARC: Fix the initial stack to match what the Linux kernel does.
...
--HG--
extra : convert_revision : a4451710d8463e52227fd8f760ab737ea8f404b5
2007-11-29 00:00:26 -08:00
Gabe Black
16e99e4677
SPARC: Combine the 64 and 32 bit process initialization code.
...
Alignment is done as it was for 32 bit processes.
--HG--
extra : convert_revision : 9368ad40dcc7911f8fc7ec1468c6a28aa92d196f
2007-11-29 00:00:02 -08:00
Ali Saidi
a84d9716d6
merge, no manual changes
...
--HG--
extra : convert_revision : 6d6b744bbdfb09e7c3092368870a4f372241f9e8
2007-11-29 00:23:14 -05:00
Rick Strong
376c7285ee
Serialization: Fix serialization of file descriptors. Make sure open
...
file descriptors are reopened and the file pointer is in the same
place as when the checkpoint occured.
Signed-off by: Ali Saidi
--HG--
extra : convert_revision : d9d2cd388c9c02f60e1269d6845891c35f94fc47
2007-11-29 00:22:46 -05:00
Gabe Black
8a020d40d3
Make ports that aren't connected to anything fail more gracefully.
...
--HG--
extra : convert_revision : 3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc
2007-11-28 14:39:19 -08:00
Gabe Black
ab598eadbf
imported patch pagewalker.patch
...
--HG--
extra : convert_revision : 8ddde313f2249e1346fa51372a156f0d2ddc3b8f
2007-11-21 00:04:15 -08:00
Gabe Black
ce26c3ccec
Get rid of a file that should have never been committed.
...
--HG--
extra : convert_revision : c0e678ce0ce0301bb3afff8bef4fcab7aef3c6fe
2007-11-20 22:51:03 -08:00
Gabe Black
e35c4f2f08
Merge with head.
...
--HG--
extra : convert_revision : c4215e516c6d82ad466db898ffeefa0233ca110e
2007-11-20 15:38:54 -08:00
Gabe Black
a12d5975cc
Simple CPU fix simple mistake in translateDataWriteAddr.
...
--HG--
extra : convert_revision : 6a6a7d05f62d9d9868be0707e4dc186a5f7ecf7d
2007-11-20 15:37:56 -08:00
Ali Saidi
ac50694d1a
Serialization: Serialize SPARC PTEs last so their nameOut() calls don't interfere with other serialization in the TLB.
...
--HG--
extra : convert_revision : 8a8478a200cd3c65b2ac98944d1278454811d38f
2007-11-19 22:47:08 -05:00
Ali Saidi
8026ecbb8e
Memory: Cache the physical memory start and size so we don't need a dynamic cast on every access.
...
--HG--
extra : convert_revision : d6c3e93718991e7b68248242c80d8e6ac637ac51
2007-11-19 18:23:43 -05:00
Steve Reinhardt
785eb13190
Make EXTRAS work for relative directories.
...
Also print a little feedback when processing EXTRAS.
--HG--
extra : convert_revision : 9cb324b0d5bc60a3c98af6495f16415b529e4af2
2007-11-16 20:10:33 -08:00
Steve Reinhardt
7d83cf35e1
Tweak check for writable block fill.
...
--HG--
extra : convert_revision : c04281bcfc4cd23c7613aeccb21dc74452bcc951
2007-11-16 20:10:33 -08:00
Steve Reinhardt
f03a62008a
Fix bug on exclusive response to ReadReq with pending WriteReq.
...
--HG--
extra : convert_revision : 5429cd7ca84cf6348813a4607fa16f76aa5df7e0
2007-11-16 20:10:32 -08:00
Korey Sewell
5d23f86e98
add back in clobbered MIPS fix for g++ 4.2
...
--HG--
extra : convert_revision : 80ad1cc32c6e59925526abd274132e4f9e35f0c1
2007-11-17 00:02:56 -05:00
Korey Sewell
f2fea63c65
go back and fix up MIPS copyright headers
...
--HG--
extra : convert_revision : 886e762e13b7a05d6d8a14bde6c2a3567c32a4d1
2007-11-16 21:32:22 -05:00
Korey Sewell
52e6aa6284
move initCPU, processInterrupts declaration to core_specific file.
...
--HG--
extra : convert_revision : 9bc88380f05f86c68117280f555c77eb4c627d7b
2007-11-16 21:31:37 -05:00
Korey Sewell
92724490c9
Gabe's 32-bit X86 fix merge
...
--HG--
extra : convert_revision : 6f79c5c785c93d6caef2ec26961b652cd51e30fe
2007-11-16 19:16:01 -05:00
Gabe Black
7ffd88a54b
X86: Fix 32 bit compilation.
...
--HG--
extra : convert_revision : d16d68731a8480080ec6b8da3ebda8567e115a30
2007-11-16 14:18:47 -08:00
Korey Sewell
923c385b97
remove unnecessary namespace
...
--HG--
extra : convert_revision : 8936fe2246ca659a6dfe0835f66aa8232ed427de
2007-11-15 20:52:59 -05:00
Korey Sewell
d09ab2bd22
add thread id to misc. reg functions
...
--HG--
extra : convert_revision : 35d073d1279947d943a0290832e09a5268dd0b76
2007-11-15 20:35:49 -05:00
Korey Sewell
7c076479e4
add MicroPC functions back to thread context
...
--HG--
extra : convert_revision : a9cfd2829c4aec191f5f9ec6ce7b5d1dccc92af1
2007-11-15 20:35:31 -05:00
Korey Sewell
cf9dc4b151
add microPC stuff back in. got deleted on changeset propragation somehow.
...
--HG--
extra : convert_revision : 5e89484b2ef21457ffba35ef959df999a28c5676
2007-11-15 19:48:53 -05:00
Korey Sewell
8f8e7fe08e
put the flattenIndex stuff back in O3 AND put fatal() back in faults
...
--HG--
extra : convert_revision : 16fb8d7f3fbc5f8f1fc3ed34427c3d90a3125ad0
2007-11-15 16:38:09 -05:00
Korey Sewell
3110b157e6
fix MIPS headers
...
--HG--
extra : convert_revision : 2870a146a1be0e8c80878090f39c0eaa15d2eb13
2007-11-15 14:21:01 -05:00
Korey Sewell
641ee83e40
add core specific parameter to BaseCPU params
...
--HG--
extra : convert_revision : 15c5995e3acf23a45c712891fd06ef273584f7e8
2007-11-15 14:18:56 -05:00
Korey Sewell
7ba65aecaa
Add CoreSpecific type to all archs
...
--HG--
extra : convert_revision : 659786bf6489ab6151e47fbf1f4c0a723262fce2
2007-11-15 14:17:21 -05:00
Korey Sewell
789153dff6
Get MIPS simple regression working. Take out unecessary functions "setShadowSet", "CacheOp"
...
--HG--
extra : convert_revision : a9ae8a7e62c27c2db16fd3cfa7a7f0bf5f0bf8ea
2007-11-15 03:10:41 -05:00
Korey Sewell
375ddf8d25
branch merge
...
--HG--
extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
2007-11-15 00:14:20 -05:00
Ali Saidi
7c8e4ca3a3
Checkpointing: Name SE page table entries better so that there isn't a problem if multiple workloads are being run at once.
...
--HG--
extra : convert_revision : 3bac9bd7fd93fcadf764e2991c5b029f2c745c08
2007-11-14 23:42:08 -05:00
Korey Sewell
2820a448e2
comment and spacing
...
--HG--
extra : convert_revision : b3acde37bc11919700c257eae58ea9e0f66c9786
2007-11-14 15:33:43 -05:00
Korey Sewell
5f7879a935
Get MIPS_SE actually working again by actually by fixing TLB stuff and running hello world
...
--HG--
extra : convert_revision : 0944e7661934baddca1f1a895af0b75be2d96b10
2007-11-14 06:24:47 -05:00
Korey Sewell
bfdd2f379b
remove unnecessary debug messages I added
...
--HG--
extra : convert_revision : 5c23218fd1b899fa7fe42701f7cb2f6033f7a583
2007-11-14 06:18:58 -05:00
Korey Sewell
2692590049
Add in files from merge-bare-iron, get them compiling in FS and SE mode
...
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-11-13 16:58:16 -05:00
Gabe Black
5772e3cada
X86: Make microcode use presegmentation RIPs and the rest of m5 use post segmentation RIPS.
...
--HG--
extra : convert_revision : d8cda7c8b9a2afb8a9d601b6d61529a96c5f87fe
2007-11-13 01:31:43 -08:00
Gabe Black
1048b548fa
X86: Separate out the page table walker into it's own cc and hh.
...
--HG--
extra : convert_revision : cbc3af01ca3dc911a59224a574007c5c0bcf6042
2007-11-12 18:06:57 -08:00
Gabe Black
6095dceb0c
Params: Fix check for cycles in the configuration and clarify the comments/error message.
...
--HG--
extra : convert_revision : 8f35dde408fae874bcba1a248d32a22222d98c35
2007-11-12 18:06:02 -08:00
Gabe Black
917ae9ec66
X86: Fix a stupid typo where WRMSR and RDMSR were switched, and add a debug statement.
...
--HG--
extra : convert_revision : f1eb17291f4c01f3c0fa8f99650bc1edf09d21de
2007-11-12 14:39:14 -08:00
Gabe Black
4950798268
X86: Implement tlb invalidation and make it happen some of the times it should.
...
--HG--
extra : convert_revision : 376516d33cd539fa526c834ef2b2c33069af3040
2007-11-12 14:39:07 -08:00
Gabe Black
f1f5dd79bf
X86: Implement the wrcr microop which writes a control register, and some control register work.
...
--HG--
extra : convert_revision : 3e9daef9cdd0665c033420e5b4f981649e9908ab
2007-11-12 14:38:59 -08:00
Gabe Black
4d4d2883f9
X86: Implement some bit testing instructions.
...
--HG--
extra : convert_revision : 54585e276e44322be9c56af0b2eabfe8d4b3e430
2007-11-12 14:38:53 -08:00
Gabe Black
f9ddb894dd
X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0.
...
--HG--
extra : convert_revision : 08bd7b4ff183038c016612d04ac73b20a255d141
2007-11-12 14:38:45 -08:00
Gabe Black
6d4ba8de34
X86: Flesh out the opcode groups for two byte opcodes.
...
--HG--
extra : convert_revision : 4d51befd6dae4035c0eb685d33e1f5e38467c766
2007-11-12 14:38:38 -08:00
Gabe Black
fce45baf17
X86: Work on the page table walker, TLB, and related faults.
...
--HG--
extra : convert_revision : 9edde958b7e571c07072785f18f9109f73b8059f
2007-11-12 14:38:31 -08:00
Gabe Black
f17f3d20be
X86: Implement a page table walker.
...
--HG--
extra : convert_revision : 36bab5750100318faa9ba7178dc2e38590053aec
2007-11-12 14:38:24 -08:00
Gabe Black
7a39457d7f
X86: Make the micropc available through the thread context objects.
...
This is necssary for fault handlers that branch to non-zero micro PCs.
--HG--
extra : convert_revision : c1cb4863d779a9f4a508d0b450e64fb7a985f264
2007-11-12 14:38:17 -08:00
Gabe Black
53cb6cbcc1
X86: Implement the startupCPU function.
...
--HG--
extra : convert_revision : d2331a0e0bd14863e82004508558f657c5b900a2
2007-11-12 14:38:10 -08:00
Gabe Black
d89d80a5d0
X86: Make some of the bits of CR0 do what they're supposed to.
...
--HG--
extra : convert_revision : 13e79ef1ef09bd842d5e075e31f98ab2a4357901
2007-11-12 14:38:02 -08:00
Gabe Black
aaa30714b3
X86: Various fixes to indexing segmentation related registers
...
--HG--
extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
2007-11-12 14:37:54 -08:00
Gabe Black
ada071db53
SPARC: Force %g1 to be zero on process startup even though it normally already should be.
...
--HG--
extra : convert_revision : 9feb63109e8c955b49c7e96acad1ad7c29a4349f
2007-11-11 17:23:22 -08:00
Gabe Black
6cfe4176f5
Alpha: Fix a long standing bug where all code ran as PAL code in FS.
...
--HG--
extra : convert_revision : 654a2376a601ddf91665ca627403518911b32532
2007-11-08 23:50:10 -08:00
Gabe Black
7c0076d5f3
Make non Apple compilation work again. Ali may have to refix this.
...
--HG--
extra : convert_revision : 0f9455643eec14034314908ee26a6d693c54a864
2007-11-08 23:42:44 -08:00
Gabe Black
46505821ec
ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs.
...
--HG--
extra : convert_revision : 8c35891945c6b4ebc320f0c88a7a0449f3c4b4d5
2007-11-08 18:51:50 -08:00
Ali Saidi
0673029689
Compiling: Fix for 64bit compile on Darwin/OSX 10.5.
...
--HG--
extra : convert_revision : 1f23f7a3952f55cca8293fb43ae15db42005aeac
2007-11-08 16:11:09 -05:00
Ali Saidi
422ab8bec0
TimingSimpleCPU: Add some DPRINTFs when the cpu suspends and resumes.
...
--HG--
extra : convert_revision : a305cf9dcaca5ed3b97499a5e24c511f4416125a
2007-11-08 10:46:41 -05:00
Ali Saidi
cf1c25dbcc
AtomicSimpleCPU: Refactor resume() code to have a cleaner control path.
...
--HG--
extra : convert_revision : f27bb96850e7fb0252fb1f47c3d0860705c32884
2007-11-08 10:46:41 -05:00
Ali Saidi
f4222610ea
Python: Allow a range to be a python tuple/list.
...
--HG--
extra : convert_revision : 81cf805055e2f4d62e56a02ac82a0b230251f40b
2007-11-08 10:46:41 -05:00
Ali Saidi
11b931df6a
Interrupts: Inline some code and remove duplication.
...
--HG--
extra : convert_revision : 0631c601f281bdd2a12ff0d0ae94576780115c2a
2007-11-08 10:46:41 -05:00
Ali Saidi
e41197a3f8
CPU: Add function to explictly compare thread contexts after copying.
...
--HG--
extra : convert_revision : 9b7af59a11202a91409aad7c427b7749cd1d2f12
2007-11-08 10:46:41 -05:00
Gabe Black
17e83e7f83
SPARC: Make 64 bit SPARC process initialization check checkpointRestored too.
...
--HG--
extra : convert_revision : 8d48f705983f31db5947c6c4ae9f0df57f413d68
2007-11-07 15:03:49 -08:00
Gabe Black
19292d3f06
O3: Remove unneeded variable.
...
--HG--
extra : convert_revision : 4624ccd3f08818f4632881d6aca6d1cc343bbdcf
2007-11-06 12:51:08 -08:00
Ali Saidi
d1fb5ad91e
TraceFlags: Fix off-by-one error with number of traceflags.
...
--HG--
extra : convert_revision : 668299fc0a9083be858fe2f6e8fde512ddac9e32
2007-11-04 19:06:45 -05:00
Ali Saidi
c8123cef1b
Cache: Fix for OS X 10.5 compiling.
...
--HG--
extra : convert_revision : ba3c33ed524367280eefc096177d767168ac2cf6
2007-11-04 18:57:36 -05:00
Ali Saidi
710f3ca3e1
SE: fix stat64 syscall on os x
...
--HG--
extra : convert_revision : 40b62ef73d8e408cdd35b22147860f33533db57f
2007-11-02 02:11:15 -04:00
Ali Saidi
333ac6cc32
DRAM: Make latency parameters be Param.Latency instead of ints.
...
--HG--
extra : convert_revision : 553b86cc4653da089d7aa0045a3f3bdcabf6c4d8
2007-11-01 17:30:50 -04:00
Steve Reinhardt
4b49bd47f4
String constant const-ness changes to placate g++ 4.2.
...
Also some bug fixes in MIPS ISA uncovered by g++ warnings
(Python string compares don't work in C++!).
--HG--
extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
2007-10-31 18:04:22 -07:00
Ali Saidi
71b033f4dc
no manual changes
...
--HG--
extra : convert_revision : bfc34f3adaabcc8011bf9b22bd614ee8ebcbfd01
2007-10-31 17:53:13 -04:00
Ali Saidi
980266b0a6
Traceflags: Old traceflags.py file is no longer needed.
...
--HG--
extra : convert_revision : 1e88c2d9a0e2a64344d8b4d1a4474dae82473a6d
2007-10-31 17:52:56 -04:00
Steve Reinhardt
90f42bf3ad
Merge in bus DPRINTF changes.
...
--HG--
extra : convert_revision : 3bbd7c0745b31bb2a628b604ab1627cd9c61643c
2007-10-31 00:39:16 -07:00
Ali Saidi
538fae951b
Traceflags: Add SCons function to created a traceflag instead of having one file with them all.
...
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-31 01:21:54 -04:00
Ali Saidi
8ce31ea471
Linux Support: Finally update vptr for new memory system.
...
--HG--
extra : convert_revision : 8b4927431189abc12201d13428a31b746cdb7dee
2007-10-31 01:21:54 -04:00
Ali Saidi
7597f87430
Base: Rework the way M5 provides and creates random numbers.
...
--HG--
extra : convert_revision : 10ec3484647b3acb8e821f8520f97d535e41e861
2007-10-31 01:21:54 -04:00
Vilas Sridharan
04d1cfe31c
Add constant stat.
...
Signed Off: Ali Saidi <saidi@eecs.umich.edu>
--HG--
extra : convert_revision : 3da9e507117d0279e212d151d78c312fd9cf0b5c
2007-10-30 22:21:05 -04:00
Gabe Black
503fb8ebed
X86: Compile fixes for 32 bit/debug/opt.
...
--HG--
extra : convert_revision : 591fffb316830fca5792666c8df12abd4e7c551b
2007-10-30 16:34:00 -04:00
Gabe Black
fddfa71658
TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system.
...
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
2007-10-25 19:04:44 -07:00
Ali Saidi
0711f4f17a
SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore.
...
--HG--
extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
2007-10-25 20:13:35 -04:00
Gabe Black
b0e3aab5df
X86: Fix X86_FS compilation.
...
--HG--
extra : convert_revision : 5f014337e33a9e1ebe4df4063335315539fff69e
2007-10-23 17:40:40 -07:00
Gabe Black
7d396b1bf6
X86: Use the cda microop where appropriate. The ENTER instruction still needs these.
...
--HG--
extra : convert_revision : c5a1a6d66c454f252d3b798c38a6798e7dd486f0
2007-10-22 14:39:40 -07:00
Gabe Black
421aea980f
X86: Implement the cda microop which checks if an address is legal to write to.
...
--HG--
extra : convert_revision : afe20649180dd59ad0702b98f7293be6c9226359
2007-10-22 14:30:56 -07:00
Gabe Black
93da9eb7f6
CPU: Add functions to the "ExecContext"s that translate a given address.
...
--HG--
extra : convert_revision : 7d898c6b6b13094fd05326eaa0b095a3ab132397
2007-10-22 14:30:45 -07:00
Gabe Black
43cb78004b
X86: Start using the stupd microop, and update statistics accordingly.
...
--HG--
extra : convert_revision : 4aa9daa4e19acfb3e6840ce5d83cf199e30c2f19
2007-10-21 18:45:46 -07:00
Gabe Black
4d15e4cf7b
X86: Implement the stupd microop ("store with update", not "stupid") and use it in ENTER.
...
--HG--
extra : convert_revision : 9151f701162d31ef26298497467c42b7b0ed85d5
2007-10-21 18:44:50 -07:00
Gabe Black
d8494325f0
X86: Implement the PUSHF, POPF, SAHF, and LAHF instructions.
...
--HG--
extra : convert_revision : 37c63b1133022fa3432888592f8c84785fb95091
2007-10-19 15:21:16 -07:00
Gabe Black
35a8bc56cd
X86: Impelement the HLT instruction and fix the "halt" microop.
...
--HG--
extra : convert_revision : 932e5bb5bf3644f8468dba92177fb87cc54b891a
2007-10-19 15:11:15 -07:00
Gabe Black
f69a463b4b
X86: Implement a "halt" microop.
...
--HG--
extra : convert_revision : 53a846a157e4dce42343b81901df1207738f62cd
2007-10-19 15:10:23 -07:00
Gabe Black
7f37322532
X86: Implement the ENTER instruction. This could probably be optimized by cleaning up the indexing in the main loop.
...
--HG--
extra : convert_revision : ad2d560f2a6f36176b22b8510c58cd6fe5a2c9c2
2007-10-19 15:09:37 -07:00
Gabe Black
63f4281d9d
Merge with head.
...
--HG--
extra : convert_revision : 7a1c612e7f64fc6b35749547d744e919e034e66f
2007-10-18 22:44:33 -07:00
Gabe Black
9243666c39
X86: Replace "group10" placeholder with the corresponding instructions in the decoder.
...
--HG--
extra : convert_revision : ffa8f7c4f8d1e381eefd29247ebd705863d385ad
2007-10-18 22:43:32 -07:00
Gabe Black
5c32422162
X86: Implement the string IO instructions, ins and outs.
...
--HG--
extra : convert_revision : b021e70390d289b22a8e693cd8a99d6e7bd7d2b4
2007-10-18 22:42:53 -07:00
Gabe Black
f0dce3bfce
X86: Implement the undocumented SALC instruction which sets AL to 0xFF if CF=1 and 0x00 otherwise.
...
--HG--
extra : convert_revision : 845d43c544e296d7595f54054906055a9f21ad9f
2007-10-18 22:42:17 -07:00
Gabe Black
46bd1c99a9
X86: Implement the XLAT instruction.
...
--HG--
extra : convert_revision : 22d7d9e79e722293b4dc1e66d8610301dc04c5fa
2007-10-18 22:41:18 -07:00
Gabe Black
c526b00b35
X86: Implement the BOUND instruction.
...
--HG--
extra : convert_revision : 7bcfa5b4a47d342bee267cc593a1bd4b4f31abe0
2007-10-18 22:40:48 -07:00
Gabe Black
33dbd8a766
X86: Make the "fault" microop predicated.
...
--HG--
extra : convert_revision : 48dae1f3c680636833c137fe6b95b37ae84e188c
2007-10-18 22:40:18 -07:00
Gabe Black
70542c8e61
X86: Make "Inst" the default format instead of WarnUnimpl for one byte opcodes.
...
--HG--
extra : convert_revision : 591e67fc21f5b72977c5876e39f488494fda77c2
2007-10-18 22:39:39 -07:00
Gabe Black
dc2e887f23
X86: Implement the in/out instructions. These will still need support from the TLB and memory system.
...
--HG--
extra : convert_revision : a9503248ea9efca7e5247e4f2830967f428b8215
2007-10-18 22:39:00 -07:00
Gabe Black
2bbc058c6c
X86: Implement the LOOP instructions.
...
--HG--
extra : convert_revision : 3ccd0565c83b6d9c9b63f9f7ac2b67839a2c714f
2007-10-18 22:38:17 -07:00
Gabe Black
418b30602b
X86: Attach the CMC instruction to the decoder.
...
--HG--
extra : convert_revision : 909661062017c7640c343e80431eaf365e8fcf53
2007-10-18 22:37:44 -07:00
Gabe Black
674b6436b0
X86: Implemented the jrcx instruction.
...
--HG--
extra : convert_revision : d738015ff33449e55d8f1624c8467c1bba193e16
2007-10-18 22:37:08 -07:00
Gabe Black
0ffb317ff9
X86: Make wrip sign extend its second operand.
...
--HG--
extra : convert_revision : 2531af8b442ea5aaefccd7a7999c7720489edc36
2007-10-18 22:36:36 -07:00
Ali Saidi
8351660273
CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.
...
--HG--
extra : convert_revision : 6d025764682181b1f67df3b1d8d1d59099136df7
2007-10-18 13:15:08 -04:00
Gabe Black
54466a31c3
Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack.
...
--HG--
extra : convert_revision : af40a7acf424c4c4f62d0d76db1001a714ae0474
2007-10-16 18:04:01 -07:00
Gabe Black
9660a0a552
Merge with head
...
--HG--
extra : convert_revision : 490f9909469751a6cdaf6669e4cd4589ce3a4093
2007-10-12 20:10:57 -07:00
Gabe Black
ac27bc7878
Loader: Identify sections based on virtual addresses, and set the LoadAddrMask correctly for x86.
...
--HG--
extra : convert_revision : efa6cf42f7e69074c645dfcac335a3edf0941389
2007-10-12 20:10:10 -07:00
Gabe Black
0d6383b69e
X86: Added some new versions of MOV and a new argument type tag.
...
--HG--
extra : convert_revision : e21b2062d68baa983c7c631b3e1fe3149de56427
2007-10-12 20:08:12 -07:00
Gabe Black
d82d3bbda5
X86: Implemented LODS.
...
--HG--
extra : convert_revision : 4bd8f15bbc25f5dce16ea0504ad6dd21805fa56a
2007-10-12 20:07:28 -07:00
Gabe Black
9498e536c0
X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.
...
There are no priviledge checks, so these instructions will all work in all
modes.
--HG--
extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
2007-10-12 16:37:55 -07:00
Gabe Black
a76f734d0b
X86: Get rid of BasicOperate format which wasn't used and referred to SparcStaticInst
...
--HG--
extra : convert_revision : 5d2eac9a4b3f0fe5e3c3554d91acf8fee368c9dc
2007-10-09 17:21:04 -07:00
Gabe Black
8ecea59092
X86: Get rid of stray Sparc DPRINTF
...
--HG--
extra : convert_revision : d98b2d95448cab4e689d01ceedaa6ad46f9ffc09
2007-10-09 17:20:23 -07:00
Gabe Black
f6e5b92d63
ELF Loader: Use physical addresses instead of virtual ones.
...
This works in SE mode because the virtual and physical addresses specified for
segments are the same. In Alpha, the LoadAddrMask is still necessary because
the virtual and physical addresses are the same and apparently rely on the
super page mechanism. All of the regressions pass.
--HG--
extra : convert_revision : 45e49dec5002d64e541bc466c61a0f304af29ea5
2007-10-09 13:12:04 -07:00
Gabe Black
8858b0b667
X86: Make x86 initialize more state.
...
--HG--
extra : convert_revision : a55866efd339ae795da4072c070918bf419b07fa
2007-10-07 18:20:51 -07:00
Gabe Black
a19c212757
X86: Work on the x86 tlb.
...
--HG--
extra : convert_revision : a08a5cb049a6030ba9fd56a89383d56026238dbf
2007-10-07 18:18:39 -07:00
Gabe Black
cd36c69a4d
X86: Make faults maintain an error code which gets pushed on the stack.
...
--HG--
extra : convert_revision : 7576f8cfaec9ddfb65e6ba7a6f64a5f453a42069
2007-10-07 18:17:52 -07:00
Gabe Black
efbff349a9
X86: Significantly filled out misc regs.
...
--HG--
extra : convert_revision : 4c53be6568134d65e57f5411df986fd9a89e82c9
2007-10-07 18:16:00 -07:00
Gabe Black
999328f5ad
X86: Make sure there are fewer spurious differences between instructions for caching purposes.
...
--HG--
extra : convert_revision : 7e6be1c42f28f92d9e8b47169e683827bb3f4aaf
2007-10-07 18:14:48 -07:00
Gabe Black
d53552355b
BitUnion: Fix some types in the bitunion classes.
...
--HG--
extra : convert_revision : 1c003f9fc9ef3a57c9199d692d172e747581f383
2007-10-07 18:12:10 -07:00
Gabe Black
63a6d7376b
X86: Make initCPU and startupCPU do something basic.
...
--HG--
extra : convert_revision : 1a04f4402f4f31e4e5cd482c7983d853fe117df5
2007-10-07 18:10:42 -07:00
Gabe Black
304e4c932a
X86: Make the Interrupts class complain less.
...
--HG--
extra : convert_revision : 81d9544e85c90139704ffe4a117983df4bfa3bcd
2007-10-07 18:08:17 -07:00
Gabe Black
847a18ad48
X86: Adjust the config scripts for x86 fs.
...
--HG--
extra : convert_revision : 36ed22b50066f54be0e51c3419babc07dd218e10
2007-10-07 17:52:36 -07:00
Gabe Black
e540c37282
X86: Make an x86 system object.
...
--HG--
extra : convert_revision : 590a4c29cb9b943a2d8c3a97c5fdfbabb658ac45
2007-10-07 17:48:36 -07:00
Gabe Black
8fe672551e
X86: Make an x86 platform object.
...
--HG--
extra : convert_revision : 7d64d3e78960f3bb937579f5d10937bed5f197be
2007-10-07 17:48:06 -07:00
Gabe Black
22196f8885
X86: X86 FS compile fix.
...
--HG--
extra : convert_revision : bedd4cbab570d4ae84af9e8ead8f61db5c3c01dc
2007-10-07 17:46:56 -07:00
Gabe Black
bd5a88ba43
Merge with head.
...
--HG--
extra : convert_revision : aa1969b60044f8ed88e689bdd25eeded2b1105ec
2007-10-04 12:35:35 -07:00
Gabe Black
e1516aefbb
X86: Fix the PageShift constant in isa_traits.hh (I thought I alread did this?)
...
--HG--
extra : convert_revision : bdc51a66e4fdf4b0a51b5c774ca7372a00a57269
2007-10-04 12:34:29 -07:00
Gabe Black
2848ef6696
SPARC: Make software trap 3 flush the register windows like the ABI specifies.
...
--HG--
extra : convert_revision : 8ff43617b56dcca5783d6cc490f87140fc20a36d
2007-10-04 12:24:16 -07:00
Gabe Black
50e2d20cb8
Merge with head.
...
--HG--
extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
2007-10-02 23:03:38 -07:00
Gabe Black
c2d60abf52
X86: Distinguish between the rep and repe prefixes.
...
STOS and MOVS only accept the rep prefix which always loops until rcx becomes
0. The other string instructions accept repe (same encoding as rep) and repne
which also check the condition code flags each iteration.
--HG--
extra : convert_revision : 544149f640302070810fb53e53bfeb0e87160ffc
2007-10-02 23:02:18 -07:00
Gabe Black
504f90f763
X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging.
...
--HG--
extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
2007-10-02 23:00:37 -07:00
Gabe Black
f4a932a6b3
X86: Fix places where movfp was used incorrectly.
...
--HG--
extra : convert_revision : a6b5688eaa53d2f6675df1be193726641e558d37
2007-10-02 22:58:48 -07:00
Gabe Black
06d2d54b57
X86: Fix the movfp microop.
...
--HG--
extra : convert_revision : 23829782a2802a97a05e4dfdb5dd38fbe4165a90
2007-10-02 22:58:04 -07:00
Gabe Black
3e644b48bb
X86: Fix x87 floating point stack register indexing.
...
--HG--
extra : convert_revision : b515ec20cbfc50b38aa7da6cf4d465acf9054c08
2007-10-02 22:57:33 -07:00
Gabe Black
a56c651980
Predecoder: Clear out predecoder state on an ITLB fault.
...
--HG--
extra : convert_revision : 68f8ff778dbd28ade5070edf5a7d662e7bf0045a
2007-10-02 22:21:38 -07:00
Gabe Black
4049c9f76a
X86: Put ldst into the microcode (the earlier changeset didn't really).
...
Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.
--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be
2007-10-02 22:19:53 -07:00
Gabe Black
7c521db9de
X86: Implement the ldst microop and put it in existing microcode where appropriate.
...
--HG--
extra : convert_revision : f08bd725d07a501bb7a0ce91590b5d37db99c6f3
2007-10-02 22:08:09 -07:00
Gabe Black
683d6d46f6
X86: Fix up the microcode for the FST and FSTP instructions.
...
--HG--
extra : convert_revision : ad68633e9b7eab425593acb20cf242bf98c2b642
2007-10-02 22:06:59 -07:00
Gabe Black
b831f7409b
X86: Get rid of a hack for ruflag which is no longer necessary.
...
--HG--
extra : convert_revision : 1bb60c9ddb483aead2af0201bbda938cc6d3f7cb
2007-10-02 22:05:50 -07:00
Gabe Black
efb309525a
X86: Allow logic instructions to set ECF as well as CF.
...
--HG--
extra : convert_revision : 6ac20f069c86c23a8d443a7127afd6015166c00d
2007-10-02 22:05:10 -07:00
Gabe Black
65c247f21f
X86: Add classes for the actual x86 faults.
...
--HG--
extra : convert_revision : bc060a01b5415551b335ca68ccbf126333ae20b0
2007-10-02 22:04:20 -07:00
Gabe Black
7d78f1b41c
X86: Hook in another version of the XCHG instruction.
...
--HG--
extra : convert_revision : 7b6f9cd2f59443622f6963dfee454175322c0ef5
2007-10-02 22:03:38 -07:00
Gabe Black
66a08f7ba4
X86: Implement MOVS
...
--HG--
extra : convert_revision : 29147e1b86f7c54ce9b5ff68001725802c665fc0
2007-10-02 22:02:58 -07:00
Gabe Black
fea7165b55
X86: Implement STOS.
...
--HG--
extra : convert_revision : 95f3bf185f07fe644d6ab96bbb6e598e406b92f4
2007-10-02 22:02:30 -07:00
Gabe Black
7571e8346d
CPU: Make the cpuid parameter get set in SE mode as well.
...
--HG--
extra : convert_revision : bc47206acb683ebaaa31f57af79b4b8db64e4d31
2007-10-02 18:33:57 -07:00
Gabe Black
8ca7feb726
Remote GDB: Turn on remote gdb in SE mode.
...
--HG--
extra : convert_revision : e17eb629071edd0dbcb09dd6a6a2220d2c83d33f
2007-10-02 18:26:27 -07:00
Gabe Black
988cdb49f2
CPU: Make the cpus check the pc event queues in SE mode.
...
--HG--
extra : convert_revision : 9dc4ea136c3c3f87a73d55e91bc4aae4eba70464
2007-10-02 18:25:37 -07:00
Gabe Black
48041fdc53
SPARC,Remote GDB: Flesh out the acc function for SE mode.
...
--HG--
extra : convert_revision : eada066ab64701b5c53e7351dfffbdc0e0d4f344
2007-10-02 18:25:10 -07:00
Gabe Black
1c83418b14
SPARC,Remote GDB: Fix an accounting bug in the remote gdb stuff.
...
--HG--
extra : convert_revision : f6f0986211c442ac94da315e344a8f54d4d58c8a
2007-10-02 18:24:24 -07:00
Gabe Black
5db7125317
Remote GDB: Get rid of an unwanted delete in SE.
...
--HG--
extra : convert_revision : 7531ba87893a8ebff3863adb846b382d07a1d18d
2007-10-02 18:23:11 -07:00
Gabe Black
3eeda8008d
CPU: Make sure the system parameter gets set in the cpu builders. Other parameters need to be fixed as well.
...
--HG--
extra : convert_revision : 0401970a79855ee0a96eb29305346ce07b5c98ea
2007-10-02 18:22:36 -07:00
Ali Saidi
0acf891c32
CPU: fix sparc_fs booting with SimpleTimingCPU.
...
--HG--
extra : convert_revision : 3d95f6daa7f0e8e376d1a880f64c056619263885
2007-10-01 02:55:27 -04:00
Ali Saidi
d2a4f595d6
Update stats for quiesced cycles
...
--HG--
extra : convert_revision : 703ba58f156c9f2677b020f05d36bc1e3ae0b9e5
2007-09-28 13:22:14 -04:00
Ali Saidi
d325f49b70
Rename cycles() function to ticks()
...
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-09-28 13:21:52 -04:00
Ali Saidi
887cd6a273
Update statistics to use cycles properly instead of ticks
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--HG--
extra : convert_revision : 62911280b631ef24720f9ce701d1c19a9b8a9784
2007-09-28 13:21:30 -04:00
Gabe Black
58c448ced5
Condition Codes: Fix the findParity function.
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--HG--
extra : convert_revision : 37520ed12f55f6b8d9daedca9947eaa2eb8d7cc7
2007-09-25 20:26:10 -07:00
Gabe Black
2dd65dc254
Merge with head.
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--HG--
extra : convert_revision : f331b9cbd82086d63d4f35e18f9e08466c016225
2007-09-25 20:11:41 -07:00
Gabe Black
25a9b6ea5e
SPARC: Remove parameter that was only ever set to one value.
...
--HG--
extra : convert_revision : 3c22e576d95bdc7566bbce9b92cf2a6ff153a66f
2007-09-25 20:11:03 -07:00
Gabe Black
e735001d54
SPARC: Remove some redundant code from some of the fp instructions.
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--HG--
extra : convert_revision : 68b0341ae7a367b84c44081f9a3d6d0bc6631649
2007-09-25 20:10:04 -07:00
Gabe Black
306b5c6b5b
SPARC: Clean up of privileged instructions.
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--HG--
extra : convert_revision : 1fb055a7d186a3e9dff46f1c1b46bad6bcd00562
2007-09-25 20:09:25 -07:00
Gabe Black
b896ad584b
SPARC: Long overdue cleanup of the condition code handlers.
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--HG--
extra : convert_revision : ddc53a622a8f908fa48788f3b570f33fcfc25fff
2007-09-25 20:08:34 -07:00
Gabe Black
25b4874664
Condition Codes: Fix type error.
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--HG--
extra : convert_revision : 99f6c232cc421c6f741a8a11c029285e599eb183
2007-09-25 20:07:06 -07:00
Gabe Black
8d53fea210
SPARC: Clean up the branch instructions a bit.
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--HG--
extra : convert_revision : 93d5cc68e4a327ee0492eeed7f3b56e98d2d83bb
2007-09-25 20:05:11 -07:00
Gabe Black
9ef0f6a7f1
Loader: Load all segments of an elf, rather than just the "text" and "data".
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--HG--
extra : convert_revision : b28bb9ac5cde72878e948d64f629de6e4b42c2e8
2007-09-25 20:03:51 -07:00
Gabe Black
85d46ce470
Loader: Only complain about TLS sections if you're using Alpha.
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--HG--
extra : convert_revision : 125d19ad3fa1847752e455fa248ca3b2a55a2067
2007-09-25 20:02:30 -07:00
Gabe Black
032a30f345
SPARC: Fix a stupid mistake which was breaking the SPARC regressions.
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--HG--
extra : convert_revision : 34a11df0d467ea249211dd3aba86bc8d2aea45de
2007-09-25 20:00:46 -07:00
Gabe Black
b3c6f32543
X86: Fix for uninitialized variables in stacktrace code.
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--HG--
extra : convert_revision : d19a03d8c14eb93a99f2c1838a9caa1286804c81
2007-09-25 14:44:12 -07:00
Gabe Black
418ddf43e6
X86: Get X86_FS to compile.
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--HG--
extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
2007-09-24 17:39:56 -07:00
Gabe Black
dd277e0d8f
SPARC: Fix linking error from new flattenFloatIndex function.
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--HG--
extra : convert_revision : 5260f33336e3a9d5e3592b784458e243157f17e3
2007-09-19 19:08:42 -07:00
Gabe Black
3cd95a2748
X86: Implement the fld, fst, and fstp instructions.
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--HG--
extra : convert_revision : 7dd274bdc3c34839c17d9012a745d7c95dfcfdd8
2007-09-19 18:28:34 -07:00
Gabe Black
a75b6f5106
X86: Move the fp microops to their own file with their own base classes in C++ and python.
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--HG--
extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
2007-09-19 18:27:55 -07:00
Gabe Black
f3f3747431
X86: Put in the foundation for x87 stack based fp registers.
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--HG--
extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
2007-09-19 18:26:42 -07:00
Gabe Black
a54ae9f92b
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
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--HG--
rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py
extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
2007-09-19 18:25:17 -07:00
Gabe Black
a1912df360
X86: Enable the rename system call.
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--HG--
extra : convert_revision : bc4a3b5b5ce8e17f632e65ce89df91e2b50e1274
2007-09-19 18:24:11 -07:00
Gabe Black
bdc0261eb5
X86: Enable the unlink system call.
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--HG--
extra : convert_revision : 4230a13fdb652a87271f8d2ac9ead96cd2af07a5
2007-09-19 18:23:35 -07:00
Steve Reinhardt
76c4c5fabc
mem: clean up bus/cache DPRINTFs a bit
...
Not so much noise on failed sends, and more complete
info when grepping a trace using an address.
--HG--
extra : convert_revision : 05a8261c9452072ca08b906200c6322b33e2b9f1
2007-09-16 16:46:38 -07:00
Gabe Black
4a4aa59632
Merge with head.
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--HG--
extra : convert_revision : 22aafb1cead3f584e64c188dc8eb45e271f4e7e9
2007-09-13 16:36:25 -07:00
Gabe Black
bbc8a40857
X86: Fix how ECF is computed in genFlags, and get rid of some duplicate code.
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--HG--
extra : convert_revision : f86330a5a9fea782ee63aaa18ca964fb6f9cef0b
2007-09-13 16:35:41 -07:00
Gabe Black
534c6a800a
X86: Make the shift and rotate instructions set the carry flag(s) and overflow flags like they're supposed to.
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--HG--
extra : convert_revision : c0523a5bbf53375ce979ca7d98a95e465be66fbe
2007-09-13 16:35:20 -07:00
Gabe Black
f7b6230d99
X86: Total overhaul of the division instructions and microops.
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--HG--
extra : convert_revision : 303ea45f69f7805361ad877fe6bb43fbc3dfd7a6
2007-09-13 16:34:46 -07:00
Ali Saidi
e282d9601c
Syscall Emulation: Add stat64 syscall.
...
Patch submitted by: Jonas Diemer [diemer (a) ida.ing.tu-bs.de]
--HG--
extra : convert_revision : 07638c05bb3f79aacce49457bbb8c17d0a3a7238
2007-09-13 12:30:12 -04:00
Ali Saidi
5f187e592e
Devices: More fixes to Intel NIC Model.
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--HG--
extra : convert_revision : 14306d3cd79bbef7decdf2fd370ed7e7f2b10a93
2007-09-12 15:24:23 -04:00
Ali Saidi
19fbdcd30b
Loader: Error if a TLS section is found in the binary.
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--HG--
extra : convert_revision : d763c0382f3cbcc9786510f5a8e521ec9d55eff1
2007-09-11 00:01:24 -04:00
Gabe Black
0f57b407a3
X86: Make the isa parser run if any of the microcode files change.
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--HG--
extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
2007-09-10 16:49:07 -07:00
Gabe Black
87408d5ad2
Fix for leaving EXTRAS blank
...
Apparently env['EXTRAS'] will return an empty string if not set. split will
then split it into an empty string, and normalize will turn "" into ".".
--HG--
extra : convert_revision : f79efebb129fdd65161fcf4d4582c2a8541aeacd
2007-09-10 16:42:41 -07:00
Gabe Black
8f724a8b96
Normalize the path pathed in through EXTRAS so it won't break with a trailing slash.
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--HG--
extra : convert_revision : c14e2c6d97b5bcb491b91eeb4e7dc04d1cc35475
2007-09-10 12:48:06 -07:00
Gabe Black
22a57562cd
Remove redundant endian.hh and use byteswap.hh in its place.
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--HG--
extra : convert_revision : 5be1a5ba20d69d696d3974df147c2f219414c0b2
2007-09-10 11:02:50 -07:00
Gabe Black
8e7bca8b36
X86: Move a comment to be next to the code it describes.
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--HG--
extra : convert_revision : c384391175babb7cfdd3885ae9d9f1a9405ea44f
2007-09-10 11:01:52 -07:00
Gabe Black
3e65e1d0e0
Merge with head.
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--HG--
extra : convert_revision : 4fc5f595b23f72c0825d62f21efab46ed1db835b
2007-09-06 16:32:03 -07:00
Gabe Black
e4c0171356
X86: Rework the multiplication microops so that they work like they would in the patent.
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--HG--
extra : convert_revision : 6fcf5dee440288d8bf92f6c5c2f97ef019975536
2007-09-06 16:27:28 -07:00
Gabe Black
7f079149f1
X86: Make signed multiplication do something different from unsigned.
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--HG--
extra : convert_revision : 333c4a3464d708d4d8cea88931259ab96c2f75ed
2007-09-06 16:25:29 -07:00
Gabe Black
5052e2cb10
X86: Make signed versions of partial register values available to microops.
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--HG--
extra : convert_revision : c820d1250f505911a341ced42d4f73796ea77f87
2007-09-06 16:22:08 -07:00
Gabe Black
832ef7412b
X86: Correct how the hi portion of a product is computed.
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--HG--
extra : convert_revision : 1f503e1cae0374e62e6254e8073e903adc29d067
2007-09-06 16:20:12 -07:00
Gabe Black
389abade01
X86: Add a square root microop and the SSE sqrt instruction.
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--HG--
extra : convert_revision : ddc6e7e95111189d43f75bf84cd3d82433d982b3
2007-09-06 16:18:34 -07:00
Gabe Black
4478487c37
X86: Add SSE comparison instructions and microops and move some FP microops to be with the other ones.
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--HG--
extra : convert_revision : ee0b5acde08d12c51a5282efb58d1ac72e0779af
2007-09-06 16:09:28 -07:00
Ali Saidi
bf7c01d43d
Bus: Fix drain code; old method could return 1 in atomic mode and never call de->process().
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--HG--
extra : convert_revision : 35990e5eaf93f7a95a0ec72e9f92034a042def3e
2007-09-05 17:12:41 -04:00
Gabe Black
57da059415
Merge with head.
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--HG--
extra : convert_revision : 19bea7995285eeb7e277d3064f427429ade2bcb8
2007-09-04 23:46:08 -07:00
Gabe Black
fea46ee6e3
X86: Implement an SSE xor microop and instruction.
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--HG--
extra : convert_revision : 949737d0f5d6fe4aa77cc4680d0c88caab3e8174
2007-09-04 23:44:37 -07:00
Gabe Black
6c689a3b4b
X86: Make the movfp microop use FloatRegBits instead of FloatRegs.
...
This fixes a problem where interpreting arbitrary bits as floating point would
change what the value was. These values are legitimate because the fp
registers could be used to move around arbitrary data.
--HG--
extra : convert_revision : f1d7159ba137702b5722cc7c1b64ed7dd06c21de
2007-09-04 23:42:55 -07:00
Gabe Black
26ba7cc3b2
X86: Add tracing to the floating point register file.
...
--HG--
extra : convert_revision : f452d9179b929b980cf9e2d1e3de0431c51c5f4a
2007-09-04 23:40:47 -07:00
Gabe Black
26044dca33
X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and actually compare xmm.
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--HG--
extra : convert_revision : 02c6641200edb133c9bc11f1fdf3c1a0b1c87e77
2007-09-04 23:39:57 -07:00
Gabe Black
760240176a
X86: Hook in the fp arithmetic instructions. Stale python made it work before.
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--HG--
extra : convert_revision : af27f26ae810ebaae13faa572c5b4eb074620d91
2007-09-04 23:38:34 -07:00
Gabe Black
d2fc4ee625
X86: Implement some SSE fp microops and instructions.
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--HG--
extra : convert_revision : 7e0595ef542fbfb701bfac7e9ac4648349a92b26
2007-09-04 23:33:50 -07:00
Gabe Black
8e3b199cb8
X86: Add some SSE floating point/integer conversion microops.
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--HG--
extra : convert_revision : 2a1aa16709db940f5f40bbd84ca082f26b03b9c5
2007-09-04 23:32:18 -07:00
Gabe Black
af4c04c426
X86: Add floating point micro registers.
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--HG--
extra : convert_revision : 442a5f8b9216638e4e6898f89eacb8695719e20f
2007-09-04 23:31:40 -07:00
Gabe Black
310912cf2c
X86: Fix a typo in the microassembly for the cqo instruction.
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--HG--
extra : convert_revision : ddf739e591e4414ade37b806a88f3c11292627e2
2007-09-04 23:23:51 -07:00
Gabe Black
aaee21afdb
X86: Implement idiv and propogate the mul corner case fix.
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--HG--
extra : convert_revision : 348aa081067728afa14dc5b609fc7e26dbc5fad5
2007-09-04 23:23:13 -07:00
Gabe Black
b0b4038ee9
X86: Fix a corner case where mul would overwrite an original register value it still needed.
...
--HG--
extra : convert_revision : 86ee0e2bf716d52c34ee731727d6366935f103ed
2007-09-04 23:22:08 -07:00
Gabe Black
e1e7605213
X86: Add in a file with floating point indexing which -should- have been in an earlier changeset.
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--HG--
extra : convert_revision : bf05f81df5e5b1de1ecd8ab7a6ef751922418987
2007-09-04 23:21:41 -07:00
Ali Saidi
276a382557
Serialization: Fix unserialization of object pointers
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--HG--
extra : convert_revision : a5aed880b2fc05841067e8597a58a9484e30b84a
2007-09-04 13:12:58 -04:00
Ali Saidi
021421d663
Config: Remove some ini file code that no longer works
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--HG--
extra : convert_revision : cb01dc0abeabc97b03d7af10959d92ceb62ea936
2007-09-04 13:12:58 -04:00
Gabe Black
9da070ce8a
X86: Major rework of how regop microops are generated.
...
The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.
--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
2007-08-31 22:28:07 -07:00
Gabe Black
9277545ba6
Microassembler: Pass the actual mnemonic used to the macroop add_micro function
...
--HG--
extra : convert_revision : acaee747ab30747d602c1f4ac5f0c2b2573a2a9b
2007-08-31 22:26:02 -07:00
Gabe Black
941675690c
X86: Get x86 to compile again after the simobject constructor change.
...
--HG--
extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
2007-08-31 13:02:58 -07:00
Miles Kaufmann
eddf6f1637
python: Write configuration file without reassigning sys.stdout.
...
Using print >>ini_file syntax instead of reassigning sys.stdout
allows the python debugger to be used.
--HG--
extra : convert_revision : 63fc268f2e80f338ad1a7abe54b9e979e2239609
2007-08-30 15:16:59 -04:00
Miles Kaufmann
e4eea9ee04
Fix miscellaneous small typos.
...
--HG--
extra : convert_revision : bfc0ac8e1c8a5d01d9fa5203184bbf99c8361da3
2007-08-30 15:16:59 -04:00
Miles Kaufmann
cd890576bb
devices: Avoid using assert() to catch misconfiguration
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--HG--
extra : convert_revision : 2c6710e01a4402793a2e0eafcc829df19d03dda3
2007-08-30 15:16:59 -04:00
Miles Kaufmann
54cc0053f0
params: Deprecate old-style constructors; update most SimObject constructors.
...
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses
The SimObject(const std::string &name) constructor was removed. Subclasses
that still rely on that behavior must call the parent initializer as
: SimObject(makeParams(name))
--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-30 15:16:59 -04:00
Miles Kaufmann
9cb49ab9e0
python: Eliminate the Python use of eval() and frame manipulation
...
--HG--
extra : convert_revision : 04520bcfab510580a1c7fb341afbd2487287d1ab
2007-08-30 15:16:58 -04:00
Gabe Black
f67cd04673
X86: Fix the sra microop to get the sign bit from the right operand.
...
--HG--
extra : convert_revision : 71e58dd6dd6918ee403f2e332c47e29acdace464
2007-08-29 20:39:41 -07:00
Gabe Black
c1a776de8a
X86: Implement the movaps instruction.
...
--HG--
extra : convert_revision : 2aeb1c05205f8ea8f7484e8bacf3fbbc581defd2
2007-08-29 20:38:22 -07:00
Gabe Black
3da3190f07
X86: Implement the movsd instruction.
...
--HG--
extra : convert_revision : a5a73e0ddd39144d2aeeb9cc6a299516752fd4c2
2007-08-29 20:37:44 -07:00
Gabe Black
f0b20ff970
X86: Implement the movlpd instruction.
...
--HG--
extra : convert_revision : dddb20fe48c0ae9de7cd0ba1a1467ecb690056c1
2007-08-29 20:37:16 -07:00
Gabe Black
3b97b6e0e2
X86: Add an fp move microop.
...
--HG--
extra : convert_revision : a9d6d3568cd2c6a65df91bf56ee1e43523f04630
2007-08-29 20:36:44 -07:00
Gabe Black
22830c0747
X86: Add load and store microops that use the fp registers.
...
--HG--
extra : convert_revision : 153a055e888d8c47d59758a599dbd38f63008137
2007-08-29 20:36:12 -07:00
Gabe Black
34f3c9d196
X86: Add operands to handle floating point registers.
...
--HG--
extra : convert_revision : 2e8289dbd3f5dda1221014d4ed0e9450f60de0cf
2007-08-29 20:35:30 -07:00
Gabe Black
bc3635a110
X86: Flesh out register indexing constants.
...
--HG--
extra : convert_revision : 56eedc076bbb7962c3976599a15ed93c7cb154c0
2007-08-29 20:34:52 -07:00
Gabe Black
6204d00940
X86: Make the fp accessors not panic.
...
--HG--
extra : convert_revision : c6d08863049a3f8755c53e1f49ce19ad6a2dedc7
2007-08-29 20:34:00 -07:00
Gabe Black
61b1c53a2a
X86: Make x86 syscall return just stuff the return value in eax.
...
--HG--
extra : convert_revision : 800d8a2398d5750c03c642264577c9c772684266
2007-08-29 20:29:18 -07:00
Gabe Black
c593cfbdeb
X86: More two byte opcode decoding. I missed two groups in the last changeset.
...
--HG--
extra : convert_revision : 1a2813b2e7d3e0e02c8f1474f372de5cf16e7d7b
2007-08-28 19:36:51 -07:00
Gabe Black
fbab5c9bd3
X86: Hook in an implementation for lseek.
...
--HG--
extra : convert_revision : d2424e73fa8ce56248c4edbda9db2714c4b0a92e
2007-08-28 17:34:15 -07:00
Gabe Black
37f1ff95e0
X86: More fully decode two byte opcodes.
...
This includes the most of the SSE stuff, but not some of the "groups" of
instructions.
--HG--
extra : convert_revision : 4725c34f3d73971ae1763611685c5877b6c51412
2007-08-28 17:18:13 -07:00
Gabe Black
a3367adaff
Address translation: De-templatize the GenericTLB class.
...
--HG--
extra : convert_revision : b605a90a4a1071e39f49085a839fdcd175e09fdb
2007-08-28 14:30:50 -07:00
Gabe Black
13b1f7231c
Address Translation: Make the Generic TLB only compile in SE mode.
...
--HG--
extra : convert_revision : 7eb9a78480174f754f51f75983ee5a1b31280bd3
2007-08-27 18:30:58 -07:00
Gabe Black
703d10705c
Alpha: Fixes to get alpha to compile again.
...
--HG--
extra : convert_revision : 9541cf6dae1fb1a1c6025898692b2e04fcf55c6d
2007-08-27 18:30:02 -07:00
Gabe Black
8253ff2ba9
MIPS: Fixes to get mips to compile.
...
--HG--
extra : convert_revision : 23561eda853a51046ae56c23a88466230c3e83f2
2007-08-27 18:29:15 -07:00
Gabe Black
25ad253643
SPARC: Fixes to get SPARC to compile again.
...
--HG--
extra : convert_revision : dab20c49fec9c2d385ca59b9ab627c2d3dddfe76
2007-08-27 18:26:36 -07:00
Gabe Black
7227ab5f22
Merge with head
...
--HG--
extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-26 21:45:40 -07:00
Gabe Black
8d1c7a83d7
X86: Make the Ruflag microop work correctly, and make the code a little clearer.
...
--HG--
extra : convert_revision : c551f51cdda46df99370363ed2d70916db8413eb
2007-08-26 20:41:36 -07:00
Gabe Black
ac5ec1542e
X86: Return values for some cpuid functions that match what my development machine returns.
...
--HG--
extra : convert_revision : e6619da11f43bbe025ceabd06387dd24e1cd883b
2007-08-26 20:40:42 -07:00
Gabe Black
8b738f7f12
X86: Make the microassembler accept lines which are just labels.
...
The labels on these lines will be associated with whatever the next microop
is.
--HG--
extra : convert_revision : 80c260e48ec1c16e6325061608e37c95a0610cfa
2007-08-26 20:39:55 -07:00
Gabe Black
03880cf828
X86: Make cpuid actually consider the eax parameter and return different values.
...
--HG--
extra : convert_revision : 527c1cacdd20ab162859bba7f9a6bed33afa2d4f
2007-08-26 20:38:42 -07:00
Gabe Black
9c99f5f825
X86: Fix the sign extension microop so it extends zeros correctly.
...
--HG--
extra : convert_revision : 9d7ca286ba7709175fa75226320601acce4ced98
2007-08-26 20:37:41 -07:00
Gabe Black
506bf83595
X86: Implement cmps (string compare)
...
--HG--
extra : convert_revision : 0d6b783b2246b8ad8d91e4c63e407307ee11c651
2007-08-26 20:36:46 -07:00
Gabe Black
00d9036c62
X86: Make shift instructions set some of the flags they're supposed to.
...
The flag mechanism for microops needs to be fleshd out a little more to allow
for custom flag calculation methods for certain microops. Shift is an example
where the rules for calculating OF and CF are unique.
--HG--
extra : convert_revision : 91981a00c1efd05db702fffa9cea51f912583013
2007-08-26 20:35:48 -07:00
Gabe Black
9b49a78cfd
Address translation: Make the page table more flexible.
...
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.
--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
2007-08-26 20:33:57 -07:00
Gabe Black
80d51650c8
O3 CPU: Remove alignment check from dynamic instruction read/write functions.
...
--HG--
extra : convert_revision : e5d415b4bf79353ef3c9f4dc5af09ab4102c55fb
2007-08-26 20:31:30 -07:00
Gabe Black
fcd04f953c
X86: Remove x86 code that attempted to fix misaligned accesses.
...
--HG--
extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
2007-08-26 20:30:36 -07:00
Gabe Black
24bfda0fdf
Simple CPU: Don't trace instructions that fault. Otherwise they show up twice.
...
--HG--
extra : convert_revision : 4446d9544d58bdadbd24d8322bb63016a32aa2b8
2007-08-26 20:29:09 -07:00
Gabe Black
e7e2d5ce90
Simple CPU: Added code that will split requests that cross block boundaries into multiple memory access.
...
--HG--
extra : convert_revision : 600f79f32ef30a6e1db951503bcfe8cd332858d1
2007-08-26 20:27:11 -07:00
Gabe Black
e056e49c45
Simple CPU: Make sure only instructions which complete without faulting are counted.
...
--HG--
extra : convert_revision : 01019c7129ed762d8826c3e6519989aa3fc3b5fd
2007-08-26 20:25:42 -07:00
Gabe Black
537239b278
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
...
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-08-26 20:24:18 -07:00
Gabe Black
f738afb865
SPARC: Make sure unaligned access are caught on cached translations as well.
...
--HG--
extra : convert_revision : 5c1f3f585817a19a771164f809dfc2fdc1ab3fb2
2007-08-26 20:15:29 -07:00
Gabe Black
20e0a3792a
Merge with head.
...
--HG--
extra : convert_revision : 9ef81afcfabd86c9c069204998c987344f03f33e
2007-08-21 16:19:46 -07:00
Kevin Lim
e1054170b5
o3: Fix for retry ID bug.
...
It should be cleared prior to the call to recvRetry.
Add extra DPRINTF statement for clearer debugging output.
--HG--
extra : convert_revision : e2332754743f42d60e159ac89f6fb0fd8b7f57f8
2007-08-21 16:16:56 -07:00
Gabe Black
a874cb40ab
Merge with head.
...
--HG--
extra : convert_revision : 6ce77b5bd4f43ddecd51ea8c66759e4b70d4ad82
2007-08-18 19:41:08 -07:00
Ali Saidi
464a51e29e
Ports: Only try to do EthPort stuff in full system.
...
--HG--
extra : convert_revision : 9ea093ea7c9ab22f8467c5cd5d55b66c71eb3427
2007-08-17 04:20:02 -04:00
Ali Saidi
bba265ccd8
PCI: Move PCI Configuration data into devices now that we can inherit parameters.
...
--HG--
extra : convert_revision : bd2214b28fb46a9a9e9e204e0539be33acb548ad
2007-08-16 16:49:05 -04:00
Ali Saidi
773cb77656
Devices: Make EtherInts connect in the same way memory ports currently do.
...
--HG--
extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
2007-08-16 16:49:02 -04:00
Gabe Black
ca84d953b9
SPARC: Make nops have the IsNop flag set.
...
In O3, a nop is used to carry faults down the pipeline that didn't originate
from an instruction. If the instruction doesn't do anything, that is just
returns NoFault, but doesn't have IsNop set, the NoFault will overwrite the
fault that's being sent down and nothing will happen.
--HG--
extra : convert_revision : 54d99002b550ca0e1cf14603f588dc1038e3e535
2007-08-13 16:11:27 -07:00
Gabe Black
92a57edff1
O3: Set up the predicted npc and nnpc for a fault carrying noop so that it doesn't cause a false branch mispredict.
...
--HG--
extra : convert_revision : 2820597cc966cd7b128cef0dab48fe05089533d7
2007-08-13 16:08:58 -07:00
Gabe Black
e99c56f971
SPARC: Move tlb state into the tlb.
...
Each "strand" may need to have a private copy of this state, but I couldn't
find anywhere in the spec that said that after looking briefly.
This prevents writes to the thread context in o3 which was causing the
pipeline to be flushed and stopping any forward progress. The other ASI
accessible state will probably need to be accessed differently if/when we get
O3 full system up and running.
--HG--
extra : convert_revision : fa7fba812d7f76564ef4a23818e60f536710d557
2007-08-13 16:06:50 -07:00
Gabe Black
26853e11c0
SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault ASI accesses work.
...
--HG--
extra : convert_revision : 3321bb91da02c1bec27fa34d0ba945cc976b6491
2007-08-13 16:02:47 -07:00
Gabe Black
82f78ebd39
Move the "translate" member functions back into the base o3 class.
...
--HG--
extra : convert_revision : 3c480537bf38f74f0f1d72e75c70aa46ba91b759
2007-08-13 16:01:09 -07:00
Nathan Binkert
9b4be65327
python: make the DictImporter's unload() work in any context.
...
import sys since sys may not be defined in whatever context the DictImporter
is used. Also reset self.installed after an unload since the same DictImporter
could be used again
--HG--
extra : convert_revision : 988ed7ad8cd41b69e8fc583e618b1b4a146216da
2007-08-13 13:39:22 -07:00
Ali Saidi
02353a60ee
MemorySystem: Fix the use of ?: to produce correct results.
...
--HG--
extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
2007-08-12 19:43:54 -04:00
Vincentius Robby
ec4000e0e2
Added fastmem option.
...
Lets CPU accesses to physical memory bypass Bus.
--HG--
extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
2007-08-08 18:43:12 -04:00
Vincentius Robby
1caed14654
alpha: Quick fix for things related to TLB MRU cache.
...
simple-timing test for ALPHA_FS breaks.
--HG--
extra : convert_revision : 5a1b05cddd480849913da81a3b3931fec16485a8
2007-08-08 18:38:19 -04:00
Ali Saidi
06a9f58c68
DMA: Add IOCache and fix bus bridge to optionally only send requests one
...
way so a cache can handle partial block requests for i/o devices.
--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
2007-08-10 16:14:01 -04:00
Ali Saidi
5c38668ed6
Bus: Only call end() on an stl object once in a loop
...
--HG--
extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
2007-08-10 16:14:01 -04:00
Vincentius Robby
3d40cba8d4
Port, StaticInst: Revert unnecessary changes.
...
--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
2007-08-08 14:54:02 -04:00
Vincentius Robby
13d10e844c
alpha: Make the TLB cache to actually work.
...
Improve MRU checking for StaticInst, Bus, TLB
--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
2007-08-08 14:18:09 -04:00
Gabe Black
ef32494e72
Alpha: Fix an off by one error with the tlb caching mechanism.
...
--HG--
extra : convert_revision : e17f7a0d58a2e59b2e270f0827db33d0a29365e0
2007-08-07 21:51:12 -07:00
Gabe Black
0fd999ca40
Merge with head.
...
--HG--
extra : convert_revision : ae7b3df573368c29a66d5b027ecad9ffb3a99104
2007-08-07 15:31:36 -07:00
Gabe Black
cd3f0646ca
X86: Added some missing parenthesis in the condition code calculation function.
...
--HG--
extra : convert_revision : 663021070a4bcc795bb44e1839b8bcec686a42f0
2007-08-07 15:26:50 -07:00
Gabe Black
24541780c6
X86: Implemented and hooked in SCAS (scan string)
...
Fixed the asz assembler symbol.
Adjusted the condion checks to have appropriate options.
Implemented the SCAS microcode.
Attached SCAS into the decoder.
--HG--
extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
2007-08-07 15:25:41 -07:00
Gabe Black
d79a591608
X86: Add a format to handle string instructions which can use the repe and repne prefixes.
...
--HG--
extra : convert_revision : 205fbbb947258bc0ef2915e22d5b32a3df1a1ce2
2007-08-07 15:23:01 -07:00
Gabe Black
60c61cb2b1
X86: Overhaul of ruflags to get it to work correctly.
...
--HG--
extra : convert_revision : 00a36a80a1945806aac9fa7d9d6a3906465dcad2
2007-08-07 15:21:13 -07:00
Gabe Black
fb6cdf09cb
X86: Make a microcode branch microop.
...
Also some touch up for ruflag.
--HG--
extra : convert_revision : 829947169af25ca6573f53b9430707101c75cc23
2007-08-07 15:19:26 -07:00
Gabe Black
cae8d20633
Merge with head.
...
--HG--
extra : convert_revision : 3edb9f03353b18b4c9f062bccf11e79cfb3c15f2
2007-08-04 20:27:23 -07:00
Gabe Black
30e777a5d3
X86: Implement microops and instructions that manipulate the flags register.
...
--HG--
extra : convert_revision : 566841577bf4a98cac0b65292fe0f7daf89a9203
2007-08-04 20:24:18 -07:00
Gabe Black
802f13e6bd
X86: Make 64 bit unaligned accesses work as well as the other sizes.
...
There is a fundemental flaw in how unaligned accesses are supported, but this
is still an improvement.
--HG--
extra : convert_revision : 1c20b524ac24cd4a812c876b067495ee6a7ae29f
2007-08-04 20:22:20 -07:00
Gabe Black
b9793c2506
X86: Make the open flags correct.
...
--HG--
extra : convert_revision : 2dc81345176d1de247a567d1f748e2b2bd05f829
2007-08-04 20:18:20 -07:00
Gabe Black
fc6b2cceb4
X86: Make fixed register operands ignore register index extensions from the REX prefix.
...
The only cases where this was the correct behavior are now handled with the
"B" operand type, and doing things this way was breaking some instructions,
notably a shift.
--HG--
extra : convert_revision : 072346d4f541edaceba7aecc26ba8d2cd756e481
2007-08-04 20:17:31 -07:00
Gabe Black
6f3bb03a3f
X86: Implement the cmpxchg instruction.
...
--HG--
extra : convert_revision : b9e172bcb9551edf65c63f26dfa07d771edf3e1e
2007-08-04 20:15:27 -07:00
Gabe Black
e410a925df
X86: Start implementing segmentation support.
...
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
2007-08-04 20:12:54 -07:00
Gabe Black
ced6cbcccf
X86: Create a base enum value for indexing into a region of the miscregs.
...
This lets you index into a group of registers without having to know
explicitly which one is the lowest in that group.
--HG--
extra : convert_revision : e3cad25a1c5910955204c37177b049ca9834cfd9
2007-08-04 20:07:42 -07:00
Gabe Black
0e6be2a9b1
X86: Add the arch_prctl system call and fix up some microcoding.
...
The arch_prctl system call is used to set and get the FS and GS segment
bases. The FS segment is use for TLS, so glibc needs to be able to set it
up.
--HG--
extra : convert_revision : 79501491a15967a7a862add846ff88a934fb1b37
2007-08-04 20:02:41 -07:00
Nathan Binkert
df015f17a4
switching: turn on profiling after a switch if there's an event
...
--HG--
extra : convert_revision : 689e5b85c47bb2aaceb7eb38c2a24a2e5b69376c
2007-08-04 16:11:11 -07:00
Nathan Binkert
7a996ccc98
switching: Remove the drain and resume code from the switching code.
...
This allows us to change memory modes as well.
Clean up the code while we're at it.
--HG--
extra : convert_revision : fc5fee9ffd08b791f0607ee2688f32aa65d15354
2007-08-04 16:09:24 -07:00
Nathan Binkert
5a27431b96
python: use the enum values in the memory mode changing code
...
--HG--
extra : convert_revision : 2e399b2b407922ad076f93d33af73e3ba4c05218
2007-08-04 16:06:19 -07:00
Nathan Binkert
300712c0d1
swig: %include all of the enums to get all of the definitions.
...
(instead of %import)
--HG--
extra : convert_revision : bc4a39d7be3aad59b34d55aa8dd2c28285f09db9
2007-08-04 16:05:18 -07:00
Nathan Binkert
157bd25802
python: provide access to stats
...
--HG--
extra : convert_revision : 18a4e9ef21bd77ec73482557e028d535f0c1f273
2007-08-04 16:02:04 -07:00
Nathan Binkert
d8900d8478
main: return an an exit code of 1 when we exit due to a python exception.
...
This requires us to not use PyRun_SimpleString, but PyRun_String since the
latter actually returns a result
--HG--
extra : convert_revision : 3e3916ddd7eef9957569d8e72e73ba4c3160ce20
2007-08-04 16:00:36 -07:00
Nathan Binkert
e8e1ddd530
SimpleCPU: Add some DPRINTFs
...
--HG--
extra : convert_revision : 5fdd5a9595c3e5d6ce5f9e8c9af0a8e6c857551c
2007-08-04 15:56:48 -07:00
Vincentius Robby
1db9e1fb8f
port: Implement cache for port interfaces and ranges
...
--HG--
extra : convert_revision : d7cbec7c277fb8f4d8846203caae36ce629602d5
2007-08-04 16:05:55 -04:00
Vincentius Robby
2898d76827
alpha: Implement a cache for recently used page table entries
...
--HG--
extra : convert_revision : 1bb80d71fa91e500a68390e5dc17464ce7136fba
2007-08-04 14:25:35 -04:00
Vincentius Robby
acac5580f2
StaticInst: Fix decode cache initialization. Cache functionality was negated.
...
--HG--
extra : convert_revision : fe313718dba8236f3e9bceb49f8c5efccfc06a06
2007-08-04 14:25:17 -04:00
Steve Reinhardt
3afc625975
merge from head
...
--HG--
extra : convert_revision : 21f7afe2719c00744c0981212c1ee6e442238e01
2007-08-03 03:51:30 -04:00
Steve Reinhardt
62aa1d7f55
cache: get rid of obsolete params from python.
...
--HG--
extra : convert_revision : cd40e0ef938ef6da1cccedf7be01c3ac5b4883fb
2007-08-03 03:51:13 -04:00
Gabe Black
121a894ce0
Merge with head.
...
--HG--
extra : convert_revision : c8b066289916b3fb24bcae1e9c76e27ad4cf61b1
2007-08-02 23:30:25 -07:00
Nathan Binkert
0536d0cde9
python: Improve support for python calling back to C++ member functions.
...
Add support for declaring SimObjects to swig so their members can be wrapped.
Make sim_object.i only contain declarations for SimObject.
Create system.i to contain declarations for System.
Update python code to properly call the C++ given the new changes.
--HG--
extra : convert_revision : 82076ee69e8122d56e91b92d6767e356baae420a
2007-08-02 22:50:02 -07:00
Ali Saidi
dc7a38dce7
Merge: No changes
...
--HG--
extra : convert_revision : ee56f958f6b295571cf881b81380cfba3d4ce02e
2007-08-02 22:09:54 -04:00
Ali Saidi
50bceeae14
Serialize: This shouldn't have been commited, I got a little bit carried away it seems.
...
--HG--
extra : convert_revision : f8d4d9f3d395d2d3db020cd016c7840876097791
2007-08-02 22:08:33 -04:00
Gabe Black
f4b89cd897
X86: Get rid of some debug warnings.
...
Get rid of some warnings that were accidentally committed.
--HG--
extra : convert_revision : e800dbce253f6ba759932ca47d64bf98129e4177
2007-08-02 16:28:01 -07:00
Gabe Black
fa9e4d110a
Merge with head.
...
--HG--
extra : convert_revision : 7700f475caa676948175cdf126ee018b0c4ad35c
2007-08-02 15:14:36 -07:00
Gabe Black
4af5740afd
X86: Finally get the x86 initial stack frame right.
...
After very carefully reading through the Linux source, I'm pretty confident I now know -exactly- how the initial stack frame is constructed, filled, and aligned.
--HG--
extra : convert_revision : 3c654ade7e458bdd5445026860f11175f383a65f
2007-08-02 15:12:18 -07:00
Gabe Black
85b661e35d
X86: Fix special case with SIB index register and REX prefix.
...
--HG--
extra : convert_revision : b305708a722f2a08cb55c4548c5616fcbe6c5d68
2007-08-02 15:09:12 -07:00
Nathan Binkert
4041e1ddd9
merge: no manual changes
...
--HG--
extra : convert_revision : fe31a334a6db4e4ac8489738429093c90ea94925
2007-08-02 14:19:40 -07:00
Nathan Binkert
b367474916
python: fix m5.build_env variable.
...
As it is now, some objects will get the incorrect value depending where they
were defined.
--HG--
extra : convert_revision : a11a14842f9524739cbf54a48be6ec051f371200
2007-08-02 14:12:53 -07:00
Ali Saidi
31a9114a3d
merge, no manual changes
...
--HG--
extra : convert_revision : 8504bddf1f73a4186cebc03c3e52e42ea38361fc
2007-08-02 15:38:06 -04:00
Nathan Binkert
dfa147a70a
python: need to import objects to make some calls work
...
--HG--
extra : convert_revision : b5eec971d76626b2f42448052ab2cb2acb652d1b
2007-08-02 12:03:35 -07:00
Nathan Binkert
5682f4f7f9
main: expose the build information as a simple command line parameter
...
--HG--
extra : convert_revision : 69189c4a2e9fa9290fe51a2a43a2b08e712c395d
2007-08-02 11:59:02 -07:00
Ali Saidi
da5f62af7b
Serialization: Provide array serialization methods that work on std::vector
...
--HG--
extra : convert_revision : aecdf1a7e50edbb12921991cc81df1b431ce8b38
2007-08-02 14:43:27 -04:00
Ali Saidi
c4e026daf4
Output: Make OutputDirectory::create() be able to create binary files.
...
--HG--
extra : convert_revision : eae114ee5f27bb8b319df705d9b39bded185b8e8
2007-08-02 14:40:56 -04:00
Ali Saidi
acb91c2dfa
Linux Support: make sure that when we get the stack page for thread info we're doing a 64bit not
...
--HG--
extra : convert_revision : c581921dd601fc72fd2d45b961c7440755b0331c
2007-08-02 14:34:58 -04:00
Ali Saidi
970261f9ce
debugSymbolTable is a global variable and only needs to be created once, not once per system
...
--HG--
extra : convert_revision : 43cbfd1a58d7d728898cbfae0d7f7d9960eba178
2007-08-02 14:32:20 -04:00
Gabe Black
e719a3e4c0
Fix how the "cmd" parameter is set in se.py and remove hack in x86 process initialization code.
...
--HG--
extra : convert_revision : 1fc741eea956ebfa4cef488eef4333d1f50617a6
2007-08-01 18:19:23 -07:00
Nathan Binkert
f20ba92a76
merge: mips fix to getArgument
...
--HG--
extra : convert_revision : 0e97c80ca9bdd354f537bf5d036e024da0081306
2007-08-01 16:58:22 -07:00
Nathan Binkert
a3e70f4957
mips: make getArgument inline so mips will link properly
...
--HG--
extra : convert_revision : 7fdbf1f35a5fcbd8704bf02aafcb3ea069626ce3
2007-08-01 16:57:29 -07:00
Gabe Black
baa1182513
Merge with head.
...
--HG--
extra : convert_revision : 646d559a10706521b1918d2378d0f99ab5255c77
2007-08-01 16:00:33 -07:00
Gabe Black
458dfc8b3e
Merge with head.
...
--HG--
extra : convert_revision : f677debfd636d79bc5097eb45331601d3253743d
2007-08-01 15:54:25 -07:00
Gabe Black
c032a535ab
MIPS: Files which are needed for the MIPS fix.
...
--HG--
extra : convert_revision : ae710fa8e4e9f57c19cd7277b1b59efd0af40b6a
2007-08-01 15:53:39 -07:00
Gabe Black
8da3e0548e
Merge with head.
...
--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b
2007-08-01 15:12:07 -07:00
Gabe Black
5b5e2fd6cd
X86: Hide the irrelevant portions of the address components for load and store microops.
...
--HG--
extra : convert_revision : a5ac6fefa09882f0833537e23f1ac0477bc89bb9
2007-08-01 14:34:59 -07:00
Ali Saidi
84cd78e96f
Merge Gabe and my changes to arch/mips/utility.hh
...
--HG--
extra : convert_revision : d5a9d74ee6edf71524ba5c03fb7f054cf9722213
2007-08-01 17:05:03 -04:00
Ali Saidi
fae60c164e
Arguments: Get rid of duplicate code for the Arguments class in each architecture.
...
Move the argument files to src/sim and add a utility.cc file with a function
getArguments() that returns the given argument in the architecture specific fashion.
getArguments() was getArg() is the architecture specific Argument class and has had
all magic numbers replaced with meaningful constants. Also add a function to the
Argument class for testing if an argument is NULL.
--HG--
rename : src/arch/alpha/arguments.cc => src/sim/arguments.cc
rename : src/arch/alpha/arguments.hh => src/sim/arguments.hh
extra : convert_revision : 8b93667bafaa03b52aadb64d669adfe835266b8e
2007-08-01 16:59:14 -04:00
Gabe Black
239d124e83
MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc
...
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.
--HG--
extra : convert_revision : 66ef7762024b72bb91147a5589a0779e279521e0
2007-08-01 13:55:47 -07:00
Gabe Black
e5e5b0119d
X86: Fix for compilation bug with new cache code.
...
--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
2007-08-01 12:49:58 -07:00
Gabe Black
7da3a8e65c
Merge with head.
...
--HG--
extra : convert_revision : 5bc1133c6c7a575082f060e7787b62d4080f70b0
2007-08-01 12:02:59 -07:00
Gabe Black
e42524af02
X86: Reorganize the native tracing code.
...
Ignore different values or rcx and r11 after a syscall until either the local or remote value changes. Also change the codes organization somewhat.
--HG--
extra : convert_revision : 2c1f69d4e55b443e68bfc7b43e8387b02cf0b6b5
2007-08-01 12:01:51 -07:00
Gabe Black
4b29d22386
X86: Get rid of initialization of R11
...
R11 is just junk after the start of exectuion because we're "returning" from
an execve call and linux destroys the contents of rcx and r11 on system calls.
--HG--
extra : convert_revision : 6bf69a50ce56e0355dfdd41524163874340beec0
2007-08-01 12:00:32 -07:00
Nathan Binkert
a4a5e6bc2e
Twin64_t is in base/bigint.hh
...
--HG--
extra : convert_revision : 827a89c203235aea08d184cdc720d9c6fb08e4c7
2007-08-01 11:48:32 -07:00
Gabe Black
4bdabe1254
Add a flag to indicate an instruction triggers a syscall in SE mode.
...
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
2007-07-31 17:34:08 -07:00
Gabe Black
55ade789d3
X86: Add operand type information to the fnstcw and fldw instruction placeholders.
...
These are the only floating point instructions that get used in my simple hello world test. These instructions are for setting up the floating point control register. Their not being implemented doesn't affect anything because floating point isn't used.
--HG--
extra : convert_revision : 4dfb9ef2a5665f034946c504978029e8799e64cd
2007-07-31 14:55:06 -07:00
Steve Reinhardt
c4c8a12186
Merge from head.
...
--HG--
extra : convert_revision : af16bc685ea28e44b8120f16b72f60a21d68c1e2
2007-07-31 00:37:07 -04:00
Gabe Black
ae3e1d22fc
X86: Add decoding for x87 floating point.
...
--HG--
extra : convert_revision : 08f0f4a3d77a2c5eb9b5ca0cae7d0be9a72febec
2007-07-30 17:54:01 -07:00
Gabe Black
463e8a7516
X86: Attach the "DIV" instruction implementation to the decoder.
...
--HG--
extra : convert_revision : 8aef1c8d1ced2db998ed0d31241cadc17e19eadd
2007-07-30 15:44:48 -07:00
Gabe Black
595ff465e5
X86: Remove a naming conflict between the register index parameters and the "picked" register values.
...
--HG--
extra : convert_revision : 7b2c1be509478153ebf396841e4cbeccee3e03d1
2007-07-30 15:44:21 -07:00
Gabe Black
77482dc439
X86: __pad0 should be a 4 byte pad, not a 4 long array of 4 byte pads.
...
--HG--
extra : convert_revision : e0d5ab617bc95d5d714fa9fcdf0a448874aef886
2007-07-30 15:43:20 -07:00
Gabe Black
f02bb63894
X86: Turn on the exit_group, exit, munmap, and write syscalls.
...
--HG--
extra : convert_revision : e358c18cd999a8e274108e06502c3324c2d12d3b
2007-07-30 15:42:42 -07:00
Gabe Black
43f0be5253
X86: Use an mmap base address that matches what an actual machine uses.
...
--HG--
extra : convert_revision : 98521797bbc6360301b3c6a6b1b8e28236ef570e
2007-07-30 15:42:04 -07:00
Gabe Black
890e583163
X86: Set up RIP relative LEA instructions operands correctly.
...
--HG--
extra : convert_revision : 820cafadd550487c0d62c5082261b0886fce4f0d
2007-07-30 15:41:08 -07:00
Gabe Black
44c3419e1a
X86: Implement unsigned divide. The non-byte version ignores rdx which it shouldn't.
...
--HG--
extra : convert_revision : 07e5509fb8ed9d73c144d6f52951ebc02e7c0032
2007-07-30 15:40:39 -07:00
Gabe Black
74fcf117dd
X86: Allow RIP relative decode on -all- memory forms of operands.
...
--HG--
extra : convert_revision : 8af62cda2ce1c4acfa26a028a4f7506647bc27f7
2007-07-30 15:39:25 -07:00
Gabe Black
65db30992c
X86: Take into account the regular registers and the microcode registers when decided whether or not to fold.
...
--HG--
extra : convert_revision : 26feec984dec61799c4afb03a4503a53c35872c5
2007-07-30 15:38:40 -07:00
Gabe Black
9536120845
X86: Fix up the stat structure. This probably still isn't right.
...
--HG--
extra : convert_revision : 2e2a22cdf3abe648c9e1309b9070cfd10fc4a8b8
2007-07-30 13:31:59 -07:00
Gabe Black
a1b193f026
X86: Hook in the new instructions.
...
--HG--
extra : convert_revision : c4233001b35b52161083482841593ec28da6ff7d
2007-07-30 13:31:27 -07:00
Gabe Black
ab8ba813c9
X86: Turn on some system calls, and make the kernel version match my development machine.
...
--HG--
extra : convert_revision : 2f1969a45aa82708dc4cddef09c01306f76f0a81
2007-07-30 13:30:41 -07:00
Gabe Black
9e2b1f8630
X86: Make sure FP_Base_DepTag is big enough to avoid trouble.
...
--HG--
extra : convert_revision : 7e0a83d5deb7fc9aaa69b7d024ea6ae6890df133
2007-07-30 13:29:56 -07:00
Gabe Black
18be07289f
X86: Implement a stub CPUID function which is hardcode to return certain values.
...
--HG--
extra : convert_revision : 4085e04fd13e834646106faa55726d07d9631f42
2007-07-30 13:29:33 -07:00
Gabe Black
dbc979b9e2
X86: Force jumps to use 64 bit operand size.
...
--HG--
extra : convert_revision : 1c3685e7f4d07d5b4ded6c78b794964f51a358a9
2007-07-30 13:28:31 -07:00
Gabe Black
bae96272a1
X86: Make instructions use pick, and implement/adjust some multiplication microops and instructions.
...
--HG--
extra : convert_revision : 5c56f6819ee07d936b388b3d1810a3b73db84f9c
2007-07-30 13:28:05 -07:00
Gabe Black
fad96cd0fc
X86: Make merge and pick work with high bytes. Fix a sizing issue in pick.
...
--HG--
extra : convert_revision : 4ddc2ca8c23bb7e90a646329ebf27a013ac5e3d6
2007-07-30 13:26:48 -07:00
Gabe Black
0d31a41304
X86: Make register names in disassembly reflect high bytes.
...
--HG--
extra : convert_revision : e2891581e5504de0a2c8e5932fd22425cafd4fc7
2007-07-30 13:26:14 -07:00
Gabe Black
31a862b8f1
X86: missed a file which adds a "fold" bit.
...
--HG--
extra : convert_revision : 2c8eea425221d069a9bb888c8f18839843061899
2007-07-30 13:25:38 -07:00
Gabe Black
da84aa95a9
Make the register indices use the appropriate "fold" bit.
...
--HG--
extra : convert_revision : 89e15e2ef1f709f2c09238b78f94505ce8ef146d
2007-07-30 13:25:00 -07:00
Gabe Black
d8beeff324
X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded".
...
--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
2007-07-30 13:23:33 -07:00
Gabe Black
9b5421dcba
X86: Missed a file for adding a bit to indicate that an REX prefix was present.
...
--HG--
extra : convert_revision : f1bbd5165a7415d0daf27660575d30c41510f531
2007-07-30 13:20:08 -07:00
Gabe Black
4b3a20cdec
X86: Implement LEAVE
...
--HG--
extra : convert_revision : c642d5018ece82c644e1cfa389b2d3dbd6ab5ffd
2007-07-30 13:19:11 -07:00
Gabe Black
e70ffb0117
X86: Add a bitfield to indicate whether or not an REX prefix was present.
...
--HG--
extra : convert_revision : 9c4802f6c6e4eaab36aac900e2c7576682cb0f33
2007-07-30 13:17:34 -07:00
Gabe Black
24ac08daa4
Fix problem with tracer not being initialized.
...
--HG--
extra : convert_revision : 09610ad84afa605db2d0eab9945eb9809f297182
2007-07-30 13:13:11 -07:00
Steve Reinhardt
2f93db6f95
memory system: fix functional access bug.
...
Make sure not to keep processing functional accesses
after they've been responded to.
Also use checkFunctional() return value instead of checking
packet command field where possible, mostly just for consistency.
--HG--
extra : convert_revision : 29fc76bc18731bd93a4ed05a281297827028ef75
2007-07-29 20:17:03 -07:00
Gabe Black
fa86dcd1a6
Merge with head.
...
--HG--
extra : convert_revision : 1cf4d998699d131c3b20eef67a3c2817af0ce439
2007-07-29 13:53:39 -07:00
Gabe Black
7309d5ee45
X86: Make logic instructions flag setting work.
...
The instructions now ask for the appropriate flags to be set, and the microops do the "right thing" with the CF and OF flags, namely zero them.
--HG--
extra : convert_revision : 85138a832f44c879bf8a11bd3a35b58be6272ef3
2007-07-29 13:51:40 -07:00
Gabe Black
1af50a9e8b
X86: Make arithmetic instructions set the appropriate flags.
...
--HG--
extra : convert_revision : 3bdef3876c7b86bc93365edee876b74a201d625f
2007-07-29 13:50:10 -07:00
Steve Reinhardt
08474ccf68
Merge Gabe's changes from head.
...
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
2007-07-29 13:25:14 -07:00
Steve Reinhardt
4a7d0c4b79
bus: take out response prioritization (timing was messed up).
...
Also make express snoops not occupy bus (since they're magic).
--HG--
extra : convert_revision : 75aa5211a59380026d1e3f122778425e48e2edcd
2007-07-29 13:24:48 -07:00
Steve Reinhardt
362ff1bceb
BsaeCPU: Get rid of some bad DPRINTFs.
...
People should never put pointers in DPRINTFs; it messes up
tracediffs. Plus these used the FullCPU trace flag, which
is not right.
--HG--
extra : convert_revision : 82ed56757da0ad947c165ba205b5f752c85c6667
2007-07-29 13:22:44 -07:00
Gabe Black
5e34c62b3b
X86: Initial stack frame fixes and constant shuffling.
...
The initial stack frame for x86 is now substantially more correct. The fixes made here can be back ported to SPARC and possible the other ISAs as well. The auxiliary vector types were moved to the LiveProcess base class because they are independent of ISA. Some of the types may only apply to Linux, though, so they may have to be moved.
--HG--
extra : convert_revision : 89ace35fcc8eb9586d2fee8eeccbc3686499ef24
2007-07-29 01:33:06 -07:00
Gabe Black
e5f5890365
X86: Make limm use merge and allow overriding the data size.
...
--HG--
extra : convert_revision : c6057226b8ff8f272612a9d3bf7d1d9ba90c819b
2007-07-29 01:30:28 -07:00
Gabe Black
b6395da4ce
X86: Fix register ordering.
...
The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx.
--HG--
extra : convert_revision : 3abe6a723a6e30becfe34f8da707ea2ff5d4df77
2007-07-29 01:28:36 -07:00
Gabe Black
33847f8c83
X86: return -return_value.value() on failure.
...
--HG--
extra : convert_revision : d8e1486ff075b2917be62a0008f83fd6c9e4c09a
2007-07-29 01:27:34 -07:00
Gabe Black
d995575342
X86: Fix popa and push with the stack pointer.
...
POPA used st instead of ld, and it didn't skip rsp. push rsp needs to store the -original- value of the stack pointer.
--HG--
extra : convert_revision : 376370c99b6ab60fb2bc4cd4f0a6dce71153ad06
2007-07-29 01:26:47 -07:00
Gabe Black
3dcd848ec3
X86: Fix a bug with merge
...
Merge was returning the value to merge in, not the actual result of the merge.
--HG--
extra : convert_revision : 230b4b5064037d099ae7859edabdf5be84603849
2007-07-29 01:24:57 -07:00
Gabe Black
dc86f3229c
X86: Fix a comment and adjust the stack base address.
...
The stack base on my development machine starts one page below where it needs to. I don't know why it does, but I've duplicated it in m5.
--HG--
extra : convert_revision : c4783ba885b90f17e843f61e07af0bc3330a74bc
2007-07-28 21:18:53 -07:00
Gabe Black
fe46e28b14
Merge with head.
...
--HG--
extra : convert_revision : 3c1ff2585c9b20649792344b4180f6d82cef9c1b
2007-07-28 21:04:45 -07:00
Gabe Black
e996ff7497
X86: Fix up auxiliary vectors.
...
The type constants should go into an architecture independent spot since they are universal to all Linux elf binaries. The right value for some of the vectors needs to be determined. Also, x86 does not store argc or argv_array_base in registers like some other architectures.
--HG--
extra : convert_revision : 8d3f6a3e028d881d3c41e8ddf4f29d25738b529c
2007-07-28 20:33:42 -07:00
Gabe Black
8dd7700482
Turn the instruction tracing code into pluggable sim objects.
...
These need to be refined a little still and given parameters.
--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
2007-07-28 20:30:43 -07:00
Steve Reinhardt
aaf59949e5
AtomicSimpleCPU: fix inadvertent loss of endian conversion on read.
...
--HG--
extra : convert_revision : 367bf2431bf4f4eb7c4d5723816e5db6f7233aed
2007-07-28 18:00:05 -07:00
Nathan Binkert
142362b703
merge whitespace changes
...
--HG--
extra : convert_revision : 20e8aa51935dc23ac3c7e6da2cb7a4e62c9a3a7c
2007-07-28 17:06:32 -07:00
Nathan Binkert
c27e23f2e8
style: Check/Fix whitespace on SCons files
...
--HG--
extra : convert_revision : 46e6b2dd8e1984cbab0ea24c94760794734c0f95
2007-07-28 16:49:20 -07:00
Steve Reinhardt
8705b0799b
packet: get rid of unused intersect() function.
...
--HG--
extra : convert_revision : f0a2947ccc49e0d18bc17a59371fa396d9ebd6c0
2007-07-27 12:46:55 -07:00
Steve Reinhardt
0cbcb715e0
cache/memtest: fixes for functional accesses.
...
--HG--
extra : convert_revision : 688ba4d882cad2c96cf44c9e46999f74266e02ee
2007-07-27 12:46:45 -07:00
Steve Reinhardt
01c9d34a0b
cache: Get rid of unused variable.
...
--HG--
extra : convert_revision : 394adc12fbd7ea10280a1b8d6bc3cb15ee019f27
2007-07-27 03:51:15 -04:00
Nathan Binkert
f0fef8f850
Merge python and x86 changes with cache branch
...
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-26 23:15:49 -07:00
Gabe Black
d4e69c006b
Merge with head.
...
--HG--
extra : convert_revision : e4be9d5f2ce8e3252958e2c5e03710b0bf9755c7
2007-07-26 22:13:48 -07:00
Gabe Black
d1e533a1e2
X86: Fix argument register indexing.
...
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.
--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
2007-07-26 22:13:14 -07:00
Gabe Black
876849724d
X86: Hook in shift and rotate by one instructions, and NOT.
...
--HG--
extra : convert_revision : b3ab74e09f5cd02671cc6425c8cb8638bd58cbee
2007-07-26 22:10:59 -07:00
Gabe Black
edaaf1ebf1
X86: Fix pc relative versions of add and subtract.
...
--HG--
extra : convert_revision : c7e578aae8d36aa5d279fc27d6d7d28ed0a54181
2007-07-26 22:10:21 -07:00
Gabe Black
647a3270d1
X86: Implement rotate-by-one instructions, and make register rotates use registers.
...
--HG--
extra : convert_revision : 701691951688ecefdc6450d31076b45e9af15324
2007-07-26 22:09:41 -07:00
Gabe Black
9e975a7e08
X86: Implement shift-by-one instructions, and make register shifts use registers.
...
--HG--
extra : convert_revision : ce4af3e56b45821e0a8b27f288b532d2f9dd3336
2007-07-26 22:09:24 -07:00
Gabe Black
c0670187c5
X86: Add functions to read and write to an exec context.
...
These functions take care of calling the thread contexts read and write functions with the right sized data type, and handle unaligned accesses.
--HG--
extra : convert_revision : b4b59ab2b22559333035185946bae3eab316c879
2007-07-26 22:08:35 -07:00
Gabe Black
57428b8b0b
X86: Fix carry calculation for subtraction based microops.
...
The carry flag should be calculated using the -complement- of the second operand, not it's negation. The carry in which is part of computing the 2's complement may induce a carry, but if you've already caused the carry before you get the carry computing logic involved, it will miss it.
--HG--
extra : convert_revision : 318cf86929664fc52ed9e023606a9e892eba635c
2007-07-26 22:06:30 -07:00
Gabe Black
749ed15b60
Add functions for mmap and brk.
...
--HG--
extra : convert_revision : 3d0340a2aae87b3462d6562b34ac7e02c685c1ef
2007-07-26 22:04:33 -07:00
Gabe Black
7d826f632c
Implement NOT
...
--HG--
extra : convert_revision : 09cbed6332224d06644d401f21178eb7914993df
2007-07-26 22:03:19 -07:00
Steve Reinhardt
6b73ff43ff
Have owner respond to UpgradeReq to avoid race.
...
--HG--
extra : convert_revision : 30916fca6978c73d8a14558f2d7288c1eab54ad4
2007-07-26 17:04:17 -07:00
Steve Reinhardt
c3bf59dcb9
Add downward express snoops for invalidations.
...
--HG--
extra : convert_revision : 4916fa9721d727d8416ad8c07df3a8171d02b2b4
2007-07-26 17:04:17 -07:00
Steve Reinhardt
f1b5c8fb57
Continue snooping after a writeback is encountered.
...
--HG--
extra : convert_revision : 8411338a6c0fdd7072dd32bdffacdace62d5de90
2007-07-26 17:04:16 -07:00
Steve Reinhardt
58250b8e5f
bus: Fix default port handling.
...
--HG--
extra : convert_revision : 121b6e31cddff17c51fc4f3df20e7e2bde87d04f
2007-07-26 17:04:12 -07:00
Nathan Binkert
19c01e82b1
Add a new SCons option called EXTRAS that allows you to include stuff in
...
the build process that is outside of the main M5 tree.
--HG--
extra : convert_revision : 6edc4fbc58240f83b59c7b5707c0390cdb85d9ec
2007-07-25 18:21:11 -07:00
Steve Reinhardt
c1097d06f7
Can't block on memInhibit packets
...
(now that bus no longer filters them for us).
--HG--
extra : convert_revision : 34e7eaf5ee1e739f5557a2d417e569ed2ceb14b3
2007-07-25 07:47:37 -07:00
Steve Reinhardt
de52eebd3b
Integrate snoop loop functions into their respective call sites.
...
Also some additional cleanup of Bus::recvTiming().
--HG--
extra : convert_revision : 156814119f75d04c2e954aec2d7ed6fdc186c26f
2007-07-24 22:37:41 -07:00
Steve Reinhardt
d094f9cf27
Don't delete request at target... requester still needs it.
...
--HG--
extra : convert_revision : 76377ca2e4d7ea70d1d54d325a63ce710e260b93
2007-07-24 22:36:10 -07:00
Gabe Black
26b1c455e0
Merge with head.
...
--HG--
extra : convert_revision : 4a34b3f91c4fc90055596245ae3efec45ea33888
2007-07-24 15:48:40 -07:00
Gabe Black
02c39000bf
Hook in a bunch of new instructions, fix a few minor bugs, and expand out one of the prefix multiplexed opcode groups.
...
--HG--
extra : convert_revision : b5afd54a180a8fbdf9a892b1a2316fcf0d11afc6
2007-07-24 15:43:38 -07:00
Gabe Black
93365f7d1a
Add a tgt_iovec structure to support writev, change the name of X86Linux to X86Linux64, add some syscalls.
...
--HG--
extra : convert_revision : 9c13e9c68f331fe6c4a9abd96f7aee0f064101fc
2007-07-24 15:42:11 -07:00
Gabe Black
4bb1c5ba0c
Add a special case for "test" which needs an immediate even though everything else with it's opcode doesn't.
...
Also made some spacing consistent.
--HG--
extra : convert_revision : 72a317f29c11705782e19840bef24354214d3143
2007-07-24 15:37:16 -07:00
Gabe Black
97c4258383
The groups of instructions hanging off opcode 71h, 72h, and 73h all need a byte immediate
...
--HG--
extra : convert_revision : 9559047adfec1490c2d40065442a579549624fcc
2007-07-24 15:19:02 -07:00
Gabe Black
69f4a6dc86
Make the shift and rotate microops mask the shift/rotate amount correctly.
...
--HG--
extra : convert_revision : 31c5d3fa8ef0d37494d0e35cef31be6056d5d93f
2007-07-24 15:10:53 -07:00
Gabe Black
15f57bd7cb
Fix immediate shifts. Implement register shifts.
...
--HG--
extra : convert_revision : 0b83422ad3c190021e46cada07e64d8d57d29859
2007-07-24 15:10:20 -07:00
Gabe Black
66911a1fab
Fix immediate rotates and add register ones.
...
--HG--
extra : convert_revision : a6b9cee59019ea0f906c8a8e76eeb2cd73093671
2007-07-24 15:08:56 -07:00
Gabe Black
d961846e8c
Clean out part of an old comment.
...
--HG--
extra : convert_revision : 6a6b2a06576ebe7383f7ce0e4e9f96bc96b84b56
2007-07-24 15:08:09 -07:00
Gabe Black
340ce8e680
Implement cmov.
...
--HG--
extra : convert_revision : 2e92623b53c1fe8b4da3fef3486c0dcd8d5ef9f5
2007-07-24 15:07:35 -07:00
Gabe Black
28614addff
Implement cdqe and cqo, which are also called cbw and cwde, and cwd and cdq respectively, depending on the operand size.
...
--HG--
extra : convert_revision : 67ac035c68608d7260c21ce32009b344f3834e46
2007-07-24 15:07:03 -07:00
Gabe Black
f8f7f994b8
Implement setcc.
...
--HG--
extra : convert_revision : 7a47b9971fe9e4ac638b275fb56fdcba08c2d671
2007-07-24 15:05:17 -07:00
Gabe Black
1cec0a3249
Get rid of an old comment.
...
--HG--
extra : convert_revision : 1b86a7f60489bc65a03919b27afd4dfbe4e09bba
2007-07-24 15:04:53 -07:00
Gabe Black
7e52393432
Get rid of an old comment
...
--HG--
extra : convert_revision : 4d626721ad54af9cbf5b0c07a3a6e8a05e4e9ab5
2007-07-24 15:03:43 -07:00
Steve Reinhardt
1f9ea6e122
A couple more minor bug fixes for multilevel coherence.
...
--HG--
extra : convert_revision : 370f9e34911157765be6fd49e826fa1af589b466
2007-07-23 22:28:40 -07:00
Nathan Binkert
abc76f20cb
Major changes to how SimObjects are created and initialized. Almost all
...
creation and initialization now happens in python. Parameter objects
are generated and initialized by python. The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.
--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23 21:51:38 -07:00
Gabe Black
ecf2621f4f
Implement pusha, popa, three operand imul, hook them into the decoder, and clean up the decoder a little.
...
--HG--
extra : convert_revision : c1b8f0f433f629e4104e2b04addcdaabf57595e3
2007-07-23 11:20:57 -07:00
Steve Reinhardt
97f7ee2e50
Fix WriteReq/StoreCondReq setting in O3.
...
--HG--
extra : convert_revision : b41571535f3d1f78df3cb6e48c16de5c7549d87f
2007-07-23 08:18:51 -07:00
Steve Reinhardt
82e2a35576
Replace lowerMSHRPending flag with more robust scheme
...
based on following Packet senderState links.
--HG--
extra : convert_revision : 9027d59bd7242aa0e4275bf94d8b1fb27bd59d79
2007-07-22 21:43:38 -07:00
Gabe Black
85f9415a67
Make the operand size reflect the size specifier on the operand tags, and implement NEG
...
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
2007-07-23 01:07:49 +00:00
Steve Reinhardt
d5c74657c9
Merge more changes in from head.
...
--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72
2007-07-22 08:10:59 -07:00
Steve Reinhardt
1c2d5f5e64
Replace DeferredSnoop flag with LowerMSHRPending flag.
...
Turns out DeferredSnoop isn't quite the right bit of info
we needed... see new comment in cache_impl.hh.
--HG--
extra : convert_revision : a38de8c1677a37acafb743b7074ef88b21d3b7be
2007-07-22 08:09:24 -07:00
Steve Reinhardt
03730edc45
Merge Gabe's changes with mine.
...
--HG--
extra : convert_revision : f50ed42e7acb3f11e610fd6976eaa8df0c6ba2ab
2007-07-22 10:40:45 -04:00
Steve Reinhardt
1edd143b68
A few minor non-debug compilation issues.
...
--HG--
extra : convert_revision : d59a5cad6187a2229dddd1a48282ebd2923d1d8d
2007-07-22 03:07:26 -04:00
Gabe Black
2cd454d102
Add the "open" syscall.
...
--HG--
extra : convert_revision : d405ed5d3738639809dd2887955db9253138ccbb
2007-07-22 02:43:03 +00:00
Gabe Black
47b0242618
Fixed immediate byte accounting bug.
...
--HG--
extra : convert_revision : ee5275da14a2923b9a525ae5b5c582c15df4608a
2007-07-22 02:34:52 +00:00
Gabe Black
bff4f765f5
Fixed displacement size bug.
...
--HG--
extra : convert_revision : c39249ef598c1bd555098d688381dc62541a07c0
2007-07-22 02:23:03 +00:00
Gabe Black
f7ff068b30
Implemented and hooked in xchg, rotate with carry, and ret instructions
...
--HG--
extra : convert_revision : a8e67b0ab4072308f01e0df7f7ee05b31f605a35
2007-07-21 19:29:39 -07:00
Gabe Black
ee6fbdc28b
Implement rotate with carry microops.
...
--HG--
extra : convert_revision : 1d7ff6611e5b4766a5257c1e73681fabbe5f6d76
2007-07-21 19:27:38 -07:00
Steve Reinhardt
92ce2b5974
Deal with invalidations intersecting outstanding upgrades.
...
If the invalidation beats the upgrade at a lower level
then the upgrade must be converted to a read exclusive
"in the field".
Restructure target list & deferred target list to
factor out some common code.
--HG--
extra : convert_revision : 7bab4482dd6c48efdb619610f0d3778c60ff777a
2007-07-21 18:18:42 -07:00
Steve Reinhardt
9117860094
Several more fixes for multi-level timing coherence.
...
- Add "deferred snoop" flag to Packet so upper-level caches
can distinguish whether lower-level cache request was
in-service or not at the time of the original snoop.
- Revamp response handling to properly handle deferred snoops
on non-cache-fill requests (i.e. upgrades).
- Make sure forwarded writebacks are kept in write buffer at
lower-level caches so they get snooped properly.
--HG--
extra : convert_revision : 17f8a3772a1ae31a16991a53f8225ddf54d31fc9
2007-07-21 13:45:17 -07:00
Gabe Black
fc1b7d62b7
Fixed the distinction between far and near versions of jmp, call and ret. Implemented some shifts, rotates, and pushes.
...
--HG--
extra : convert_revision : fcb06189ff213e82da16ac43231feb308cb3a285
2007-07-20 23:16:03 -07:00
Gabe Black
009df5ff1e
Fixed line number accounting
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--HG--
extra : convert_revision : 4c046493b98ce4a766c2121710d70650cb6a801e
2007-07-20 23:12:26 -07:00
Gabe Black
75f6c6a016
Implement UD2 and replace the place holder in the decoder.
...
--HG--
extra : convert_revision : 16d0d2b2ddad8759698fa4aa668c22063307c72b
2007-07-20 18:27:02 -07:00
Gabe Black
8dd93f32e4
Make the "name" function const.
...
--HG--
extra : convert_revision : eb71bc3edd92a544a5333786635fce550aaef233
2007-07-20 18:24:46 -07:00
Gabe Black
9093cb79a1
Implement adc and sbb instructions and microops.
...
--HG--
extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa
2007-07-20 17:17:11 -07:00
Gabe Black
c3669b8925
Implement the rest of the conditional jump instructions and hook them into the decoder.
...
--HG--
extra : convert_revision : 8d1d6abce29371def560e1c3f31dabb4de01366f
2007-07-20 17:02:39 -07:00
Gabe Black
231cc3effb
Make the decoder take advantage of the new "B" operand format which takes a register index from the opcode itself.
...
--HG--
extra : convert_revision : 35f9be6559ee9833049eda1817982efdde7082be
2007-07-20 16:48:59 -07:00
Gabe Black
1ed6a8ed79
Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops.
...
--HG--
extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
2007-07-20 16:39:07 -07:00
Gabe Black
705a22b999
Hook in newly implemented instructions.
...
--HG--
extra : convert_revision : 53319d2363211af407dabaa2b63ad8a4df09c369
2007-07-20 15:05:37 -07:00
Gabe Black
dfcb2ffa46
Comment, implement, fix, and trim the move microassembly.
...
--HG--
extra : convert_revision : aa5ee7270e740bfbe42e70c4dfccc4c91ecacb33
2007-07-20 15:04:41 -07:00
Gabe Black
fcc23891bb
Implement jnbe.
...
--HG--
extra : convert_revision : cdbf1ff5ed3a63787cbd2187a8a3455a41cc5085
2007-07-20 15:03:36 -07:00
Gabe Black
79b3208aa5
Appended _NEAR to the near version of call and return.
...
--HG--
extra : convert_revision : 70adb38d59ff7b5d103e58a9f0773dfb911fec6d
2007-07-20 15:03:03 -07:00
Gabe Black
f09847c7a6
Make load and store ops use the appropriate sized data access.
...
--HG--
extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
2007-07-20 15:02:09 -07:00
Gabe Black
d926de462a
Implement the increment and decrement instructions, and the two operand form of signed multiplication.
...
--HG--
extra : convert_revision : d87df4b1b5470bed1d963dfe8e2ffa1403718342
2007-07-20 14:59:14 -07:00
Gabe Black
ec5f66190e
Fix code that computes displacement size.
...
--HG--
extra : convert_revision : a9be3eb2b90b88086936aeb4dcf87ec7b58a48cb
2007-07-20 14:57:34 -07:00
Gabe Black
5d882984d1
Add a bitfield to decode based on what prefixes are used.
...
--HG--
extra : convert_revision : 7ff4998b3249ccfe86ae9cbcc63fb910683707f5
2007-07-20 14:57:04 -07:00
Gabe Black
dcfaa348b1
Add a parameter type to read a register index from the opcode itself.
...
--HG--
extra : convert_revision : d2b5468ebf5df5a6ccadb57a30c52c8d16417b9a
2007-07-20 14:55:16 -07:00
Gabe Black
ee22bcd609
Fix function which calculates the carry flag.
...
--HG--
extra : convert_revision : aeb4f2d4c3936089421dbe80647f28ae36178283
2007-07-20 14:54:17 -07:00
Gabe Black
0baae59c09
Fix carry flag for subtracts, and clean up code slightly.
...
--HG--
extra : convert_revision : 668f5d5aeba888488b41284de6c72a0d055c4ef4
2007-07-20 14:53:38 -07:00
Gabe Black
0781609693
Fixed width parameter and provided a parameter to flip the carry bit on subtract.
...
--HG--
extra : convert_revision : d01bb791b000a2fdfc8600f8fb2f8aadd52b0b63
2007-07-20 14:52:44 -07:00
Gabe Black
cfadef74d1
x86 fixes
...
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.
--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
2007-07-19 15:15:47 -07:00
Gabe Black
09f056a1ef
Check for the two opcode prefix correctly and add in some instructions.
...
--HG--
extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97
2007-07-18 17:51:05 -07:00
Gabe Black
f6d326d6fc
Hook near returns into the decoder.
...
--HG--
extra : convert_revision : b38d4417552991e44f5d1de1f35d5d1ad8f32340
2007-07-18 17:48:16 -07:00
Gabe Black
dbf361128a
Implement near returns.
...
--HG--
extra : convert_revision : 3d6e8a976d31cb016a4b78200716b0ece155137a
2007-07-18 17:47:40 -07:00
Gabe Black
99310a1d93
Make instructions that conditionally set registers set them to their old value if they don't actually execute.
...
--HG--
extra : convert_revision : 36e63dd0c6ac1a3e1133c7985cf5507b83e9ee45
2007-07-18 17:46:38 -07:00
Gabe Black
776283cff8
Fix the overload which prints ExtMachInst in X86.
...
--HG--
extra : convert_revision : 2ef8ee71999f36b09270ba9526c2846beda65051
2007-07-18 17:45:43 -07:00
Gabe Black
05a33a443f
Make store microops actually store instead of load.
...
--HG--
extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
2007-07-18 17:45:06 -07:00
Gabe Black
e209fce9de
Fix a comment to refer to the right type of instruction.
...
--HG--
extra : convert_revision : dd441d8fbaed1ed8b2b66e3ad0275009bd4dcef4
2007-07-18 17:44:12 -07:00
Gabe Black
17f3da6c29
Fix the panic in the "error" format for x86,
...
--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
2007-07-18 17:43:30 -07:00
Gabe Black
6c54b654a8
Implement some forms of add.
...
--HG--
extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7
2007-07-18 16:33:56 -07:00
Gabe Black
bafb7ee5c1
Fix the operand types in a section of the decoder.
...
--HG--
extra : convert_revision : c37600fd65b44817eed2ba653f9d4f08a9869874
2007-07-18 16:26:52 -07:00
Gabe Black
b949458d4c
Make the data size used by regops overridable in the microassembly.
...
--HG--
extra : convert_revision : 84d850aa5340c9d02d03502704b063215f6e2140
2007-07-18 16:26:17 -07:00
Gabe Black
387f00e3dd
Fill out the miscreg file and add types to miscregs.hh
...
--HG--
extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
2007-07-18 16:12:39 -07:00
Gabe Black
5cca5ca3d9
Hook x86 nop into the decoder.
...
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
2007-07-18 16:11:52 -07:00
Gabe Black
d21c16fd37
Fix a compilation error for SubBitUnions,
...
--HG--
extra : convert_revision : aad9388afe81ba6541d0b18fa9777e6ffcfd871c
2007-07-18 16:11:16 -07:00
Gabe Black
3bd42af99e
Implement the x86 nop to be a "fault" microop which returns "NoFault".
...
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
2007-07-18 16:10:44 -07:00
Gabe Black
dffc40ff62
Add a generateDisassembly function to the MicroFault StaticInst.
...
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
2007-07-18 16:09:35 -07:00
Gabe Black
6fbcb225af
Make name, isMachineCheckFault, and isAlignmentFault const.
...
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
2007-07-18 16:09:00 -07:00
Gabe Black
85f32920fb
Calculate the correct address size.
...
--HG--
extra : convert_revision : 6bd9d5a01ba6600781e3678e0403dca524fb2cba
2007-07-17 20:54:55 -07:00
Gabe Black
e524240d68
Make disassembled x86 register indices reflect their size.
...
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.
--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
2007-07-17 18:12:33 -07:00
Gabe Black
2e80f71dcd
Implemented jnz.
...
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
2007-07-17 16:55:33 -07:00
Gabe Black
62ffc71fab
Use limm to set up immediate value for subtract instruction.
...
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
2007-07-17 16:50:13 -07:00
Gabe Black
d77d4c04b7
Implement the jz instruction.
...
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
2007-07-17 15:36:45 -07:00
Gabe Black
c4004482a5
Make "test" set some condition codes.
...
It still needs to zero the overflow and carry flags to be correct.
--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
2007-07-17 15:35:34 -07:00
Gabe Black
a6757095c3
Add in support for condition code flags.
...
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.
--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
2007-07-17 15:33:18 -07:00
Gabe Black
cf846d5205
Add in operand which holds the condition code bits of the flag register.
...
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
2007-07-17 15:28:48 -07:00
Gabe Black
bbf7163dd9
Add symbols for each of the flags a microop could set and each condition it could check.
...
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
2007-07-17 15:27:28 -07:00
Gabe Black
cbc24d6600
Actually include miscregs.hh
...
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
2007-07-17 13:30:23 -07:00
Gabe Black
b0643a08a3
Create a file to describe misc registers.
...
Define bitfields, indices, etc.
--HG--
extra : convert_revision : 8fffdc4cf796d304b12b317d8bddf5685bd50cf4
2007-07-17 13:29:40 -07:00
Gabe Black
8f3153ffb3
Create a file of functions for computing condition codes.
...
These haven't been very thuroughly tested, so use at your own risk.
--HG--
extra : convert_revision : 938885d36fea4a99f8228cdf195a0e0a38dd9031
2007-07-17 13:28:03 -07:00
Gabe Black
aad11bf879
Add a spot for the condition code portion of the flag register.
...
This is stored in the integer register file so that it can be renamed, but it should be a misc reg.
--HG--
extra : convert_revision : eee48f24dd80b145f14427482047c4d8af2521ab
2007-07-17 13:26:06 -07:00
Gabe Black
13ccac1a3c
Add a conversion constructor so a bitunion can be initialized to a value.
...
Previously, the bitunion would need to be declared and then assigned to separately.
--HG--
extra : convert_revision : d229bd83bc7baeca2259d4e7b080f359915015f3
2007-07-17 13:23:42 -07:00
Steve Reinhardt
a67a0025b3
Make sure responses never get blocked.
...
--HG--
extra : convert_revision : 29f359d743994a94dc403aa0621ba72cd137d1a1
2007-07-17 08:15:23 -07:00
Steve Reinhardt
a25f3ac67f
Forward cache-to-cache responses through other caches.
...
--HG--
extra : convert_revision : 5b6a02255bccd98b00949703cf4ba4b221553cea
2007-07-17 06:33:28 -07:00
Steve Reinhardt
ff13827ccb
Assert that an mshr has a target in getTarget().
...
--HG--
extra : convert_revision : 08091670fc319876012ed139fcd2584c364a980c
2007-07-17 06:23:11 -07:00
Steve Reinhardt
f67c8b33cc
Fix bug with timing snoop upcalls to MemTest object.
...
--HG--
extra : convert_revision : 1940a5d231b4f856cf69578f68ea98435824dbd8
2007-07-15 21:03:12 -07:00
Steve Reinhardt
884807a68a
Fix up a bunch of multilevel coherence issues.
...
Atomic mode seems to work. Timing is closer but not there yet.
--HG--
extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f
2007-07-15 20:11:06 -07:00
Steve Reinhardt
f790f34fe3
Make Bus::findPort() a little more useful.
...
Move check for loops outside, since half the call sites
end up working around it anyway. Return integer port ID
instead of port object pointer.
--HG--
extra : convert_revision : 4c31fe9930f4d1aa4919e764efb7c50d43792ea3
2007-07-15 20:09:03 -07:00
Steve Reinhardt
9172876dd7
Fix problem with unset max_loads in memtest.
...
Also make default 0, and make that mean run forever.
--HG--
extra : convert_revision : 3e60a52b1c5e334a9ef3d744cf7ee1d851ba4aa9
2007-07-15 14:32:55 -07:00
Gabe Black
873b762d4b
Move bitunion code into it's own file.
...
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
2007-07-14 17:28:26 -07:00
Gabe Black
4f7809d5e6
Pull some hard coded base classes out of the isa description.
...
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-14 17:14:19 -07:00
Steve Reinhardt
15a51d0cae
Add CacheRepl trace flag and move a couple DPRINTFs to it.
...
--HG--
extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183
2007-07-14 13:28:52 -07:00
Steve Reinhardt
abd194df5c
Move a couple of DPRINTFs from Cache to CachePort.
...
--HG--
extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be
2007-07-14 13:16:58 -07:00
Steve Reinhardt
3b4ff75939
Fix bug in copying packet with static data pointer.
...
--HG--
extra : convert_revision : 2fcf99f050d73e007433c1db2475f2893c5961a0
2007-07-14 13:14:53 -07:00
Steve Reinhardt
288f9cf7d2
Merge from head.
...
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
2007-07-14 12:23:47 -07:00
Steve Reinhardt
e5ecfa2745
Disable PrintThreadInfo since it causes a panic when using VPtr.
...
See Flyspray #281 .
--HG--
extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
2007-07-14 12:22:04 -07:00
Steve Reinhardt
c2ee69d687
Make NO_FAST_ALLOC compile.
...
--HG--
extra : convert_revision : 80579a61eb8d220e75cdee11bc09ca985c8fd85c
2007-07-14 12:12:46 -07:00
Steve Reinhardt
a51e16dc89
Merge of DPRINTF fixes from head.
...
--HG--
extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
2007-07-14 12:09:37 -07:00
Steve Reinhardt
7cd6c7ee05
Fix & tweak DPRINTFs for tracediff w/new cache code.
...
Note that we should *not* print pointer values in DPRINTFs as
these needlessly clutter tracediff output.
--HG--
extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
2007-07-14 11:48:30 -07:00
Steve Reinhardt
4738649e32
Delete packets when we're done with them.
...
--HG--
extra : convert_revision : b8894d26e1ca7a6c9b736500accdaa53bfb09558
2007-07-03 00:40:31 -04:00
Steve Reinhardt
4b68652c87
Couple more minor bug fixes for FS timing mode.
...
src/cpu/simple/timing.cc:
Fix another SC problem.
src/mem/cache/cache_impl.hh:
Forgot to call makeTimingResponse() on uncached timing responses.
--HG--
extra : convert_revision : 5a5a58ca2053e4e8de2133205bfd37de15eb4209
2007-07-02 13:57:45 -07:00
Steve Reinhardt
e9c04dad60
Fix a couple LL/SC bugs that only affected timing mode.
...
src/cpu/simple/timing.cc:
Fix swap/stq_c command bug.
src/mem/packet.cc:
Fix incorrect LoadLockedReq command response field.
--HG--
extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5
2007-07-02 09:26:36 -07:00
Steve Reinhardt
ffd697e149
bus.cc:
...
Fix atomic timing issue.
src/mem/bus.cc:
Fix atomic timing issue.
--HG--
extra : convert_revision : a22ff80cd75f83c785b0604c2a4fde2e2e9f71ef
2007-07-02 01:02:35 -07:00
Steve Reinhardt
3ad761bc8e
Make CPU models use new LoadLockedReq/StoreCondReq commands.
...
--HG--
extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
2007-06-30 20:35:42 -07:00
Steve Reinhardt
5e59739416
Don't propagate snoops across bridges. Wouldn't work anyway.
...
--HG--
extra : convert_revision : af29fc7d0c134f5e89dd2e814c819151350fcb38
2007-06-30 18:03:17 -07:00
Steve Reinhardt
07f091d6ed
Get rid of remaining traces of obsolete CoherenceProtocol object.
...
--HG--
extra : convert_revision : c5555b00bef1b304a84886188ad2c0dcb4d7c5b9
2007-06-30 17:59:45 -07:00
Steve Reinhardt
2447abe5ce
Can only call makeAtomicResponse() once...
...
--HG--
extra : convert_revision : c49aade46aa64f979da35eb653b544ee5bd82f01
2007-06-30 17:56:30 -07:00
Steve Reinhardt
d10a843723
Get rid of obsolete fixPacket() functions.
...
Handled by Packet::checkFunctional() now.
--HG--
extra : convert_revision : 63642254e2789c80a369ac269f317ec054ffe3c0
2007-06-30 17:51:29 -07:00
Steve Reinhardt
ee54ad318a
Event descriptions should not end in "event"
...
(they function as adjectives not nouns)
--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
2007-06-30 17:45:58 -07:00
Steve Reinhardt
f0c4dd7920
Factor out a little more common code.
...
--HG--
extra : convert_revision : 626255a91679d534030c91bcdb4fc1bed36ceb9b
2007-06-30 13:56:25 -07:00
Steve Reinhardt
6babda7123
Fix up a few statistics problems.
...
Stats pretty much line up with old code, except:
- bug in old code included L1 latency in L2 miss time, making it too high
- UniCoherence did cache-to-cache transfers even from non-owner caches,
so occasionally the icache would get a block from the dcache not the L2
- L2 can now receive ReadExReq from L1 since L1s have coherence
--HG--
extra : convert_revision : 5052c1a1767b5a662f30a88f16012165a73b791c
2007-06-30 13:34:16 -07:00
Steve Reinhardt
6ab53415ef
Get rid of Packet result field. Error responses are
...
now encoded in cmd field.
--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-06-30 10:16:18 -07:00
Steve Reinhardt
749126e011
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 1e94283da8007fce8e1a0f2849ce5d5a8dbbaffd
2007-06-29 13:03:36 -07:00
Korey Sewell
738ecc495b
fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions...
...
src/arch/mips/isa/decoder.isa:
commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
edit fp format
src/arch/mips/isa/formats/mem.isa:
fix for basic store instructions
--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
2007-06-29 15:13:50 -04:00
Steve Reinhardt
7f3dfa7c09
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : b1c954c187e3b3172a194396ba63808253121195
2007-06-28 08:28:58 -07:00
Korey Sewell
e28cbc98a0
o3cpu build for mips
...
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
2007-06-28 05:30:46 -04:00
Steve Reinhardt
9117c94f9c
Get rid of coherence protocol object.
...
--HG--
extra : convert_revision : 4ff144342dca23af9a12a2169ca318a002654b42
2007-06-27 20:54:13 -07:00
Steve Reinhardt
c4903e0882
Revamp replacement-of-upgrade handling.
...
--HG--
extra : convert_revision : 9bc09d8ae6d50e6dfbb4ab21514612f9aa102a2e
2007-06-26 23:30:30 -07:00
Steve Reinhardt
1b20df5607
Handle deferred snoops better.
...
--HG--
extra : convert_revision : 703da6128832eb0d5cfed7724e5105f4b3fe4f90
2007-06-26 22:23:10 -07:00
Steve Reinhardt
69ff6d9163
cache_impl.hh:
...
Change target overflow from assertion to warning.
src/mem/cache/cache_impl.hh:
Change target overflow from assertion to warning.
--HG--
extra : convert_revision : ceca990ed916bbf96dedd4836c40df522803f173
2007-06-26 18:01:22 -04:00
Steve Reinhardt
7dacbcf492
Handle replacement of block with pending upgrade.
...
src/mem/cache/tags/lru.cc:
Add some replacement DPRINTFs
--HG--
extra : convert_revision : 7993ec24d6af7e7774d04ce36f20e3f43f887fd9
2007-06-26 14:53:15 -07:00
Steve Reinhardt
f697e959a1
Couple minor bug fixes...
...
src/mem/cache/cache_impl.hh:
Handle grants with no packet.
src/mem/cache/miss/mshr.cc:
Fix MSHR snoop hit handling.
--HG--
extra : convert_revision : f365283afddaa07cb9e050b2981ad6a898c14451
2007-06-25 22:23:29 -07:00
Steve Reinhardt
529f12a531
Get rid of requestCauses. Use timestamped queue to make
...
sure we don't re-request bus prematurely. Use callback to
avoid calling sendRetry() recursively within recvTiming.
--HG--
extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140
2007-06-25 06:47:05 -07:00
Steve Reinhardt
47bce8ef78
Better handling of deferred targets.
...
--HG--
extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f
2007-06-24 17:32:31 -07:00
Steve Reinhardt
245b0bd9b9
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
src/base/traceflags.py:
Hand merge.
--HG--
extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
2007-06-23 13:26:30 -07:00
Steve Reinhardt
57ff2604e5
Minor fix plus new assertion to catch similar bugs.
...
src/cpu/memtest/memtest.cc:
Need to set packet source field so that response from cache
doesn't run into assertion failure when copying source to dest.
src/mem/packet.hh:
Copy source field when copying packets.
Assert that source is valid before copying it to dest
when turning packets around.
--HG--
extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8
2007-06-23 13:24:33 -07:00
Korey Sewell
ac19e0c505
FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality...
...
src/arch/isa_parser.py:
add back deleted writeback in Control Operand
--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565
add Control Bitfield class
...
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
2007-06-22 20:09:46 -04:00
Steve Reinhardt
ed1db23b41
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
2007-06-22 16:13:53 -07:00
Korey Sewell
753adb38d5
mips import pt. 1
...
src/arch/mips/SConscript:
"mips import pt.1".
--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro
--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
2007-06-22 17:44:33 -04:00
Steve Reinhardt
4d1bcbcd36
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 1da75335907fee2d1745ec13e515819dfe2aad89
2007-06-22 09:24:33 -07:00
Steve Reinhardt
bdd5fd20fb
Fixes to hitLatency, blocking, buffer allocation.
...
Single-cpu timing mode seems to work now.
--HG--
extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad
2007-06-22 09:24:07 -07:00
Gabe Black
70d6044527
Make symbols for regular registers.
...
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59
Get rid of an unnecessary include file.
...
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro
src/cpu/o3/fetch_impl.hh:
hand merge
--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
2007-06-21 20:35:25 +00:00
Gabe Black
470a6a9a74
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : ba4d93f354749d02278b16e78b4ecd4b2311416b
2007-06-21 20:35:23 +00:00
Steve Reinhardt
eff122797b
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920
2007-06-21 12:03:22 -07:00
Steve Reinhardt
83af0fdcf5
Getting closer...
...
configs/example/memtest.py:
Add progress interval option.
src/base/traceflags.py:
Add MemTest flag.
src/cpu/memtest/memtest.cc:
Clean up tracing.
src/cpu/memtest/memtest.hh:
Get rid of unused code.
--HG--
extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
2007-06-21 11:59:17 -07:00
Ali Saidi
5195500cdf
Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we don't spend so much time calling malloc()
...
--HG--
extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f
2007-06-21 13:50:35 -04:00
Gabe Black
25e385e0cf
Use the new symbols to clean up the assembler.
...
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053
Needed for last change set to work :P
...
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083
Define symbols for the x86 specialization of the microassembler.
...
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3
Fix a comment.
...
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa
Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols.
...
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958
Add in code that lays the ground work for setting flags.
...
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
2007-06-21 13:48:44 +00:00
Gabe Black
df7730b677
Fix compiler errors.
...
--HG--
extra : convert_revision : 2b10076a24cb36cb748e299011ae691f09c158cd
2007-06-20 19:46:45 -07:00
Gabe Black
77aa98d0f8
Implement rip relative addressing and put in some missing loads and stores.
...
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e
Fix a newly introduced bug where the predecoder wasn't picking up all the displacement.
...
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014
X86 probably doesn't need a window save area.
...
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c
Fix a typo in one of the operand type tags.
...
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1
Comment out some unnecessary debug output.
...
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282
Forgot to check these in...
...
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1
Comment out some unnecessary debug statements.
...
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
2007-06-20 19:04:38 +00:00
Gabe Black
0a971cc0c9
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : f2fac2b1a09e709021cd8382a9fbe805df2177ef
2007-06-20 19:04:37 +00:00
Vincentius Robby
4a7bc06553
Minor error.
...
--HG--
extra : convert_revision : 514032e21c8861f20fcbcae7204e132088cc7dbc
2007-06-20 15:04:36 -04:00
Vincentius Robby
d540dde5b4
Removed "adding instead of dividing" trick.
...
Caused slowdown in performance instead of speeding up.
src/cpu/base.cc:
Removed "adding instead of dividing" trick.
src/mem/bus.cc:
Fixed spelling in comments.
Removed "adding instead of dividing" trick.
--HG--
extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488
2007-06-20 14:54:17 -04:00
Nathan Binkert
f65e2710ec
Don't do checker stuff if the checker is not defined
...
--HG--
extra : convert_revision : 1c920b050c21e592a386410e4e9f45354f8e4441
2007-06-20 08:15:06 -07:00
Nathan Binkert
b47737dde7
Make sure all parameters have default values if they're
...
supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.
--HG--
extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
2007-06-20 08:14:11 -07:00
Nathan Binkert
438ec924d6
Don't go over 80 chars per line
...
--HG--
extra : convert_revision : ec73c3c8788757990a6fab8c600f3b353d0d4206
2007-06-20 08:12:10 -07:00
Gabe Black
a68ddf685c
Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh.
...
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro
src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
Hand merge
--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509
More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction.
...
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
2007-06-19 22:40:10 +00:00
Gabe Black
cc796de962
Missed an "offset" to get rid of.
...
--HG--
extra : convert_revision : 7542f130b269a6a09e6ed51ae4689d1faa45a155
2007-06-19 19:01:02 +00:00
Gabe Black
ea70e6d6da
Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
...
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
2007-06-19 18:17:34 +00:00
Gabe Black
d496492793
Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL.
...
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85
Make an error message a little more descriptive.
...
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70
Renovate the "fault" microop implementation.
...
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b
Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list.
...
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
2007-06-19 14:26:42 +00:00
Gabe Black
053c715f21
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
2007-06-19 14:18:46 +00:00
Gabe Black
6e286cddfa
Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
...
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a
Add a stack size bitfield and expose the mode component of the ExtMachInst.
...
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427
Add a function to print out segment names.
...
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
2007-06-19 14:14:17 +00:00
Ali Saidi
2d08ab0cc2
fix bug in timing cpu. getTime() is the time the requset was created, not the time it was repsonded to. In timing mode the
...
time it was responded to is curTick. Doesn't change the results, but it does make implementation of nextCycle() more difficult
--HG--
extra : convert_revision : 67ed6261a5451d17d96d5df45992590acc353afc
2007-06-18 18:11:07 -04:00
Gabe Black
7994fa9431
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : fd64f2de0051afdc51e833a7cbf7fa120b230cc3
2007-06-18 14:16:08 +00:00
Gabe Black
4ae284282e
Get rid of unnecessary output.
...
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937
Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
...
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
2007-06-18 14:15:00 +00:00
Steve Reinhardt
d69a763833
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
configs/example/memtest.py:
Hand merge redundant changes.
--HG--
extra : convert_revision : a2e36be254bf052024f37bcb23b5209f367d37e1
2007-06-17 17:30:24 -07:00
Steve Reinhardt
35cf19d441
More major reorg of cache. Seems to work for atomic mode now,
...
timing mode still broken.
configs/example/memtest.py:
Revamp options.
src/cpu/memtest/memtest.cc:
No need for memory initialization.
No need to make atomic response... memory system should do that now.
src/cpu/memtest/memtest.hh:
MemTest really doesn't want to snoop.
src/mem/bridge.cc:
checkFunctional() cleanup.
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.cc:
src/mem/cache/cache.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_builder.cc:
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/coherence_protocol.cc:
src/mem/cache/coherence/coherence_protocol.hh:
src/mem/cache/coherence/simple_coherence.hh:
src/mem/cache/miss/SConscript:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
src/mem/packet.cc:
src/mem/packet.hh:
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/tport.cc:
More major reorg. Seems to work for atomic mode now,
timing mode still broken.
--HG--
extra : convert_revision : 7e70dfc4a752393b911880ff028271433855ae87
2007-06-17 17:27:53 -07:00
Steve Reinhardt
f4babe1082
memtest.cc:
...
No need to initialize memory contents; should come up as 0.
src/cpu/memtest/memtest.cc:
No need to initialize memory contents; should come up as 0.
--HG--
extra : convert_revision : 1713676956f3d33b4686fee2650bd17027bcc495
2007-06-16 14:05:05 -07:00
Gabe Black
3ceb0a46ae
Add in some microregs.
...
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224
Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future.
...
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
2007-06-14 20:52:24 +00:00
Gabe Black
7213944110
Fix limm.
...
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b
Implement a handful more instructions and differentiate macroops based on the operand types they expect.
...
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc
Move the high byte register indices to the right place.
...
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf
Modified instruction decode method.
...
Make code compatible with new decode method.
src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
Modified instruction decode method.
--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
2007-06-14 16:52:19 -04:00
Gabe Black
cb7934f052
Fix an assert to allow rounding mode 0.
...
--HG--
extra : convert_revision : 119cc87ccf939d3a0048d87d18e125deca378bb7
2007-06-14 13:53:27 +00:00
Gabe Black
752199f827
Make POP special case its dataSize to default to 64 bits in 64 bit mode.
...
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81
Put the mode in the ExtMachInst.
...
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7
Get rid of an unnecessary debug statement.
...
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1
Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
...
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f
Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly.
...
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
2007-06-14 13:45:37 +00:00
Gabe Black
6641423a0b
A fix for SPARC_FS compilation.
...
--HG--
extra : convert_revision : 8af0dd9c16e7db8ed92f7a71c396841d5ae7e072
2007-06-14 13:27:08 +00:00
Gabe Black
cd8f604cc9
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst.
...
src/arch/x86/predecoder.cc:
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.
--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d
Fix the operand type tag parser to recognize multi character register names.
...
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9
Partially implement "POP"
...
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f
Move load/store microops into their own file. They still don't do anything, though.
...
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578
Fix the immediate version of register operations, and get their name to show up correctly.
...
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971
Minor comment fix up.
...
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
2007-06-12 17:35:11 +00:00
Gabe Black
02732929e8
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 1d2efac895a1c8328026a079e0b319a436325616
2007-06-12 17:19:14 +00:00
Gabe Black
0d8d3f988f
Make use of some of the REX prefix.
...
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5
Reset the rex and legacy prefix components of the ExtMachInst as well.
...
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c
Flesh out the bitfields for prefixes.
...
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531
Add in MOV instructions.
...
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e
Fix up a comment that wasn't changed over to x86.
...
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51
Get rid of unnecessary namespace prototype.
...
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b
Use objects to pass around output code, and fix/implement a few things.
...
src/arch/x86/isa/formats/multi.isa:
Make the formats use objects to pass around output code.
--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4
Add an address size bitfield to the isa description and the ExtMachInst
...
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb
Add some dprintfs
...
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab
Make microOp vs microop and macroOp vs macroop capitilization consistent.
...
src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-12 16:21:47 +00:00
Nathan Binkert
125237d357
Rename enum from OpType to OpClass so it's consistent with the
...
real thing. Also rename the null case to something that can
be a C++ symbol.
--HG--
extra : convert_revision : e3bfc4065b59c21f613e486d234711c48d7c9070
2007-06-11 23:10:58 -07:00
Nathan Binkert
961f8382f6
Add a function to get a SimObject's memory mode and rework
...
the set memory mode code to only go through the change if
it is necessary
--HG--
extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
2007-06-10 13:52:21 -07:00
Nathan Binkert
fc4ab050b4
Add a startup function that will fast forward to the right clock edge
...
using a divide in order to not loop forever after resuming from a checkpoint
--HG--
extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a
2007-06-09 23:01:47 -07:00
Nathan Binkert
11f1c8dd3e
Use the right type
...
--HG--
extra : convert_revision : b5ca3153ca786ea4e86bfe83f7760ba9ee41a882
2007-06-09 23:00:13 -07:00
Nathan Binkert
9f75ac783b
only compile fenv.c if we're using fenv
...
--HG--
extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
2007-06-09 22:59:33 -07:00
Nathan Binkert
e9936a6250
More realistic parameters
...
--HG--
extra : convert_revision : aaa4ea2b7c97df3d6b731e9252984b45715e9d6f
2007-06-09 22:43:08 -07:00
Gabe Black
1493ceda8f
Fix another outdated comment.
...
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d
Adjust a few more comments.
...
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef
Fix up a potentially misleading comment.
...
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea
Fix the formatting on a comment.
...
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990
Clean up where files are included, and get rid of some cruft.
...
src/arch/x86/isa/main.isa:
Clean up where files are included.
--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3
Clean things up a little.
...
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
2007-06-08 17:06:34 +00:00
Gabe Black
5f0d82baeb
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
2007-06-08 16:13:45 +00:00
Gabe Black
8bd213b3b8
Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
...
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4
Big changes to use the new microcode assembler.
...
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16
Fixed format arguments for XOR.
...
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7
Add a bitfield to refer to the opSize member of the extMachInst.
...
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
2007-06-08 16:06:22 +00:00
Ali Saidi
c5a946efea
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
2007-06-05 01:03:43 -04:00
Ali Saidi
85986e9dff
Clean up some of vincent's code and commit it
...
Makes page table cache scheme actually work
src/mem/page_table.cc:
src/mem/page_table.hh:
fix caching scheme to actually work and improve performance
--HG--
extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
2007-06-05 01:03:35 -04:00
Gabe Black
dba02f703b
Make limm (load immediate) microop
...
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
2007-06-04 19:53:06 +00:00
Gabe Black
ddbc26c85e
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
2007-06-04 19:53:05 +00:00
Ali Saidi
42174babbb
don't be so aggressive with the tracing on #if
...
--HG--
extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
2007-06-04 15:53:04 -04:00
Gabe Black
41bc0fc5b2
Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile.
...
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
2007-06-04 15:59:20 +00:00
Gabe Black
e47f1667b6
Don't mask the pc because the Alpha predecoder needs it to set the PAL mode bit in the ExtMachInst.
...
--HG--
extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
2007-06-02 03:41:47 +00:00
Nathan Binkert
aba2eeaf8f
Fix typo so m5.fast will compile
...
--HG--
extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
2007-06-01 20:41:46 -07:00
Ali Saidi
66ee27078e
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
2007-06-01 14:55:17 -04:00
Ali Saidi
be0aef9819
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
src/cpu/simple/base.cc:
hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int
--HG--
extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
2007-06-01 14:18:45 -04:00
Ali Saidi
d8f6769962
cast sizeof(MachInst) to Addr before generating a mask
...
--HG--
extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
2007-06-01 14:16:58 -04:00
Ali Saidi
d8c487c401
don't generate trace data unless tracing is on
...
--HG--
extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
2007-06-01 13:44:24 -04:00
Gabe Black
6e8a06b237
Clean things up
...
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
2007-06-01 16:24:51 +00:00
Gabe Black
85caab4e8c
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
2007-06-01 16:24:50 +00:00
Vincentius Robby
a7fe9345ee
Minor error. Forgotten to remove brackets for threadPC.
...
--HG--
extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
2007-06-01 12:24:49 -04:00
Gabe Black
a703fdfcf9
Add a second section to make sure the ROM is extended properly.
...
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12
Add rom based macroops into the macroop dict instead of dropping them on the floor
...
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
2007-05-31 22:21:20 +00:00
Gabe Black
287446396c
Do something with ROM based macroops
...
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21
Make directives take parameters and use the directive function and not it's name
...
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f
Handle comments
...
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
2007-05-31 20:45:05 +00:00
Gabe Black
c432588981
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
src/cpu/simple/base.cc:
Hand merge
--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
2007-05-31 20:45:04 +00:00
Vincentius Robby
83aa742d26
Merge zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem
--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
2007-05-31 16:02:31 -04:00
Vincentius Robby
ecf1eb7248
Assign traceData to be NULL at BaseSimpleCPU constructor.
...
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/arch/sparc/miscregfile.cc:
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2
Early micro assembler
...
src/arch/micro_asm.py:
Micro assembler
src/arch/micro_asm_test.py:
Test script for the micro assembler. This probably should go somewhere else eventually.
--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2
x86 work that hadn't been checked in.
...
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
Fix the immediate size table
src/arch/x86/regfile.cc:
nextnpc is bogus
--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-05-31 13:50:35 +00:00
Nathan Binkert
7797a239cc
Fix cut-n-pasto to make the path correct
...
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
2007-05-30 17:19:20 -07:00
Steve Reinhardt
a9b7c558fd
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 26921dad179699b7868768361143aaa8d790b8fc
2007-05-29 22:59:20 -07:00
Steve Reinhardt
4e65d2678d
tport.cc:
...
Oops... forgot to update call site after changing
function argument semantics.
src/mem/tport.cc:
Oops... forgot to update call site after changing
function argument semantics.
--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
2007-05-30 01:53:28 -04:00
Steve Reinhardt
94c19ad37d
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 72c6f2ce7e9e2b46e59711a2c3cfe770c243018e
2007-05-29 22:25:57 -07:00
Steve Reinhardt
365e4ac374
A little more cleanup & refactoring of SimpleTimingPort.
...
Make it a better base class for cache ports.
--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
2007-05-29 22:23:41 -07:00
Steve Reinhardt
05915ed6f7
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 6f462916cb0eb309b6799e94fbf07629abb50eba
2007-05-28 08:13:40 -07:00
Steve Reinhardt
41f6cbce9a
Restructure SimpleTimingPort a bit:
...
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability
--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
2007-05-28 08:11:43 -07:00
Steve Reinhardt
04ac944920
Reformat comments to meet line length restriction.
...
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
2007-05-28 08:04:33 -07:00
Steve Reinhardt
07bda077f2
Remove unnecessary include of physical.hh.
...
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
2007-05-28 08:03:13 -07:00
Steve Reinhardt
075f4b108a
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : fba7efd444e1ca9738385dd4662a33feab357e79
2007-05-27 21:34:37 -07:00
Nathan Binkert
35147170f9
Move SimObject python files alongside the C++ and fix
...
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.
--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Steve Reinhardt
6a48f6b67d
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : f940480672861185a494f3fae1bfca13d31fed9f
2007-05-26 20:15:35 -07:00
Nathan Binkert
4f0f217c1b
Get rid of GNU libelf and its autoconf nastiness and replace
...
it with FreeBSD's implementation
--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
2007-05-26 18:15:22 -07:00
Steve Reinhardt
87bb4c3792
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : c2540bfd34eb5a6f41cb15ffe50f8ec72f80abb1
2007-05-26 17:10:35 -07:00
Gabe Black
a3ae9486d5
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89
Make the lexer and parser use objects and not the last lexer and parser generated.
...
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2
Update to ply 2.3
...
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
Import patch ply.diff
src/arch/isa_parser.py:
everything is now within the ply package
--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
2007-05-24 21:54:51 -07:00
Steve Reinhardt
da46364b18
Fix getDeviceAddressRanges() to get snooping right.
...
--HG--
extra : convert_revision : 2aeab25ef955ab9db7b968786faff227239fbbe4
2007-05-22 07:30:55 -07:00
Steve Reinhardt
0484867d85
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
src/mem/cache/base_cache.hh:
Manual conflict resolution.
--HG--
extra : convert_revision : 5ebfd7abb4f978caa88bf43d25935869edfc6b9f
2007-05-22 06:36:01 -07:00
Steve Reinhardt
41dde5f6fd
memtest.hh:
...
Fix description string.
Minor whitespace cleanup.
src/cpu/memtest/memtest.hh:
Fix description string.
Minor whitespace cleanup.
--HG--
extra : convert_revision : 0c7213d088da46de9713ca6beabc30523ccb1c8c
2007-05-22 06:32:24 -07:00
Steve Reinhardt
9048c695a0
Another pass of minor changes in preparation for new protocol.
...
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/simple_coherence.hh:
Get rid of old invalidate propagation logic in preparation
for new multilevel snoop protocol.
src/mem/cache/coherence/coherence_protocol.cc:
L2 cache now has protocol, so protocol must handle ReadExReq
coming in from the CPU side.
src/mem/cache/miss/mshr_queue.cc:
Assertion is failing, so let's take it out for now.
src/mem/packet.cc:
src/mem/packet.hh:
Add WritebackAck command.
Reorganize enum to put responses next to corresponding requests.
Get rid of unused WriteReqNoAck.
--HG--
extra : convert_revision : 24c519846d161978123f9aa029ae358a41546c73
2007-05-22 06:29:48 -07:00
Steve Reinhardt
41241799ae
Change getDeviceAddressRanges to use bool for snoop arg.
...
--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
2007-05-21 23:36:09 -07:00
Steve Reinhardt
0a02e3a764
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : a8efe71a50b9ae480c5ad0aabd7aa9ba22bc2968
2007-05-20 23:05:02 -07:00
Steve Reinhardt
05d14cf3e2
Add new EventWrapper constructor that takes a Tick value
...
and schedules the event immediately.
--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
2007-05-20 21:43:01 -07:00
Steve Reinhardt
87adc37e91
Insist that PhysicalMemory object have at least one connection.
...
--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc
2007-05-20 18:23:05 -07:00
Steve Reinhardt
dcce351eaa
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
src/mem/bridge.cc:
SCCS merged
--HG--
extra : convert_revision : 9492be56a305afe88f28a77c3b23e80ce6aa81b3
2007-05-18 22:37:32 -07:00
Steve Reinhardt
792d5b9e5e
First set of changes for reorganized cache coherence support.
...
Compiles but doesn't work... committing just so I can merge
(stupid bk!).
src/mem/bridge.cc:
Get rid of SNOOP_COMMIT.
src/mem/bus.cc:
src/mem/packet.hh:
Get rid of SNOOP_COMMIT & two-pass snoop.
First bits of EXPRESS_SNOOP support.
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/prefetch/base_prefetcher.cc:
Big reorg of ports and port-related functions & events.
src/mem/cache/cache.cc:
src/mem/cache/cache_builder.cc:
src/mem/cache/coherence/SConscript:
Get rid of UniCoherence object.
--HG--
extra : convert_revision : 7672434fa3115c9b1c94686f497e57e90413b7c3
2007-05-18 22:35:04 -07:00
Steve Reinhardt
aa5b595f39
Oops... some places in C++ explicitly ask for a "functional"
...
port. It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.
--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d
2007-05-19 01:20:58 -04:00
Steve Reinhardt
0305159abf
PhysicalMemory has vector of uniform ports instead of one special one.
...
configs/example/memtest.py:
PhysicalMemory has vector of uniform ports instead of one special one.
Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
Add comment.
--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
2007-05-19 00:24:34 -04:00
Gabe Black
a13d5af274
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
2007-05-18 13:36:47 -07:00
Gabe Black
6a6e62014e
Changes to make simple cpu handle pcs appropriately for x86
...
--HG--
extra : convert_revision : cf68886d53301e0a63705247bd7d66b2ff08ea84
2007-05-18 10:42:50 -07:00
Ali Saidi
f487edf146
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 32dc1bec7fdb1ecb8879ed2dd745c4b23929aeab
2007-05-15 18:06:52 -04:00
Ali Saidi
f317227b4e
hopefully the final hacky change to make the bus bridge work ok
...
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here
src/mem/bridge.cc:
src/mem/bridge.hh:
hopefully the final hacky change to make the bus bridge work ok
--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c
2007-05-15 17:39:50 -04:00
Steve Reinhardt
224ae7813d
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 8a501917daf81021212d136b4ebbfa059b452a13
2007-05-14 13:54:22 -07:00
Ali Saidi
fcf85725b5
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : e445097240af7b4e73efaca855cd1f217cf00313
2007-05-14 16:37:22 -04:00
Ali Saidi
57104ea5f9
couple more bug fixes for intel nic
...
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
couple more bug fixes
--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
2007-05-14 16:37:00 -04:00
Ali Saidi
ea4e6f2e3d
add uglyiness to fix dmas
...
src/dev/io_device.cc:
extra printing and assertions
src/mem/bridge.hh:
deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
make the cache try to satisfy a functional request from the cache above it before checking itself
--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
2007-05-14 16:14:59 -04:00
Steve Reinhardt
fecae03a0b
Eliminate unused PacketPtr from BaseCache's
...
RequestEvent and ResponseEvent.
Compiles but not tested.
--HG--
extra : convert_revision : cc791e7adea5b0406e986a0076edba51856b9105
2007-05-13 23:09:10 -07:00
Steve Reinhardt
df3fc36fa9
Split BaseCache::CacheEvent into RequestEvent and ResponseEvent.
...
Compiles but not tested.
--HG--
extra : convert_revision : 4e1e28c4b87721ccfcf35a5ea62c1fa324acbaf9
2007-05-13 22:58:06 -07:00
Ali Saidi
af26532bbd
fix handling of atomic packets
...
fix up code for counting requests and responses
--HG--
extra : convert_revision : 0d70981ee41c5d9c36cad01bd505281a096f6119
2007-05-13 01:44:42 -04:00
Gabe Black
debf04aef1
Make sure all addresses used in syscalls are truncated to 32 bits. Actually -all- arguements are truncated to 32 bits, but we should be able to get away with it.
...
--HG--
extra : convert_revision : 3b8766c68a4ab36e2e769fac4812657f3f7e0d1c
2007-05-12 15:11:44 -07:00
Nathan Binkert
011db5c851
Move full CPU sim object stuff into the encumbered directory
...
--HG--
extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c
2007-05-11 15:01:44 -07:00
Nathan Binkert
113319a7da
Float should have a c++ param type
...
--HG--
extra : convert_revision : 150bbe7f31aafb43a75195fc2a365fb3c0ec5673
2007-05-11 11:48:58 -07:00
Nathan Binkert
d667ce01b4
total should be the sum of the vector result of an operation,
...
not sum the operands and then apply the operation.
--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09
2007-05-11 11:47:18 -07:00
Ali Saidi
634d2e9d83
remove hit_latency and make latency do the right thing
...
set the latency parameter in terms of a latency
add caches to tsunami-simple configs
configs/common/Caches.py:
tests/configs/memtest.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
set the latency parameter in terms of a latency
configs/common/FSConfig.py:
give the bridge a default latency too
src/mem/cache/cache_builder.cc:
src/python/m5/objects/BaseCache.py:
remove hit_latency and make latency do the right thing
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
add caches to tsunami-simple configs
--HG--
extra : convert_revision : 37bef7c652e97c8cdb91f471fba62978f89019f1
2007-05-10 18:24:48 -04:00
Gabe Black
6d199f0b25
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.mwconnections.com:/home/gblack/newmem-o3-micro
--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
2007-05-09 22:04:58 -07:00
Ali Saidi
e08a5c6052
Merge zizzer:/bk/newmem
...
into pb15.local:/Users/ali/work/m5.newmem.zeep
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
the new version of this is what we want
--HG--
extra : convert_revision : 204df6f8181df81e423def4695cd81544c485c47
2007-05-10 00:36:47 -04:00
Ali Saidi
4a37c48e8e
add/update parameters for bus bridge
...
--HG--
extra : convert_revision : 063f757fbfa2c613328ffa70e556f8926623fa91
2007-05-10 00:08:22 -04:00
Gabe Black
4ad1b58fdd
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.mwconnections.com:/home/gblack/newmem-o3-micro
--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
2007-05-09 20:50:46 -07:00
Ali Saidi
69ea50c163
couple of updates in the intel nic
...
--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
2007-05-09 22:39:43 -04:00
Ali Saidi
9dfbea68a2
update for new reschedule semantics
...
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09 22:34:54 -04:00
Ali Saidi
ff55888575
undo my previous bus change, it can make the bus deadlock.. so it still constantly reschedules itself
...
--HG--
extra : convert_revision : b5ef1aa0a6a2e32bd775d2dbcad9cd9505ad9b78
2007-05-09 22:23:01 -04:00
Ali Saidi
3c608bf765
add a backoff algorithm when nacks are received by devices
...
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge
src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
add seperate response buffers and request queue sizes
add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
assert on the
src/mem/tport.cc:
add a friendly assert to make sure the packet was inserted into the list
--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2007-05-09 18:20:24 -04:00
Ali Saidi
37b45e3c8c
fix the translating ports so it can add a page on a fault
...
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
2007-05-09 15:37:46 -04:00
Ali Saidi
939cbd8201
Merge zizzer:/bk/newmem
...
into udhcp-macvpn-703.public.engin.umich.edu:/Users/ali/work/m5.newmem
--HG--
extra : convert_revision : e977c5b194954774b6503484797f1c1e0eb4e425
2007-05-09 12:02:36 -04:00
Ali Saidi
ee70d8cfc4
bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer.
...
src/base/bitfield.hh:
bit_val was being used directly in the statement in
return. If type B had fewer bits than last, bit_val << last would get
the wrong answer.
--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64
2007-05-09 12:01:31 -04:00
Gabe Black
c2ac0fd89b
Fix insertBits so it doesn't shift things into oblivion
...
--HG--
extra : convert_revision : 8833b60e3fc94c917fbdb7a99f3d90155907b44e
2007-05-08 17:19:33 +00:00
Gabe Black
dc1c9e0300
Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed.
...
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
2007-05-08 13:02:19 +00:00
Ali Saidi
a38c79ec22
the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space
...
fix the timing cpu to handle receiving a nacked packet
src/cpu/simple/timing.cc:
make the timing cpu handle receiving a nacked packet
src/mem/bridge.cc:
src/mem/bridge.hh:
the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space
--HG--
extra : convert_revision : 5e12d0cf6ce985a5f72bcb7ce26c83a76c34c50a
2007-05-07 18:58:38 -04:00
Ali Saidi
0dfc29a023
fix partial writes with a functional memory hack
...
figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached
configs/common/FSConfig.py:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/python/m5/objects/Bridge.py:
fix partial writes with a functional memory hack
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached
src/mem/packet.cc:
fix WriteInvalidateResp to not be a request that needs a response since it isn't
src/mem/port.hh:
by default return 0 for deviceBlockSize instead of panicing. This makes finding the block size the bus should use easier
--HG--
extra : convert_revision : 3fcfe95f9f392ef76f324ee8bd1d7f6de95c1a64
2007-05-07 14:42:03 -04:00
Ali Saidi
3f2b039c98
change the way dprintf works so the cache accesses required to fulfill the dprintf aren't show in between the Cycle: name:
...
printing and the actual formatted string being printed
--HG--
extra : convert_revision : 8876ba938ba971f854bab490c9af10db039a2e83
2007-05-01 18:14:16 -04:00
Ali Saidi
39743d35a3
fix flushAddr so it doesn't modify an iterator that has been deleted
...
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
2007-05-01 18:12:58 -04:00
Ali Saidi
e0f8e57a7f
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 7e4b82f5949c0807d93fff80c44a8828968d1248
2007-05-01 12:33:03 -04:00
Ali Saidi
ccdf60f7b2
initialize lastTxInt to 0
...
--HG--
extra : convert_revision : 4c5e9c2145b12fdeba91f3fdd8963c35abe326c2
2007-05-01 12:32:30 -04:00
Ali Saidi
8d56145d7b
always skip the debugprintf function (DebugPrintf traceflag shouldn't matter). Otherwise, when you turn on debugprintf alters the execution
...
--HG--
extra : convert_revision : 1c9a665e3b7234cacf06c31d2e7886244a9e82bc
2007-04-30 22:49:21 -04:00
Ali Saidi
7baf29c9d0
fix igbe bug
...
--HG--
extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
2007-04-30 13:18:44 -04:00
Ali Saidi
58b9047194
fix console printing bug
...
--HG--
extra : convert_revision : 5481b72b22e7a2cf3367d777309bc30201f3b1fc
2007-04-30 13:13:03 -04:00
Ali Saidi
ae4208f3a3
add the ability for the ethernet device to check if the link is busy
...
--HG--
extra : convert_revision : 0dc0c4c4546869261f4508ad22a6a85aecf3c334
2007-04-30 13:09:13 -04:00
Nathan Binkert
69d259b6ae
gcc 4.1 claims that mem_data might be used uninitialized,
...
though I don't believe that's true. Placate it anyway.
--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
2007-04-27 13:59:17 -07:00
Kevin Lim
092951e2b1
Remove extra delete that was causing segfault.
...
--HG--
extra : convert_revision : 8a27ed80308c95988f3bc43d670dc0ac9e946d39
2007-04-26 00:07:42 -04:00
Kevin Lim
15cc194d71
Remove unnecessary check.
...
--HG--
extra : convert_revision : 8cc2943ebc41e4d430789ee7923dd0dc878be06b
2007-04-26 00:02:37 -04:00
Ron Dreslinski
3eb4ba3abb
Merge zizzer:/bk/newmem
...
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head
--HG--
extra : convert_revision : 11df5fb2a8f1fa020d042e75b22a7f2f2bcbd9ab
2007-04-23 14:38:04 -04:00
Gabe Black
cca881a531
Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro
--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
2007-04-23 11:34:39 -04:00
Kevin Lim
dbc1edd23d
Merge ktlim@zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head
--HG--
extra : convert_revision : 05f738ab6cf1e8bd2940f4ce20602f1e8ad1af48
2007-04-22 15:31:33 -04:00
Kevin Lim
8c7a6e1654
Use proper cycles for IPC and CPI equations.
...
src/cpu/o3/cpu.cc:
Use proper cycles for these equations.
--HG--
extra : convert_revision : cd49410eed978c789d788e80462abed6cb89fbae
2007-04-22 15:11:54 -04:00
Gabe Black
acc62514b1
Make the floating point zero register special handling only apply for ALPHA.
...
--HG--
extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
2007-04-22 17:50:43 +00:00
Gabe Black
cea5435760
Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used.
...
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f
fixes for solaris compile
...
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89
create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
...
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.
src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
use base/fenv instead of fenv directly
src/base/SConscript:
add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
m5 implementation to standerdize fenv across platforms.
--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-21 17:50:47 -04:00
Gabe Black
f3a0abbecc
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 26118d0dce464405148d2693fee4561fa0ce10ff
2007-04-18 21:27:37 -04:00
Nathan Binkert
6f4c1aa475
Move the turbolaser python simobject stuff into the
...
encumbered directory
--HG--
extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854
2007-04-18 11:15:52 -07:00
Nathan Binkert
d92fff858b
fix SIGUSR1 and SIGUSR2 by clearing the variables after
...
they're used
--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
2007-04-18 08:04:46 -07:00
Gabe Black
dde2b11ae6
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : d18cce378fe3390c6e708945b9ea7c76c2d20a81
2007-04-17 08:56:59 -04:00
Ron Dreslinski
3b95161da8
Merge zizzer:/bk/newmem
...
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head
--HG--
extra : convert_revision : 8630b3771678b68d5cd12a61f7a4de2e3443a8d7
2007-04-16 11:32:09 -04:00
Ron Dreslinski
2952c34096
Fixes for splash, may conflict with Korey's SMT work and doesn't support 03cpu yet.
...
src/cpu/simple/base.cc:
Cpu's should start as unallocated, not suspended
src/cpu/simple_thread.cc:
Wait for a thread to be assigned to activate the cpu
src/kern/tru64/tru64.hh:
When looking for a open cpu to assign threads, look for an unallocated one, not a suspended one.
--HG--
extra : convert_revision : 5e3ad2e96b4a715ed38293ceaccff5b9f4ea7985
2007-04-16 11:31:54 -04:00
Gabe Black
8248af53b1
Make an inner loop which pulls microops out of macroops. These aren't checked for control flow because we can pull out microops until we run out of buffer. This prevents microops from being interpretted as branches because the pc doesn't become npc.
...
--HG--
extra : convert_revision : 9fff7c6c32900692bbc567ecb75701c9c73da259
2007-04-15 21:52:38 +00:00
Gabe Black
308b2f0ce3
Add extra constructors to Alpha and MIPS
...
--HG--
extra : convert_revision : 26ea87bfe9e5c27134eb9a15bf9e4629afae6c69
2007-04-15 21:51:05 +00:00
Gabe Black
c3081d9c1c
Add support for microcode and pull out the special branch delay slot handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect.
...
--HG--
extra : convert_revision : 8b9c603616bcad254417a7a3fa3edfb4c8728719
2007-04-14 17:13:18 +00:00
Gabe Black
5a3dcc172a
Make register indexes larger so they can actually hold all the legal values. Oops!
...
--HG--
extra : convert_revision : 7689b2e1f7468e4acb8be0f242f74002c79e7960
2007-04-14 17:08:24 +00:00
Gabe Black
3140dd88bc
Make the fsr a serializing register. Other control registers probably need this as well.
...
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
2007-04-14 17:07:24 +00:00
Gabe Black
c7f1cf1d58
Remove most of the special handling for delay slots since they have to be squashed anyway on a mispredict. This is because the NNPC value they saw when executing was incorrect.
...
--HG--
extra : convert_revision : b42c4eb28b4fbba66c65cbd0a5033bf886c1532d
2007-04-13 13:59:31 +00:00
Nathan Binkert
a575fbd4aa
Completely re-work how the scons framework incorporates swig
...
and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python. This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++). Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.
--HG--
extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
2007-04-12 21:20:04 -07:00
Nathan Binkert
eefbda7f7c
Don't allow Source to accept multiple arguments, lists,
...
or automatically do Split(). It isn't used anywhere, and
isn't very consistent with the python features that are
about to be added. Do accept SCons.Node.FS.File arguments
though.
--HG--
extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
2007-04-12 09:07:59 -07:00
Nathan Binkert
e04208f046
Fix NextEthernetAddr.
...
unproxy() needs to return a new object otherwise all
instances will use the same value. This fix is more
or less unique to NextEthernetAddr because its use of
the proxy stuff is a bit different than everything else.
--HG--
extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
2007-04-12 08:37:55 -07:00
Nathan Binkert
fa2a93a236
Add a scons hack to force symlinks to the swig .i files
...
to be created
--HG--
extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
2007-04-12 08:35:19 -07:00
Gabe Black
6ec510385d
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
2007-04-11 15:30:09 +00:00
Gabe Black
c382bdf93d
Use a computed mask to mask out the fetch address and not a hard coded one.
...
--HG--
extra : convert_revision : c22907bed4b83f0dff51d2283dafe4f76fa9e94a
2007-04-11 14:16:54 +00:00
Gabe Black
54abc8b337
Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu.
...
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5
Make trying to execute macroops fail with a better error message.
...
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0
Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles.
...
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
2007-04-11 12:25:00 +00:00
Gabe Black
fcc35a67e0
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
2007-04-10 17:27:33 +00:00
Gabe Black
74122c04cf
Even if you don't want to fetch more bytes, make sure you handle a fault.
...
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
2007-04-10 17:27:12 +00:00
Gabe Black
798caa36ad
Include the new GenFault microop.
...
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156
Reworked x86 a bit
...
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f
Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions.
...
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe
Added a class which lets you manipulate all the strings returned by the parser as a unit.
...
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9
Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't.
...
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
2007-04-10 17:13:26 +00:00
Gabe Black
5476247623
Fixed a compile error.
...
--HG--
extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
2007-04-10 01:52:38 +00:00
Gabe Black
d54b8b73ed
Comment out the remote gdb object for SE mode.
...
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
2007-04-09 18:30:50 +00:00
Kevin Lim
64b4572c3e
Merge ktlim@zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head
--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
2007-04-09 14:30:49 -04:00
Kevin Lim
0cc343d41d
Fix bug when blocking due to no free registers.
...
--HG--
extra : convert_revision : a1a218d3294515184689041487057495223360b7
2007-04-09 14:29:59 -04:00
Gabe Black
f53d2ccbfc
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a
Accidentally didn't save when moving the specialization code out of here.
...
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
2007-04-09 01:08:05 +00:00
Gabe Black
c7bb106886
Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts.
...
--HG--
extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
2007-04-08 23:31:11 +00:00
Gabe Black
d29979b043
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44
Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly.
...
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409
Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa
...
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
2007-04-06 16:55:56 +00:00
Gabe Black
a3ed19f82a
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
2007-04-06 16:39:47 +00:00
Gabe Black
59df95c7e6
Consolidated the microcode assembler to help separate it from more x86-centric stuff.
...
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25
Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
...
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4
Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates.
...
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a
Add in a stub merging function
...
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a
Clean up the macroop code.
...
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-06 15:15:36 +00:00
Gabe Black
3c9768e644
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
2007-04-06 14:37:46 +00:00
Gabe Black
077183f7ec
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : efdbf9787383dc1df544b7276f8120285e69bf69
2007-04-05 11:35:31 +00:00
Gabe Black
ff7b89beee
The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst.
...
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.
In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
Implemented polymorphic microops and changed around the microcode assembler syntax.
--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b
Fix a regular expression problem when recognizing labels for string substitution.
...
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
2007-04-04 23:19:32 +00:00
Gabe Black
a664017c2a
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 81269f094834f43b4e908321bfce2e031b39d2a4
2007-04-04 20:50:49 +00:00
Kevin Lim
3d2a434e42
Updates for other ISA cpu_builders.
...
--HG--
extra : convert_revision : b02736c627bb9dcf87463a9133e04369b9f8fae2
2007-04-04 16:50:48 -04:00
Kevin Lim
b247e02f6e
Merge ktlim@zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head
--HG--
extra : convert_revision : 7181d8c2ee673322372484cf288a94ebd91b5265
2007-04-04 15:39:13 -04:00
Kevin Lim
6ff6621f20
Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions.
...
src/cpu/o3/alpha/cpu_impl.hh:
Pass ISA-specific O3 CPU to FullO3CPU as a constructor parameter instead of using setCPU functions.
--HG--
extra : convert_revision : 74f4b1f5fb6f95a56081f367cce7ff44acb5688a
2007-04-04 15:38:59 -04:00
Ali Saidi
d9ab45d066
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : be37463ea3ca38ef02ae0b82da0752f240a530d0
2007-04-04 13:57:23 -04:00
Ali Saidi
d0ea8ff088
The MemoryObject tha owns a port should delete it if it so chooses when deletePortRefs() is called on it with that port as a parameter.
...
In this way a MemoryObject can keep a functional port around and give it to anyone who wants to do functional accesses rather
than creating a new one each time.
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/cache_impl.hh:
only keep around one func port we give to anyone who wants it. Otherwise we can run out of port ids reasonably quickly if
a lot of functional accesses are happening (e.g. remote debugging, dprintk, etc)
--HG--
extra : convert_revision : 6a9e3e96f51cedaab6de1b36cf317203899a3716
2007-04-04 13:56:38 -04:00
Gabe Black
4285990a96
Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier:
...
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.
--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba
Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case
...
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7
Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function.
...
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
2007-04-04 14:27:00 +00:00
Gabe Black
6010c6ded4
Added all the different variations of the register names.
...
--HG--
extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
2007-04-04 14:25:36 +00:00
Kevin Lim
9e1f3bc11a
Merge ktlim@zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head
--HG--
extra : convert_revision : 4a8cbb65b19636c31b5c6fd5f24c90f8f2148ed1
2007-04-04 00:14:44 -04:00
Gabe Black
10fe8b05db
Made the "data" field of store queue entries into a character array. It's sized to match an IntReg which was what it used to be, but we might want to make it something architecture independent. All data is now endian converted before entering the store queue entries which simplifies store to load forwarding in "trans endian" simulations, and makes twin memory ops work.
...
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
fixed twin memory operations.
--HG--
extra : convert_revision : 8fb97f98e285cd22413e06e146fa82392ac2a590
2007-04-03 22:53:26 +00:00
Kevin Lim
98c8cd0b36
Fix a memory leak. Hopefully this fixes the longer running benchmarks.
...
--HG--
extra : convert_revision : 89eff82642ff181a9b95c77c4d2bf620ca837113
2007-04-03 14:25:24 -04:00
Gabe Black
93d4c624c5
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 7be8ebe55a7b11552d78701520f93aa86db1e501
2007-04-03 15:01:36 +00:00
Gabe Black
61c56ffeaf
A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented.
...
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
2007-04-03 15:01:09 +00:00
Gabe Black
0ce6936e7d
Zero out ModRM if the byte isn't there, and fix some displacement size stuff.
...
--HG--
extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
2007-04-03 14:56:24 +00:00
Kevin Lim
ec09e5ad6f
Remove/comment out DPRINTFs that were causing a segfault.
...
The removed ones were unnecessary. The commented out ones could be useful in the future, should this problem get fixed. See flyspray task #243 .
src/cpu/o3/commit_impl.hh:
src/cpu/o3/decode_impl.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue_impl.hh:
src/cpu/o3/lsq_impl.hh:
src/cpu/o3/lsq_unit_impl.hh:
src/cpu/o3/rename_impl.hh:
src/cpu/o3/rob_impl.hh:
Remove/comment out DPRINTFs that were causing a segfault.
--HG--
extra : convert_revision : b5aeda1c6300dfde5e0a3e9b8c4c5f6fa00b9862
2007-04-02 13:55:45 -04:00
Kevin Lim
24cc5227af
Fix up SPARC's CPU builder to match changes to Alpha's CPU builder.
...
--HG--
extra : convert_revision : ec2a739f1da07f0922c772e6998017995115ce80
2007-04-02 13:28:17 -04:00
Ali Saidi
c46e946c94
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 2f7f50f4ad31f741c0c67db96e49d30ca078fc94
2007-03-29 22:01:34 -04:00
Ali Saidi
528694817f
make serialization at least seem to work
...
--HG--
extra : convert_revision : cbfdb64f9a204670b8dd0294c74a17044b9f330c
2007-03-29 22:00:01 -04:00
Ali Saidi
8ca218cab5
get rid of CWP bounds warning...
...
--HG--
extra : convert_revision : 74df09341c091c2d6ca9b46c6a3521f22b48acf4
2007-03-29 15:57:11 -04:00
Gabe Black
7fcc9d2106
Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support.
...
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
2007-03-29 17:57:19 +00:00
Gabe Black
e67a207ad3
Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself.
...
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
2007-03-29 17:57:18 +00:00
Kevin Lim
5c3f724174
Override addPrivateSplitL1Caches function in order to automatically set the tgts_per_mshr of the caches to 20. This is needed otherwise things will potentially lock up when using the O3CPU because the caches can run out of targets, and then not respond.
...
Remove this hack once the caches eventually get fixed.
--HG--
extra : convert_revision : 8c61ac1b6182f57ebbe3bcfeddb5a4f4334d7bc0
2007-03-29 12:25:47 -04:00
Kevin Lim
80af6530f6
Update code so that the O3 CPU can handle not initially having anything hooked up to its ports. This fixes the segfault Ali recently found when using sampling.
...
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
Update code so that the O3 CPU can handle not initially having anything hooked up to its ports.
--HG--
extra : convert_revision : 04bcef44e754735d821509ebd69b0ef9c8ef8e2c
2007-03-29 12:02:57 -04:00
Gabe Black
14a7cda195
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ewok.(none):/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 849b63ae1300e240082da19dfeb283cdeeb80aef
2007-03-29 00:51:34 -07:00
Gabe Black
77ce05f478
Fidget with the syntax of the MultiOp format in anticipation of making it actually work.
...
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
2007-03-29 00:50:54 -07:00
Gabe Black
fd77212b72
Add code to generate register and immediate based integer op microop classes.
...
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
2007-03-29 00:49:53 -07:00
Gabe Black
0d5f6167ff
Allow "let" blocks to add code to the output files.
...
--HG--
extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
2007-03-29 00:47:46 -07:00
Ron Dreslinski
8a674bed5c
Call compare and Swap on the target, not the response.
...
--HG--
extra : convert_revision : 522805fe2c9abaa5ba0d9262ad98f841d90f6452
2007-03-28 14:38:11 -05:00
Ali Saidi
e95bc9d8f9
some more fixes... non-tso stuff seems to work
...
--HG--
extra : convert_revision : da604d20443376d04826397d0aaff0bdd744053b
2007-03-27 20:44:21 -04:00
Ron Dreslinski
55614caecc
Merge zizzer:/bk/newmem
...
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head
--HG--
extra : convert_revision : 45b64b1564f0e4958d8441455f87b2b185324d55
2007-03-27 17:06:07 -05:00
Ron Dreslinski
6b8cd9d06d
First Pass At Cmp/Swap in caches
...
--HG--
extra : convert_revision : 211bfb7c6a59e9e120dae1600d4754baaf231332
2007-03-27 17:05:25 -05:00
Nathan Binkert
d8ca2d3b16
Instead of creating a new python process to run traceflags.py,
...
just directly exec the file and generate the flags
--HG--
extra : convert_revision : d648ca7348404ded5337db327adafccbd2ae40c8
2007-03-26 21:07:32 -07:00
Ali Saidi
01ac962a06
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 4b60e96e8dc9c69842514e29925ec1931597ddb4
2007-03-26 18:40:30 -04:00
Ali Saidi
e8dc1723ee
first bit of life from the intel gigabit model
...
--HG--
extra : convert_revision : d8944a53f6b585df21651c4e624518d5c49a7837
2007-03-26 18:40:18 -04:00
Kevin Lim
5c044cf1f6
Update for new trace data behavior.
...
--HG--
extra : convert_revision : c3df20c5187614febc4cc9f4d4c68bfecfba1ea7
2007-03-24 23:47:14 -05:00
Kevin Lim
4bad33ce9d
Merge ktlim@zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2
--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
2007-03-24 14:00:16 -04:00
Gabe Black
e7bbd85ae6
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
2007-03-23 21:47:03 -04:00
Kevin Lim
047f77102b
Merge ktlim@zizzer:/bk/newmem
...
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2
src/cpu/base_dyn_inst.hh:
Hand merge. Line is no longer needed because it's handled in the ISA.
--HG--
extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
2007-03-23 13:20:19 -04:00
Kevin Lim
2330adfa28
Make hardware loads/stores serializing; they need to avoid certain out-of-order interactions in the 21264.
...
--HG--
extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
2007-03-23 13:14:05 -04:00
Kevin Lim
941d3168d0
Updates for commit.
...
1. Move interrupt handling to a separate function to clean up main commit() function a bit. Also gate the function call off properly based on whether or not there are outstanding interrupts, and the system is not in PAL mode.
2. Better handling of updating instruction's status bits. Instructions are not marked "atCommit" until other stages view it (pushed off to IEW/IQ), and they have been properly handled (faults).
3. Don't consider the ROB "empty" for the purpose of other stages until the ROB is empty, all stores have written back, and there was no store commits this cycle. The last is necessary in case a store committed, in which case it would look like all stores have written back but in actuality have not.
src/cpu/o3/commit.hh:
Slightly modify how interrupts are handled. Also include some extra bools to keep track of state properly.
src/cpu/o3/commit_impl.hh:
Slightly modify how interrupts are handled. Also include some extra bools to keep track of state.
General correctness updates, most specifically for when commit broadcasts to other stages that the ROB is empty.
--HG--
extra : convert_revision : 682ec6ccf4ee6ed0c8a030ceaba1c90a3619d102
2007-03-23 13:13:10 -04:00
Kevin Lim
78de00091b
3 memory system fixes:
...
1. Update packet's flags properly when a snoop happens
2. Don't allow accesses to read a block's data if the block has outstanding MSHRs. This avoids a RAW hazard in MP systems that the memory system was not detecting properly earlier (a write required a block to upgrade, and while the upgrade was outstanding, a read came along and read old data).
3. Update MSHR's request upon a response being handled. If the MSHR has more targets than it can respond to in one cycle, then its request must be properly updated to the new head of the targets list.
src/mem/bus.cc:
Update packet's flags properly upon snoop.
src/mem/cache/cache_impl.hh:
Be sure to not allow accesses to a block with outstanding MSHRs.
src/mem/cache/miss/miss_queue.cc:
Update MSHR's request upon a response being handled.
--HG--
extra : convert_revision : 76a9abc610ca3f1904f075ad21637148a41982d6
2007-03-23 13:09:37 -04:00
Kevin Lim
e21878c3f2
Handle status bits a little better, as well as non-speculative instructions.
...
src/cpu/o3/iew_impl.hh:
Allow for slightly more flexible handling of non-speculative instructions. They can be other classes now, such as loads or stores.
Also be sure to clear the state associated with squashes that are not used. i.e. if a squash due to a memory ordering violation happens on the same cycle as an older branch squashing, clear the state associated with the memory ordering violation.
Lastly don't consider uncached loads to officially be "at commit" until IEW receives the signal back from commit about the load.
src/cpu/o3/inst_queue_impl.hh:
Don't consider non-speculative instructions to be "at commit" until the IQ has received a signal from commit about the instruction. This prevents non-speculative instructions from being issued too early.
src/cpu/o3/mem_dep_unit_impl.hh:
Clear instruction's ability to issue if it's replayed.
--HG--
extra : convert_revision : d69dae878a30821222885485f4dee87170d56eb3
2007-03-23 11:40:53 -04:00
Kevin Lim
31e78b0b92
Two fixes:
...
1. Requests are handled more properly now. They assume the memory system takes control of the request upon sending out an access.
2. load-load ordering is maintained.
src/cpu/base_dyn_inst.hh:
Update how requests are handled. The BaseDynInst should not be able to hold a pointer to the request because the request becomes owned by the memory system once it is sent out.
Also include some functions to allow certain status bits to be cleared.
src/cpu/base_dyn_inst_impl.hh:
Update how requests are handled. The BaseDynInst should not be able to hold a pointer to the request because the request becomes owned by the memory system once it is sent out.
src/cpu/o3/fetch_impl.hh:
General correctness fixes. retryPkt is not necessarily always set, so handle it properly. Also consider the cache unblocked only when recvRetry is called.
src/cpu/o3/lsq_unit.hh:
Handle requests a little more correctly. Now that the requests aren't pointed to by the DynInst, be sure to delete the request if it's not being used by the memory system.
Also be sure to not store-load forward from an uncacheable store.
src/cpu/o3/lsq_unit_impl.hh:
Check to make sure load-load ordering was maintained.
Also handle requests a little more correctly.
--HG--
extra : convert_revision : e86bead2886d02443cf77bf7a7a1492845e1690f
2007-03-23 11:33:08 -04:00
Kevin Lim
abb07d9da3
Set progress_interval in terms of CPU cycles.
...
--HG--
extra : convert_revision : 76b0918276cb613eb314ab1479b5ffdb31f31dee
2007-03-23 11:26:30 -04:00
Kevin Lim
55a45d3644
A couple of minor fixes.
...
1. Set CPU ID in all modes for the O3 CPU.
2. Use nextCycle() function to prevent phase drift in O3 CPU.
3. Remove assertion in rename map that is no longer true.
src/cpu/o3/alpha/cpu_builder.cc:
Allow for CPU id in all modes, not just full system. Also include a parameter that was left out by accident.
src/cpu/o3/alpha/cpu_impl.hh:
Set the CPU ID properly.
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
Use nextCycle() function so that the CPU does not get out of phase when starting up from quiesces.
src/cpu/o3/rename_map.cc:
Remove assertion that is no longer true.
tests/configs/o3-timing.py:
Set CPU's id to 0.
--HG--
extra : convert_revision : 2b69c19adfce2adcc2d1939e89d702bd6674d5d5
2007-03-23 11:22:43 -04:00
Ali Saidi
2c47413a7a
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : fd590d464359d8ae859998a9f446b960781a5e33
2007-03-22 18:39:51 -04:00
Ali Saidi
12b7ebcbca
finish up the coding of the Intel Gb NIC... Many Many bugs to squash
...
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
finish coding the Intel Gb NIC device
src/dev/io_device.hh:
we really don't want to be able to pass a null buffer to dma read, at least not the way we have things setup now... it won't work at all
--HG--
extra : convert_revision : 6739497232317ec407cfa7a96de4575a9a6cfc46
2007-03-22 18:39:41 -04:00
Gabe Black
e3d3ab4513
Add structure based bitfield syntax to the isa_parser. This is primarily useful for x86.
...
--HG--
extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
2007-03-22 04:10:57 +00:00
Gabe Black
39182808bc
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
2007-03-22 04:10:56 +00:00
Gabe Black
276f6d794d
Add a junk operand. With no operands, the parser breaks.
...
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
2007-03-21 21:09:24 +00:00
Gabe Black
bbffaa8ee0
Start implementing groups of instructions which do the same thing on different sets of inputs.
...
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
2007-03-21 21:07:43 +00:00
Gabe Black
1707aa750f
put the int register count in intregs.hh
...
--HG--
extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
2007-03-21 21:04:54 +00:00
Gabe Black
0a80d06dea
Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
...
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
2007-03-21 19:19:53 +00:00
Gabe Black
3efec59fc5
Missed a const
...
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
2007-03-21 19:15:40 +00:00
Gabe Black
63e2d3dcbf
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
2007-03-21 01:18:55 -04:00
Gabe Black
2b4c02b829
The m5 side of statetrace. This is fairly ugly, but I don't want to lose it.
...
--HG--
extra : convert_revision : 171b41418567c1f41f43363a46fa9aeaa58ae606
2007-03-21 01:18:47 -04:00
Gabe Black
475d36ee93
Ignore "time" and "times" syscalls.
...
--HG--
extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
2007-03-20 23:53:52 -04:00
Gabe Black
076fd9a707
Fixed up some types and const placement, and added signed bitfields that sign extend themselves.
...
--HG--
extra : convert_revision : 84bda8fc14f9a6f7dc7982c9aeb15bf688457706
2007-03-20 11:40:30 +00:00
Gabe Black
e7b015cee1
Added syntax for structure oriented extMachInsts.
...
--HG--
extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
2007-03-20 06:08:52 +00:00
Gabe Black
4df9411e59
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : a6ae6ce183aaa4d1a9434f9ddd64cc30878d2147
2007-03-19 17:13:23 +00:00
Gabe Black
be3550dfe0
Ditched read or write only subbitfields for now since they were proving difficult to implement. Allow component Bitfields to be instantiated without templates, clean up the implementation a little, and adjust the comments to match.
...
--HG--
extra : convert_revision : b9b8aea285a95eeabbb4c0233c1bce49b8c773b8
2007-03-19 17:12:50 +00:00
Gabe Black
277ded3de7
For the _BitfieldRO and _BitfieldWO classes, make sure the undesired operator is redefined as private.
...
--HG--
extra : convert_revision : b18d8e49547c2712ab255d048850c5231313b80a
2007-03-19 14:28:19 +00:00
Gabe Black
898652fe04
Formatting fixes.
...
--HG--
extra : convert_revision : 276d0667daa4626288b56af3b4b17a3f9052e81a
2007-03-19 14:22:28 +00:00
Gabe Black
43dea39dd4
Lots and lots of comments.
...
--HG--
extra : convert_revision : 0de510464e2e002775ccd79e2922ccb0055845e5
2007-03-19 14:20:27 +00:00
Gabe Black
ad9ab66175
Reworked the BitUnion stuff a bit. There is moderately better isolation of the backend parts, although there are still macros.
...
--HG--
extra : convert_revision : e9692c5e697c96061ef70cf78ef532c99dbbd672
2007-03-19 13:28:36 +00:00
Gabe Black
7c0825ccf9
Compile fixes for SPARC_FS.
...
src/arch/alpha/predecoder.hh:
src/arch/sparc/predecoder.hh:
Put in a missing include
src/cpu/exetrace.cc:
Convert the legion lockstep stuff from makeExtMI to the predecoder object.
--HG--
extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
2007-03-18 23:09:51 -04:00
Gabe Black
a1f92af0fb
The syntax used for twin stores was confusing the parser so it's now broken down farther.
...
--HG--
extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
2007-03-17 21:23:03 -04:00
Gabe Black
594c415a0d
Created BitUnion type which lets you define nested bitfields for an integer in a portable way.
...
--HG--
extra : convert_revision : 56a9d06b6b7274a493dae4b290c5f9b42e59f20d
2007-03-17 23:33:00 +00:00
Gabe Black
b54fa0edda
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 3246c58850586b880641638bedb1f0025d0ef491
2007-03-16 10:57:52 +00:00
Gabe Black
725ee42ba7
Fix ALPHA_FS compile. The MachInst -> StaticInstPtr constructor is no longer a conversion constructor because it caused ambiguous conversions when setting the pointer to NULL.
...
--HG--
extra : convert_revision : ce9ecfc03a47642d105f2378208bbe923d6b765b
2007-03-16 10:57:34 +00:00
Gabe Black
3ccaee976a
Make the SPARC branch instructions use ExtMachInsts in their constructors. This isn't necessary since they don't use the extended fields, but it's more consistent and more correct.
...
--HG--
extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
2007-03-16 10:55:50 +00:00
Ali Saidi
50475e0e2a
Merge zizzer:/bk/newmem
...
into pb15.local:/Users/ali/work/m5.newmem
--HG--
extra : convert_revision : 0aa2fadf8978ae30ebe4fde03c525e6b9115117a
2007-03-15 23:21:52 -04:00
Ali Saidi
a18baae026
fix a bug gabe found
...
--HG--
extra : convert_revision : 12e8f09f6c59a16b2d2eb78bdd1345fc38c4de40
2007-03-15 23:21:01 -04:00
Gabe Black
9ad3f1e479
Refactor things a little.
...
--HG--
extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
2007-03-15 19:16:39 +00:00
Gabe Black
f4eee4fb81
File with the predecoder in it.
...
src/arch/x86/predecoder.cc:
File for the x86 predecoder process function.
--HG--
extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
2007-03-15 19:16:38 +00:00
Gabe Black
ae9bed4f8f
Split the x86 "process" predecoder method into it's own file.
...
--HG--
extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
2007-03-15 19:16:37 +00:00
Gabe Black
05c71c6194
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : cf2cc07f18b877f980e2d1fc83916f7849d9c7d9
2007-03-15 19:16:36 +00:00
Ali Saidi
c6e1dc61c2
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 6a75fa02391c4c65063c5412a568705bb1dd892b
2007-03-15 15:16:35 -04:00
Ali Saidi
3a5a20769b
add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think
...
the device is there, and in good working order.
src/dev/SConscript:
add intel gbe to the dev SCons file
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
use new manner of registers and implement all device registers that are touched through boot and ifup
--HG--
extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
2007-03-15 15:16:23 -04:00
Gabe Black
6cdd434f7f
Changed warns to DPRINTFs and multiply by 8 where needed.
...
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
2007-03-15 16:13:40 +00:00
Gabe Black
075df1469f
Added immediate value support, and fixed alot of bugs. This won't support 3 byte opcodes.
...
--HG--
extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
2007-03-15 15:29:39 +00:00
Gabe Black
4379e54b52
Compile fix
...
--HG--
extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
2007-03-15 03:17:00 +00:00
Gabe Black
32368a2bd6
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
src/arch/mips/utility.hh:
src/arch/x86/SConscript:
Hand merge
--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb
Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
...
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
Make the predecoder an object with it's own switched header file.
--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
2007-03-15 02:47:42 +00:00
Ali Saidi
c6188a2264
fix segfault when peer owner attempts to use functional port
...
--HG--
extra : convert_revision : 3702b4bd038a59bff823c3b428fdfbaabc9715df
2007-03-13 17:34:52 -04:00
Gabe Black
ff90b8c1aa
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
2007-03-13 15:03:34 -04:00
Gabe Black
ce18d900a1
Replaced makeExtMI with predecode.
...
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.
--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
2007-03-13 16:13:21 +00:00
Ali Saidi
a068d6db0f
fix interrupting during a quisce on sparc
...
src/arch/sparc/ua2005.cc:
fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
check if were suspended and interrupt at the guess time
src/base/traceflags.py:
add trace flag for Iob
src/cpu/simple/base.cc:
Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
add some Dprintfs
--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
2007-03-13 00:05:52 -04:00
Ali Saidi
247ee8ef74
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : db68adffdf4ae12637eba7c03d53aca997b30291
2007-03-12 20:17:44 -04:00
Ali Saidi
74db8adfbc
call ccprintf() with the appropriate argument types so we don't recuse forever
...
--HG--
extra : convert_revision : 5366be897d1193cf9e93b1fcd0689d19783f73a8
2007-03-12 20:16:13 -04:00
Ron Dreslinski
c6e85efc50
Merge zizzer:/bk/newmem
...
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head
--HG--
extra : convert_revision : 7d7380a6565cff32470bddadb0158fad897a5cf5
2007-03-12 16:25:59 -05:00
Ali Saidi
8d38dd3231
remove the extern C around gdb helper functions. It's need needed for any new version of gdb to work and it causes at least mine to segfault
...
--HG--
extra : convert_revision : 5e4c2ec753372fd0569734d3ddb0c8690409ca16
2007-03-12 17:23:08 -04:00
Gabe Black
1f3c3aa234
Fix mulscc.
...
--HG--
extra : convert_revision : 405f10f14f2f6666a7bef01bfb0cf90ff14cef24
2007-03-12 17:07:10 -04:00
Ron Dreslinski
2a02087eb5
Clean up more memory leaks
...
--HG--
extra : convert_revision : 32d1b23200752fe5fcdcbafb586f50bbe6db3bf3
2007-03-12 15:59:54 -05:00
Ron Dreslinski
ca8e95b480
Merge zizzer:/bk/newmem
...
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head
--HG--
extra : convert_revision : 8651b2878853c5a6cb15f60ab92cf39d3bc30a07
2007-03-12 13:42:49 -05:00
Ron Dreslinski
6415c47a5b
Fix some of the memory leaks related to writebacks
...
src/cpu/memtest/memtest.cc:
Add the [] to a delete to make it work correctly
src/mem/cache/cache_impl.hh:
Fix one of the memory leaks
--HG--
extra : convert_revision : 64c7465c68a084efe38a62419205518b24d852a7
2007-03-12 13:15:32 -05:00
Ali Saidi
885b4f26bb
Get rid of those pesky valgrind warnings, Conditional jump or move depends on uninitialised value(s), in the stats package
...
--HG--
extra : convert_revision : d3a508fc98df4eb8160a211a306be6ab241a4ce8
2007-03-12 14:13:52 -04:00
Ali Saidi
1356fb953d
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : c6fbe09348b606b94bbb35f911dea94353f076f9
2007-03-12 13:56:30 -04:00
Ali Saidi
9ad24e2248
move hver code to ua2005.cc
...
src/arch/sparc/miscregfile.cc:
this code should be in readFSreg
src/arch/sparc/ua2005.cc:
move code froh miscregfile to ua2005.cc
--HG--
extra : convert_revision : fa450b04ad73ab6f6e25d66fa0368054263f09f9
2007-03-12 13:56:09 -04:00
Gabe Black
b3bdce81fd
Add the rename syscall.
...
--HG--
extra : convert_revision : 67e92b166599bd20b7ce90d073f2fd7502f810ec
2007-03-12 01:54:15 -04:00
Gabe Black
57650a201e
Fix the mnemonic and the branch displacement field size of the branch on floating point condition codes with prediction.
...
--HG--
extra : convert_revision : 812950e92b7e0f34f370a1472c20f52e3ef214b1
2007-03-12 01:47:49 -04:00
Gabe Black
6a7e4a5904
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 725999a0a5bde6e065bad87b42e973c5c627c69f
2007-03-11 18:19:38 -04:00
Gabe Black
26c0426e44
Make sttw and sttwa use the twin memory operations.
...
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
2007-03-11 18:12:33 -04:00
Nathan Binkert
1aef5c06a3
Rework the way SCons recurses into subdirectories, making it
...
automatic. The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes. On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory. On the second pass,
all subdirs of the src directory are searched for SConscript
files. These files describe how to build any given subdirectory.
I have added a Source() function. Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build. Clean up everything to take
advantage of Source().
function is added to the list of files to be built.
--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-10 23:00:54 -08:00
Gabe Black
52ec0fe3d9
Merge zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test
--HG--
extra : convert_revision : dc02bb6b4e5cc7f0260da80a71b9713f75566a29
2007-03-10 20:52:55 -05:00
Gabe Black
780489d58b
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 6a8749be327bf2be888850060ae0427f0c943439
2007-03-10 19:52:53 -05:00
Gabe Black
7e363e14f7
Fix bounds check for the cwp
...
--HG--
extra : convert_revision : 097e6b0c80d71417329b2a4cd118046aa5ed777a
2007-03-10 19:29:31 -05:00
Gabe Black
91e8729c28
Added implementations of the fpop2 instructions.
...
--HG--
extra : convert_revision : 1fc88b499334bb4ba44375347d0062843587b6cf
2007-03-10 19:26:54 -05:00
Gabe Black
bf4dade64a
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test
--HG--
extra : convert_revision : df36efd84d938e0e402648b85b3732ed786aaa29
2007-03-10 17:46:25 -05:00
Gabe Black
25dc5569c3
Compilation fix
...
--HG--
extra : convert_revision : 8bfa5e9408d1ead0197aab5078c248876f90ea7a
2007-03-10 15:21:55 -05:00
Ali Saidi
ef6dfc2983
I thought this code got deleted, but since it hasn't I've moved it to a place where it doesn't access freed memory.
...
--HG--
extra : convert_revision : 4d9023f6193004a3e9cbeebd3721bccb50b2aab0
2007-03-10 15:00:41 -05:00
Gabe Black
df1ea2cf05
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
2007-03-09 18:32:13 -05:00
Gabe Black
f1e3e1c305
Use the TheISA namespace in case we're coming from a file that doesn't do that for us. This should be contained in the scope of the function and not leak elsewhere.
...
--HG--
extra : convert_revision : 0bb0e1457011505a99a871c443bc45f4365e9c7e
2007-03-09 22:14:25 +00:00
Gabe Black
03ff1c3167
Split the syscall table, SPARC specific syscall implementations, and the 32 bit syscall table into it's own file. Corrected problems with the stat structure. These should be tested on 64 bit x86 and SPARC machines.
...
--HG--
extra : convert_revision : 5d9fe19e031b92e111069c6b89c3dbeb29975b8a
2007-03-09 17:14:24 -05:00
Ali Saidi
dc4d47bad4
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 5804298706ac0f04fbe491326af71ce9ab74425a
2007-03-09 16:56:52 -05:00
Ali Saidi
58f69391ca
implement ipi stufff for SPARC
...
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
some constants for the strand status register
src/arch/sparc/ua2005.cc:
properly implement the strand status register
src/dev/sparc/iob.cc:
implement ipi generation properly
src/sim/system.cc:
call into the ISA to start the CPU (or not)
--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
2007-03-09 16:56:39 -05:00
Kevin Lim
ad44834907
Two fixes:
...
1. Make sure connectMemPorts() only gets called when the CPU's peer gets changed. This is done by making setPeer() virtual, and overriding it in the CPU's ports. When it gets called on a CPU's port (dcache specifically), it calls the normal setPeer() function, and also connectMemPorts().
2. Consolidate redundant code that handles switching in a CPU.
src/cpu/base.cc:
Move common code of switching over peers to base CPU.
src/cpu/base.hh:
Move common code of switching over peers to BaseCPU.
src/cpu/o3/cpu.cc:
Add in function that updates thread context's ports.
Also use updated function to takeOverFrom() in BaseCPU. This gets rid of some repeated code.
src/cpu/o3/cpu.hh:
Include function to update thread context's memory ports.
src/cpu/o3/lsq.hh:
Add function to dcache port that will update the memory ports upon getting a new peer.
Also include a function that will tell the CPU to update those memory ports.
src/cpu/o3/lsq_impl.hh:
Add function that will update the memory ports upon getting a new peer.
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
Add function that will update thread context's memory ports upon getting a new peer.
Also use the new BaseCPU's take over from function.
src/cpu/simple/atomic.hh:
Add in function (and dcache port) that will allow the dcache to update memory ports when it gets assigned a new peer.
src/cpu/simple/timing.hh:
Add function that will update thread context's memory ports upon getting a new peer.
src/mem/port.hh:
Make setPeer virtual so that other classes can override it.
--HG--
extra : convert_revision : 2050f1241dd2e83875d281cfc5ad5c6c8705fdaf
2007-03-09 10:06:09 -05:00
Ali Saidi
1158da37fb
Panic if any CMT registers are accessed
...
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
add CMT ASI registers
src/arch/sparc/tlb.cc:
Panic if any of the CMT registers are being accessed
--HG--
extra : convert_revision : b9a94281e2074a576ac21d042b756950d509e758
2007-03-08 21:49:13 -05:00
Ali Saidi
027dfa01e6
stop m5 from leaking like a sieve
...
don't create a new physPort/virtPort every time activateContext() is called
add the ability to tell a memory object to delete it's reference to a port and a method to have a port call deletePortRefs()
on the port owner as well as delete it's peer
still need to stop calling connectMemoPorts() every time activateContext() is called or we'll overflow the bus id and panic
src/cpu/thread_state.cc:
if we hav ea (phys|virt)Port don't create a new on, have it delete it's peer and then reuse it
src/mem/bus.cc:
src/mem/bus.hh:
add ability to delete a port by usig a hash_map instead of an array to store port ids
add a function to do deleting
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/mem_object.cc:
src/mem/mem_object.hh:
adda function to delete port references from a memory object
src/mem/port.cc:
src/mem/port.hh:
add a removeConn function that tell the owener to delete any references to the port and then deletes its peer
--HG--
extra : convert_revision : 272f0c8f80e1cf1ab1750d8be5a6c9aa110b06a4
2007-03-08 18:57:15 -05:00
Gabe Black
c40d95e4c4
Fixed an off-by-one error.
...
--HG--
extra : convert_revision : 498fef18cf339cabc2c00e4758bc8a0da857daca
2007-03-08 00:55:16 -05:00
Gabe Black
46051c5f65
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : becba8537b11ee4ef33bbf129bef2ca047403df5
2007-03-08 00:42:30 -05:00
Gabe Black
5caf721074
Fix up the SPARC initial stack frame to match an actual 32 bit process.
...
--HG--
extra : convert_revision : 3995744c3bf955a370b18f6e88de1bfb82f79843
2007-03-08 00:29:37 -05:00
Ali Saidi
87fb0eb8de
I missed a couple of WithEffects, this should do it
...
--HG--
extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915
2007-03-07 21:51:44 -05:00
Ali Saidi
2f7a4e1d1b
fix compiling of FS after Gabe's last compile
...
--HG--
extra : convert_revision : a93fa5ad61aa2b8c18bf6c513b617f3425ffb220
2007-03-07 21:50:09 -05:00
Gabe Black
54fc750924
Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
...
--HG--
extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
2007-03-07 20:04:46 +00:00
Gabe Black
8edc9d79ce
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem
--HG--
extra : convert_revision : d764fe37c71269a04fcede6cbf30e24262447e89
2007-03-07 20:04:45 +00:00
Ali Saidi
49527ab553
Merge zizzer:/bk/newmem
...
into zeep.pool:/tmp/newmem
--HG--
extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
2007-03-07 15:04:44 -05:00
Ali Saidi
689cab36c9
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
...
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
2007-03-07 15:04:31 -05:00
Gabe Black
c822513269
Add setData functions for the new Twin??_t types.
...
--HG--
extra : convert_revision : 6f4e08e76eb4a95eb08b11632f6e33ba458723b6
2007-03-07 17:46:06 +00:00
Gabe Black
f04e535f26
Add some constructors and an output operator to the Twin??_t types so that o3 SPARC will compile again.
...
--HG--
extra : convert_revision : af987aaeac87ee92a3b55cf0839d994cf7dea1af
2007-03-07 17:46:05 +00:00
Gabe Black
b7ea19760a
Make byteswap work correctly on Twin??_t types.
...
--HG--
extra : convert_revision : a8a14078d62c24e480ffa69591edfc775d1d76cc
2007-03-07 17:46:04 +00:00
Nathan Binkert
21391d494c
Cleanup
...
--HG--
extra : convert_revision : 31f1b0f760a6eb861652440f9d42aaf123ef4833
2007-03-06 22:16:18 -08:00
Gabe Black
44f91bb444
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
2007-03-06 20:58:44 +00:00
Nathan Binkert
44f215f44d
Python parameters types need analogous C++ types
...
--HG--
extra : convert_revision : d068dfec69b28d48fc299a4108e165decfaaace7
2007-03-06 11:16:15 -08:00
Nathan Binkert
d55b25cde6
Move all of the parameters of the Root SimObject so they are
...
directly configured by python. Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.
--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
2007-03-06 11:13:43 -08:00
Gabe Black
05c86ec0d7
Get X86 to load an elf and start a process for it.
...
src/arch/x86/SConscript:
Add in process source files.
src/arch/x86/isa_traits.hh:
Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
An X86 process class.
src/base/loader/elf_object.cc:
Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
Add an x86 traceflag
src/sim/process.cc:
Add in code to create an x86 process.
src/arch/x86/intregs.hh:
A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
An x86 hello world test binary.
--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
2007-03-06 15:42:30 +00:00
Nathan Binkert
f800fddcea
Python atexit handlers are called in reverse order.
...
Fix things so the stats dump happens last.
--HG--
extra : convert_revision : ea842dbcbb77dd1c715c4e5b57d2470e558c4265
2007-03-05 20:14:00 -08:00
Gabe Black
992fda55f9
Fill out a stub version of the vtophys header file.
...
--HG--
extra : convert_revision : 2c10a80a2f73207539e3f98b4a3b864d431f5035
2007-03-05 17:59:04 +00:00
Gabe Black
296891b1c5
Add in NumGDBRegs so the constructor to the base class can get all it's arguments.
...
--HG--
extra : convert_revision : fcec1ad134b53a419a952e556ed75cb1559a1127
2007-03-05 17:58:15 +00:00
Gabe Black
a473d50e4c
Reorganize the floating point register file a little.
...
--HG--
extra : convert_revision : 643c147b77e931d49ac559681d4bbda737f6e1c7
2007-03-05 17:57:26 +00:00
Gabe Black
a46e100bd9
Add some new source files.
...
--HG--
extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7
2007-03-05 17:56:26 +00:00
Gabe Black
a41b86ba01
Stub decoder. This is probably even farther from finished than it looks...
...
--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
2007-03-05 16:16:28 +00:00
Gabe Black
82235b8240
Add stub for x86 process creation
...
--HG--
extra : convert_revision : 3bdbc415a73c6bb4d723f68714a96c9f922ba5e6
2007-03-05 16:15:13 +00:00
Gabe Black
d539052b63
Add x86 version of call to "decode"
...
--HG--
extra : convert_revision : bb799dcea58b51d6e1d3d744581ea48c5c1490fe
2007-03-05 16:13:50 +00:00
Gabe Black
fc7f9ab80a
Add x86 to the Arch enum in the object file class.
...
--HG--
extra : convert_revision : bc8c5e78aac0e9033d6cbc756d8092369ac29072
2007-03-05 16:12:20 +00:00
Gabe Black
a0294c10cd
Added missing include.
...
--HG--
extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
2007-03-05 16:11:07 +00:00
Gabe Black
ecfc622451
Added LargestRead type for x86. I might have picked the wrong type.
...
--HG--
extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
2007-03-05 16:10:11 +00:00
Gabe Black
78e5406f19
Stub implementation for x86.
...
--HG--
extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
2007-03-05 16:09:09 +00:00
Gabe Black
05ba90b726
Stub implementation for x86
...
--HG--
extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
2007-03-05 16:08:18 +00:00
Gabe Black
58d30df676
Added fault generation functions. I would still like to see these go away. The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures.
...
--HG--
extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
2007-03-05 16:07:01 +00:00
Gabe Black
c7ab9f5bb2
Added an x86 dyninst
...
--HG--
extra : convert_revision : 2317e9bb0bcf8010ab5d02019f7a14eeb7b1459c
2007-03-05 14:55:45 +00:00
Gabe Black
7730af9503
Added stub implementations or prototypes for all the functions in this file.
...
--HG--
extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
2007-03-05 14:55:09 +00:00
Gabe Black
b2d356a6b2
Added in a missing include.
...
--HG--
extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
2007-03-05 14:53:51 +00:00
Gabe Black
7ed7d6e80d
Filled in a stub header file for setting the result of a syscall.
...
--HG--
extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
2007-03-05 14:53:15 +00:00
Gabe Black
43b8f51bb8
Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha.
...
--HG--
extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
2007-03-05 14:52:28 +00:00
Gabe Black
2e6cf12963
Filled in a stub header file for remote gdb
...
--HG--
extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
2007-03-05 14:51:21 +00:00
Gabe Black
aa5f42b10d
Correct a typo
...
--HG--
extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
2007-03-05 14:50:33 +00:00
Gabe Black
0e9db1a2e5
Make the constructor (and all the other functions) public
...
--HG--
extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
2007-03-05 14:49:52 +00:00
Gabe Black
b832e6740f
Various touch ups
...
--HG--
extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
2007-03-05 14:49:07 +00:00
Gabe Black
ecc1066f43
Added a missing include.
...
--HG--
extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
2007-03-05 14:48:18 +00:00
Gabe Black
ec8b49cc5f
Added a missing include.
...
--HG--
extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
2007-03-05 14:47:42 +00:00
Gabe Black
8a33c8dce4
Fix up the remote gdb include gaurds so it doesn't use the same symbol as Alpha does.
...
--HG--
extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
2007-03-05 14:46:49 +00:00
Gabe Black
30e700600c
x86 register file includes.
...
--HG--
extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
2007-03-05 12:23:14 +00:00
Gabe Black
b9b29525a6
Include the x86 specific traits file.
...
--HG--
extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
2007-03-05 12:21:20 +00:00
Gabe Black
9e93feea10
Stub x86 Fault class which just panics.
...
--HG--
extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
2007-03-05 12:20:34 +00:00
Gabe Black
385eb586ce
A new file for x86 specific parameters. This could be implemented as a sim object?
...
--HG--
extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
2007-03-05 12:19:54 +00:00
Gabe Black
be29612fbe
Add in a declaration of class Checkpoint rather than expecting it to come from some other include.
...
--HG--
extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
2007-03-05 12:19:11 +00:00
Gabe Black
6a19b64de2
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
2007-03-05 11:00:44 +00:00
Nathan Binkert
ba042842c6
Don't use the exact same name as a system header #define
...
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
2007-03-04 19:26:49 -08:00
Ali Saidi
a81143f06a
add a sparc fs regression
...
src/dev/sparc/iob.cc:
don't warn on cpu restart/idle/halt stuff
tests/SConscript:
add sparc target in test Sconscript
util/regress:
Add SPARC_FS target in regress
--HG--
extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-03 22:45:26 -05:00
Ali Saidi
82874eefca
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
2007-03-03 19:03:22 -05:00
Ali Saidi
1694c65ba1
Add Iob and remove the fake device
...
configs/common/FSConfig.py:
add an attachOnChipIO to force people to think about where "onchip" i/o should be connected in their hierarchy
--HG--
extra : convert_revision : cf79a9a00760b7daf28063f407a04bd38b956843
2007-03-03 19:02:31 -05:00
Ali Saidi
36f43ff6a5
Implement Niagara I/O interface and rework interrupts
...
configs/common/FSConfig.py:
Use binaries we've compiled instead of the ones that come with Legion
src/arch/alpha/interrupts.hh:
get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number
src/arch/sparc/asi.cc:
Add AsiIsInterrupt() to AsiIsMmu()
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
Add InterruptVector type
src/arch/sparc/interrupts.hh:
rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared
src/arch/sparc/isa_traits.hh:
Add the "interrupt" trap types to isa traits
src/arch/sparc/miscregfile.cc:
add names for all the misc registers and possible post an interrupt when TL is changed.
src/arch/sparc/miscregfile.hh:
Add a helper function to post an interrupt when pil < some set softint
src/arch/sparc/regfile.cc:
src/arch/sparc/regfile.hh:
InterruptLevel shouldn't really live here, moved to interrupt.hh
src/arch/sparc/tlb.cc:
Add interrupt ASIs to TLB
src/arch/sparc/ua2005.cc:
Add checkSoftInt to check if a softint needs to be posted
Check that a tickCompare isn't scheduled before scheduling one
Post and clear interrupts on queue writes and what not
src/base/bitfield.hh:
Add an helper function to return the msb that is set
src/cpu/base.cc:
src/cpu/base.hh:
get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending
src/cpu/intr_control.cc:
src/cpu/intr_control.hh:
src/dev/alpha/tsunami_cchip.cc:
src/python/m5/objects/IntrControl.py:
Make IntrControl have a system pointer rather than using a cpu pointer to get one
src/dev/sparc/SConscript:
add iob to SConsscrip
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out:
update config.ini/out for intrcntrl not having a cpu pointer anymore
--HG--
extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03 17:22:47 -05:00
Nathan Binkert
61178c8de2
include signal.h
...
--HG--
extra : convert_revision : 9b5ad2704dfd63a1aa8ad0e4275fd0e3a7d32d6d
2007-03-03 12:26:14 -05:00
Gabe Black
5498d52985
Filled in with basic x86 stuff. Some things are missing, wrong, or nonsensical for x86.
...
--HG--
extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39
2007-03-03 17:19:52 +00:00
Gabe Black
0150515ac3
Filled in with basic x86 information. Some things are missing, wrong, or non-sensical in x86.
...
--HG--
extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
2007-03-03 17:18:29 +00:00
Gabe Black
10871b7342
Add build hooks for x86.
...
--HG--
extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
2007-03-03 16:01:48 +00:00
Nathan Binkert
e78bcd94a0
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into iceaxe.int.chaotic.net:/Users/nate/work/m5/outgoing
--HG--
extra : convert_revision : b3d48721ead389fa807c0d5392039d4fc71a252e
2007-03-03 07:47:00 -08:00
Nathan Binkert
53f5fda5de
Do the default argument stuff in python
...
--HG--
extra : convert_revision : 235f85e611a669401c6ddfbdf14244e80eb55888
2007-03-03 07:45:55 -08:00
Gabe Black
68ad153309
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32
--HG--
extra : convert_revision : bbd0def502e423e64e2c4f6415a4b043b60c7f90
2007-03-03 06:24:01 +00:00
Nathan Binkert
ffe6bebb05
Factor code out of main.cc and main.i into a bunch of files
...
so things are organized in a more sensible manner. Take apart
finalInit and expose the individual functions which are now
called from python. Make checkpointing a bit easier to use.
--HG--
extra : convert_revision : f470ddabbb47103e7b4734ef753c40089f2dcd9d
2007-03-02 22:24:00 -08:00
Gabe Black
23dc5099a4
Implement the _llseek syscall. It's Linux only, so we'll actually use the lseek syscall.
...
--HG--
extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
2007-03-03 03:34:55 +00:00
Gabe Black
477afcaf5b
Fix some issues with 32 bit processes.
...
--HG--
extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
2007-03-03 03:34:54 +00:00
Ali Saidi
4e8d2d1593
make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way as the twin 64 bit loads
...
src/arch/isa_parser.py:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/operands.isa:
src/base/bigint.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
src/mem/packet_access.hh:
make ldtw(a) Twin 32 bit load work correctly
--HG--
extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42
2007-03-02 22:34:51 -05:00
Gabe Black
d8ada247f4
Forgot to commit this new file last earlier.
...
--HG--
extra : convert_revision : f2d80ae551b7e29426141d5c9fe355b43a0b9c7d
2007-03-02 14:43:27 +00:00
Gabe Black
ececf101c7
Make the m5 psuedo instructions use the BasicOperate format
...
--HG--
extra : convert_revision : f02da702ab9b99da124fac7e10a07386b04f3a0f
2007-02-28 16:49:17 +00:00
Gabe Black
eb57b4f214
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32
--HG--
extra : convert_revision : 88d1401f6e6b7c82344abef2c81b3c22bf6a0499
2007-02-28 16:39:42 +00:00
Gabe Black
29e5df890d
Make trap instructions always generate TrapInstruction Fault objects which call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running.
...
--HG--
extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94
2007-02-28 16:36:38 +00:00
Gabe Black
99948060b2
The "hostname" variable isn't used in the process classes. It should be removed from the other ones as well.
...
--HG--
extra : convert_revision : 0c07534de42d6c32ac26d9e43709111e3ab30d57
2007-02-28 16:29:25 +00:00
Ali Saidi
f892608ff7
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : a4f80ce975a23ba9858e6bf2dbbfed8897dd1810
2007-02-24 22:10:06 -05:00
Ali Saidi
cf0e202cba
make m5 readfile work on solaris... we can have a solaris regression soon!
...
src/arch/sparc/isa/decoder.isa:
add readfile and break to sparc decoder
src/arch/sparc/isa/operands.isa:
fix O0-O5 operands registers
util/m5/Makefile.sparc:
Make sparc makefile compile a 64bit binary
util/m5/m5.c:
readfile was in here twice, once will be sufficient I think
util/m5/m5op_sparc.S:
implement readfile and debugbreak
--HG--
extra : convert_revision : 139b3f480ee6342b37b5642e072c8486d91a3944
2007-02-24 22:05:01 -05:00
Gabe Black
6ae4cae971
Ali and I both made the same change and we only need it once. I liked mine a little better.
...
--HG--
extra : convert_revision : 3a1b7856e6143ca089fd6e36492608377dfede19
2007-02-23 01:05:34 +00:00
Gabe Black
187cc99e4e
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32
--HG--
extra : convert_revision : a7697ea8457a03318e3fcf34775bf3ecc4786e8a
2007-02-23 01:05:33 +00:00
Ali Saidi
a5b73a6e33
Merge zizzer:/bk/newmem
...
into pb15.local:/Users/ali/work/m5.newmem
--HG--
extra : convert_revision : 887b278dac6db5ea17ade641de84d0ab8b05db96
2007-02-22 20:05:32 -05:00
Gabe Black
341a1eed6c
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32
--HG--
extra : convert_revision : 70dcd9d1d669c1c619411389487b7910861550e3
2007-02-22 13:18:23 +00:00
Gabe Black
34b4722aee
Make the m5 pseudo instructions only work in FS. Also, make sure any undefined opcodes in impdep2 (which in SE is all of them) trap with an illegal_instruction exception.
...
--HG--
extra : convert_revision : dd7848d0685e4cc6f5fd5e3b846a3f70b62ee30a
2007-02-22 13:17:51 +00:00
Nathan Binkert
c003dda793
Make it easier to turn off the remote debugger
...
--HG--
extra : convert_revision : d88784736df5f9b498770fb7e98f52715669c0e1
2007-02-21 22:25:48 -08:00
Ali Saidi
b750d6a597
Merge zizzer:/bk/newmem
...
into pb15.local:/Users/ali/work/m5.newmem
--HG--
extra : convert_revision : e0057583132ce545eb1867b446484e8984b97282
2007-02-22 01:15:16 -05:00
Nathan Binkert
fa4c3d74fe
Get rid of the ConsoleListener SimObject and just fold the
...
relevant code directly into the SimConsole object. Now,
you can easily turn off the listen port by just specifying
0 as the port.
--HG--
extra : convert_revision : c8937fa45b429d8a0728e6c720a599e38972aaf0
2007-02-21 22:14:11 -08:00
Ali Saidi
63fef6b011
fix se compiling oops
...
--HG--
extra : convert_revision : ce7ac94da0ed6bad457a8a9e4c949b0c3b09c2ae
2007-02-22 01:11:04 -05:00
Nathan Binkert
783e642ed8
Make sure that all variables in the NSGigE device model are
...
initialized.
--HG--
extra : convert_revision : b4b156ed8e3c0c4c4f8043ff86dc232ebad38668
2007-02-21 20:45:05 -08:00
Nathan Binkert
8e77d771f9
Make comments refer to ticks not cycles
...
--HG--
extra : convert_revision : 4970a76890a3256073423a827dd0c55cfcb19a08
2007-02-21 20:35:30 -08:00
Ali Saidi
f01f8f1be6
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 4105ebbeca59206bece27f229ee810d594fb4310
2007-02-21 21:06:29 -05:00
Ali Saidi
7a2ecf9e26
add pseduo instruction support for sparc
...
util/m5/Makefile.alpha:
Clean up to make it a bit easier to muck with
util/m5/Makefile.alpha:
Make the makefile more reasonable
util/m5/Makefile.alpha:
Remove authors from copyright.
util/m5/Makefile.alpha:
Updated Authors from bk prs info
util/m5/Makefile.alpha:
bk cp Makefile Makefile.alpha
src/arch/sparc/tlb.cc:
Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate
src/arch/alpha/isa/decoder.isa:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
Rename AlphaPseudo -> PseudoInst since it's all generic
src/arch/sparc/isa/bitfields.isa:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/includes.isa:
src/arch/sparc/isa/operands.isa:
Add support for pseudo instructions in sparc
util/m5/Makefile.alpha:
util/m5/Makefile.sparc:
split off alpha make file and sparc make file for m5 app
util/m5/m5.c:
ivle and ivlb aren't used anymore
util/m5/m5op.h:
stdint seems like a more generic better fit here
util/m5/m5op_alpha.S:
move the op ids into their own header file since we can share them between sparc and alpha
--HG--
rename : util/m5/Makefile => util/m5/Makefile.sparc
rename : util/m5/m5op.S => util/m5/m5op_alpha.S
extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
2007-02-21 21:06:17 -05:00
Nathan Binkert
06ae2d0445
Fix compile issues on gcc 4.1.x related to namespaces.
...
This basically involves moving the builder code outside of any
namespace. While we're at it, move a few braces outside of
a couple #if/#else/#endif blocks so it's easier to match up
the braces.
--HG--
extra : convert_revision : a7834532aadc63b0e0ff988dd5745049e02e6312
2007-02-21 16:42:16 -08:00
Nathan Binkert
2a67f2b08c
Fix tracing so it starts right away if --trace-start is not
...
specified.
--HG--
extra : convert_revision : 49c1ea0b8c313949124aed84b1055db0b3c55bd8
2007-02-21 14:08:13 -08:00
Nathan Binkert
a329631edb
Automatically generate m5/internal/__init__.py and swig/init.cc
...
based on the swig modules that we have
--HG--
extra : convert_revision : 2fd12db39d46608a62b9df36c2b36189f1d2bc30
2007-02-21 10:30:51 -08:00
Nathan Binkert
3fb3616be4
Fix majory brokenness in my previous MySQL commit, basically
...
this is just a shuffling around of code and fixes to make
stuff commit properly
--HG--
extra : convert_revision : a057f7fe4962cfc6200781ff66d2c26bf9c6eb8c
2007-02-21 10:15:17 -08:00
Nathan Binkert
5000c4d878
#include needed for compile
...
--HG--
extra : convert_revision : fda9ab0d04f77f27810018a8639d6ea8abb59326
2007-02-21 10:13:10 -08:00
Ali Saidi
9062525c23
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 10d4dc08411c7a433a7194e94f69ca1d639a1ce7
2007-02-18 19:57:58 -05:00
Ali Saidi
bd367d4825
implement vtophys and 32bit gdb support
...
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/sparc/arguments.hh:
move Copy* to vport since it's generic for all the ISAs
src/arch/sparc/isa_traits.hh:
the Solaris kernel sets up a virtual-> real mapping for all memory starting at SegKPMBase
src/arch/sparc/pagetable.hh:
add a class for getting bits out of the TteTag
src/arch/sparc/remote_gdb.cc:
add 32bit support kinda.... If its 32 bit
src/arch/sparc/remote_gdb.hh:
Add 32bit register offsets too.
src/arch/sparc/tlb.cc:
cleanup generation of tsb pointers
src/arch/sparc/tlb.hh:
add function to return tsb pointers for an address
make lookup public so vtophys can use it
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
write vtophys for sparc
src/base/bitfield.hh:
return a mask of bits first->last
src/mem/vport.cc:
src/mem/vport.hh:
move Copy* here since it's ISA generic
--HG--
extra : convert_revision : c42c331e396c0d51a2789029d8e232fe66995d0f
2007-02-18 19:57:46 -05:00
Nathan Binkert
4e7f8c0885
Get rid of the stand alone ParamContext since all of the
...
relevant stuff has now been moved to python.
--HG--
extra : convert_revision : 608e5ffd0e2b33949a2b183117216f136cfa4484
2007-02-18 09:31:25 -08:00
Nathan Binkert
ee93b48314
Get rid of the Serialize and IntervalStats Param contexts
...
since they're no longer used
--HG--
extra : convert_revision : e39590aa03cc4c961d2eb5dab57862811f431e4d
2007-02-18 09:08:32 -08:00
Nathan Binkert
e94103397c
Get rid of the Statistics and Statreset ParamContexts, and
...
expose all of the relevant functionality to python. Clean
up the mysql code while we're at it.
--HG--
extra : convert_revision : 5b711202a5a452b8875ebefb136a156b65c24279
2007-02-17 22:52:32 -08:00
Nathan Binkert
01f32efa4b
Check that there is a param context list before trying
...
to loop through it. This is more important as we get rid
of param contexts
--HG--
extra : convert_revision : 5a24048b5c3d609285da83dfcb106910afad6919
2007-02-17 22:36:39 -08:00
Nathan Binkert
a41f17b40e
Remove the event_ignore stuff since it was never really used
...
--HG--
extra : convert_revision : ef5f3492e8232d08af7e1eae64ba96c79ca14b6f
2007-02-17 22:11:21 -08:00
Nathan Binkert
8c1c68a31e
Give the progress event its own priority
...
--HG--
extra : convert_revision : 6357ade64deb42fae68b2766545b1c4cdc673fc9
2007-02-17 22:07:50 -08:00
Nathan Binkert
08f024d3ff
Default to tracing being disabled in C++, it will be turned
...
on in python. Fix the trace start code so it actually starts
when it is suppsed to. Make the Exec tracing stuff obey the
trace enabled flag.
--HG--
extra : convert_revision : 634ba0b4f52345d4bf40d43e239cef7ef43e7691
2007-02-17 20:32:39 -08:00
Nathan Binkert
18e245ad0b
Pass an exception from a python event through the event queue
...
back into python so we don't just silently ignore those errors
--HG--
extra : convert_revision : e2f5566a4681f1b8ea80af50071119118afa7d8a
2007-02-17 20:27:11 -08:00
Ali Saidi
b2fd2a813d
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : f9fd4df544144a691bb5956e3f84036a61822547
2007-02-15 15:24:19 -05:00
Ali Saidi
e8cd54e805
fixup remote gdb support for sparc fs
...
--HG--
extra : convert_revision : 5edf0ad492fe438d66bcf0ae469ef841cd71e157
2007-02-15 15:24:08 -05:00
Gabe Black
6bc3e601a6
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem
--HG--
extra : convert_revision : 4878ca509f9982c065933a41ffc87808edb08b00
2007-02-14 15:45:29 -05:00
Gabe Black
276e52cdec
Force the st_blksize field of a stat call to be 8k.
...
--HG--
extra : convert_revision : 6cd2dc622ca95cc1ea89bd5e5cbf33d9510c351c
2007-02-14 12:58:28 -05:00
Ali Saidi
e3dcbc94f7
Make mulitple consoles work and be distinguishable from each other
...
src/dev/alpha/tsunamireg.h:
get rid of things that aren't really tsunami registers
src/dev/platform.hh:
src/dev/uart.cc:
the uart pointer isn't used anymore
src/dev/simconsole.cc:
make the simconsole print something more useful to distinguish between various consoles in a single system
src/dev/uart8250.hh:
put the needed uart defines in here rather than including them from tsunamireg
src/python/m5/objects/T1000.py:
add a console to the T1000 config for the hypervisor
--HG--
extra : convert_revision : 76ca92122e611eaf76b989bc699582eef8297be8
2007-02-13 15:58:06 -05:00
Steve Reinhardt
f55fd68f88
Update MIPS ISA description to work with new write result interface
...
for store conditional.
--HG--
extra : convert_revision : 73efd2ca17994e0e19c08746441874a2ac8183af
2007-02-13 08:09:09 -08:00
Ali Saidi
ca5cd68df4
fix compiling problems
...
--HG--
extra : convert_revision : 9ecfd5a0a151c03503e42faf98240da12fd719b1
2007-02-13 10:07:50 -05:00
Nathan Binkert
d8c7ebf904
Merge all of the execution trace configuration stuff into
...
the traceflags infrastructure. InstExec is now just Exec
and all of the command line options are now trace options.
--HG--
extra : convert_revision : 4adfa9dfbb32622d30ef4e63c06c7d87da793c8f
2007-02-13 00:59:01 -08:00
Nathan Binkert
d7c1436a44
Rearrange traceflags.py so that the file generation only happens if
...
the script is invoked as main. This allows us to import traceflags.py
if we just want the list of available flags.
Embed traceflags.py into the zipfile so it can be accessed from the
python side of things. With this, print an error on invalid flags and
add --trace-help option that will print out the list of trace flags
that are compiled in. If a flag is prefixed with a '-', now that flag
will be disabled.
--HG--
extra : convert_revision : 2260a596b07d127c582ff73474dbbdb0583db524
2007-02-13 00:16:41 -08:00
Ali Saidi
f72a999393
some forgotten commits
...
--HG--
extra : convert_revision : 213440066c700ed5891a6d4568928b7f3f2fe750
2007-02-12 18:40:08 -05:00
Ali Saidi
49a9378718
make hver match legion
...
--HG--
extra : convert_revision : 5bfe4b943ca5b3e30a7097a46cab4f93dadd714f
2007-02-12 13:58:03 -05:00
Ali Saidi
b9005f3562
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
src/cpu/simple/atomic.cc:
merge steve's changes in.
--HG--
extra : convert_revision : a17eda37cd63c9380af6fe68b0aef4b1e1974231
2007-02-12 13:22:36 -05:00
Ali Saidi
b5a4d95811
rename store conditional stuff as extra data so it can be used for conditional swaps as well
...
Add support for a twin 64 bit int load
Add Memory barrier and write barrier flags as appropriate
Make atomic memory ops atomic
src/arch/alpha/isa/mem.isa:
src/arch/alpha/locked_mem.hh:
src/cpu/base_dyn_inst.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_impl.hh:
rename store conditional stuff as extra data so it can be used for conditional swaps as well
src/arch/alpha/types.hh:
src/arch/mips/types.hh:
src/arch/sparc/types.hh:
add a largest read data type for statically allocating read buffers in atomic simple cpu
src/arch/isa_parser.py:
Add support for a twin 64 bit int load
src/arch/sparc/isa/decoder.isa:
Make atomic memory ops atomic
Add Memory barrier and write barrier flags as appropriate
src/arch/sparc/isa/formats/mem/basicmem.isa:
add post access code block and define a twinload format for twin loads
src/arch/sparc/isa/formats/mem/blockmem.isa:
remove old microcoded twin load coad
src/arch/sparc/isa/formats/mem/mem.isa:
swap.isa replaces the code in loadstore.isa
src/arch/sparc/isa/formats/mem/util.isa:
add a post access code block
src/arch/sparc/isa/includes.isa:
need bigint.hh for Twin64_t
src/arch/sparc/isa/operands.isa:
add a twin 64 int type
src/cpu/simple/atomic.cc:
src/cpu/simple/atomic.hh:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
add support for twinloads
add support for swap and conditional swap instructions
rename store conditional stuff as extra data so it can be used for conditional swaps as well
src/mem/packet.cc:
src/mem/packet.hh:
Add support for atomic swap memory commands
src/mem/packet_access.hh:
Add endian conversion function for Twin64_t type
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/request.hh:
Add support for atomic swap memory commands
Rename sc code to extradata
--HG--
extra : convert_revision : 69d908512fb34a4e28b29a6e58b807fb1a6b1656
2007-02-12 13:06:30 -05:00
Steve Reinhardt
ad17b32651
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into vm1.(none):/home/stever/bk/newmem-head
--HG--
extra : convert_revision : 496428e23050122a8a0029e5fddea261bef5729e
2007-02-12 09:27:32 -08:00
Steve Reinhardt
f78bc80bd7
Move store conditional result checking from SimpleAtomicCpu write
...
function into Alpha ISA description. write now just generically
returns a result value if the res pointer is non-null (which means
we can only provide a res pointer if we expect a valid result
value).
--HG--
extra : convert_revision : fb1c315515787f5fbbf7d1af7e428bdbfe8148b8
2007-02-12 09:26:47 -08:00
Nathan Binkert
da1ad46482
cleanup
...
--HG--
extra : convert_revision : 84114216854dfcd468115bbf5398333e98056a58
2007-02-12 06:26:52 -08:00
Nathan Binkert
184decd196
Clean up tracing stuff more, get rid of the trace log since
...
its not all that useful. Fix a few bugs with python/C++
integration.
--HG--
extra : convert_revision : a706512f7dc8b0c88f1ff96fe35ab8fbf9548b78
2007-02-10 15:14:50 -08:00
Nathan Binkert
63a8240059
Get rid of the Random context and add the support directly to python.
...
We don't currently use randomness much, so I didn't go too far, but
in the future, we may want to actually expose the random number values
themselves to python. For now, I'll at least let you seed it.
While we're at it, clean up a clearly bad way for generating random
doubles.
--HG--
extra : convert_revision : df2aa8b58dd0d9c2a7c771668a760b2df8db1e11
2007-02-09 16:44:02 -08:00
Nathan Binkert
81c5d0e3d8
Clean up from my last commit to the trace stuff.
...
--HG--
extra : convert_revision : b6a975d1c4195a764ba875bc3aaaa064be4955b7
2007-02-09 16:30:06 -08:00
Nathan Binkert
a24ccc1ef2
Get rid of the Trace ParamContext and give python direct
...
access to enabling/disabling tracing. Command line is
unchanged except for the removal of --trace-cycle since
it's not so clear what that means.
--HG--
extra : convert_revision : c0164d92d3615d76d0c6acaabaafd92a9278212a
2007-02-09 14:39:56 -08:00
Nathan Binkert
27c2138882
Use c99 variadic macros for non gnu compilers
...
--HG--
extra : convert_revision : 4e9fda42e9f5ed3e9f66e5bd178c45537792073b
2007-02-08 20:59:11 -08:00
Nathan Binkert
1f834b569c
Get rid of the gross operator,()/variadic macro hack
...
that made ccprintf and friends work, turn it into a
normal function (though it still has a slightly strange
implementation.) All instances of variadic macros
are not yet removed, but I know how, and it will happen.
One side effect of this new implementation is that a
cprintf statement can now only have 16 parameters, though
it's easy enough to raise this number if needed.
--HG--
extra : convert_revision : 85cb3c17f8e2ecf9cd2f31ea80a760a28ea127a7
2007-02-07 22:11:30 -08:00
Nathan Binkert
af698e8b05
Quick program to time how long ccprintf takes to write
...
to a stream compared to sprintf to a buffer.
--HG--
extra : convert_revision : de80724943d18aa110aa39cde9414252d9a7944c
2007-02-07 22:02:09 -08:00
Steve Reinhardt
2ec4a6c071
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head
--HG--
extra : convert_revision : c56b8160b403fde235636ca5b5b4cecd206ffa4c
2007-02-07 22:33:44 -05:00
Ali Saidi
fdaff2b108
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 60aabc4b93ef9d742f7e07363bd51f24170b85b8
2007-02-07 16:43:47 -05:00
Steve Reinhardt
6b37bb6710
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into vm1.(none):/home/stever/bk/newmem-head
--HG--
extra : convert_revision : c2350e01a052114a264f26551b13fca03a835c61
2007-02-07 10:55:14 -08:00
Steve Reinhardt
997fc505a8
Make memory commands dense again to avoid cache stat table explosion.
...
Created MemCmd class to wrap enum and provide handy methods to
check attributes, convert to string/int, etc.
--HG--
extra : convert_revision : 57f147ad893443e3a2040c6d5b4cdb1a8033930b
2007-02-07 10:53:37 -08:00
Steve Reinhardt
23d970e6b9
More DPRINTF cleanup.
...
--HG--
extra : convert_revision : db89cea42b46476d19333038522a6c144eafdab1
2007-02-06 23:53:48 -08:00
Nathan Binkert
a19e9ea5fc
Initialize the variable to something.
...
--HG--
extra : convert_revision : bfe1e70130719ff239987d725b089c6d7152c541
2007-02-06 22:32:37 -08:00
Nathan Binkert
38db47005c
Include compiler.hh since we use some of the #defines
...
--HG--
extra : convert_revision : 1040addcf3f52d8d9fed2930890dadf524205af9
2007-02-06 22:31:15 -08:00
Steve Reinhardt
51e54f519d
Minor DPRINTF fixes.
...
--HG--
extra : convert_revision : 41956c9a480163ecac7807982215027e8ff1a4a9
2007-02-06 21:53:05 -08:00
Ali Saidi
8ffd12e807
merge my index fix and lisa's fix
...
--HG--
extra : convert_revision : 5f2c7d46c96fa061bbfb66edf188d405ca600020
2007-02-06 18:47:42 -05:00
Kevin Lim
310d8f0992
Fix for LL/SC that Ron sent me.
...
--HG--
extra : convert_revision : b3510a23d8a9eb466939f38491a109c3a65a7363
2007-02-06 15:54:44 -05:00
Ali Saidi
ebb6972dd3
more fp fixes
...
fix unaligned accesses in mmaped disk device
src/arch/sparc/isa/decoder.isa:
get (ld|st)fsr ops working right. In reality the fp enable check needs to go higher up in the emitted code
src/arch/sparc/isa/formats/basic.isa:
move the cexec into the aexec field
src/cpu/exetrace.cc:
copy the exception state from legion when we get it wrong. We aren't going to get it right without an fp emulation layer
src/dev/sparc/mm_disk.cc:
src/dev/sparc/mm_disk.hh:
fix unaligned accesses in the memory mapped disk device
--HG--
extra : convert_revision : aaa33096b08cf0563fe291d984a87493a117e528
2007-02-06 15:52:33 -05:00
Steve Reinhardt
572addee5d
Fix for previous commit: need to ifdef NDEBUG on the
...
definition as well as the declaration.
--HG--
extra : convert_revision : 4f073fa6b47bf21abf58d92cb1c9eed699c9c89e
2007-02-06 10:04:44 -08:00
Steve Reinhardt
f5a803f56e
Use an instance counter to give Events repeatable IDs
...
in debugging mode (especially valuable for tracediff).
--HG--
extra : convert_revision : 227434a06b5271a8300f2f6861bd06c4ac19e6c4
2007-02-05 22:05:00 -08:00
Ali Saidi
ecef27f172
more sparc fixes
...
src/arch/sparc/isa/decoder.isa:
fix rdgsr fault check
src/arch/sparc/tlb.cc:
block asis are now supported
--HG--
extra : convert_revision : cf55d648d2c5184fab03b6fe057d0e33c1dfc393
2007-02-02 19:02:27 -05:00
Ali Saidi
665ddde57a
make interrupt code serialize itself and fix indenting
...
--HG--
extra : convert_revision : d0bb23c7922568586b640084ac719e809cc8422f
2007-02-02 18:05:21 -05:00
Ali Saidi
592f35ac0f
fix mostly floating point related
...
src/arch/sparc/floatregfile.cc:
fix fp read/writing to registers... looking for suggestions on cleaner ways if anyone has them
src/arch/sparc/isa/decoder.isa:
fix some fp implementations
src/arch/sparc/isa/formats/basic.isa:
add new fp op class that 0 cexec in fsr and sets rounding mode for the up comming op
src/arch/sparc/isa/includes.isa:
include the appropriate header files for the rounding code
src/arch/sparc/miscregfile.cc:
print fsr out when it's read/written and the Sparc traceflgas in on
src/cpu/exetrace.cc:
fix printing of float registers
--HG--
extra : convert_revision : 49faab27f2e786a8455f9ca0f3f0132380c9d992
2007-02-02 18:04:42 -05:00
Lisa Hsu
17cbfe55fd
Merge zizzer:/bk/newmem
...
into zed.eecs.umich.edu:/z/hsul/work/sparc/x86.m5
--HG--
extra : convert_revision : 62a0017a1147631513db7878f4e4d08fca776bc1
2007-02-01 15:35:26 -05:00
Lisa Hsu
1e8bbb81cb
only increment numPosted if an interrupt of that type hasn't been posted before.
...
--HG--
extra : convert_revision : 6671c594b78d2e38449069157f39af96b81340f2
2007-02-01 15:34:52 -05:00
Ali Saidi
5c7192daed
make sparc fs less chatty
...
src/SConscript:
strip doesn't take a src and dest in solaris
--HG--
extra : convert_revision : 57f95eda0e3232475a5b55753ace3f3f0fced8b3
2007-01-31 18:32:27 -05:00
Ali Saidi
36a1912bf0
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 276b640c5c5a51e88e9bd630960ad462d9f0cb8d
2007-01-30 18:27:16 -05:00
Ali Saidi
ac36fb6e64
add fsr to the list of registers we are interested in
...
--HG--
extra : convert_revision : 2cc0d0144abab264aa0ec8c07242cdab2dffd4f8
2007-01-30 18:27:04 -05:00
Ali Saidi
fc79ace502
Make SPARC checkpointing work
...
src/arch/sparc/floatregfile.cc:
Fix serialization for fpreg
src/arch/sparc/intregfile.cc:
fix serialization for intreg
src/arch/sparc/miscregfile.cc:
fix serialization from miscreg
src/arch/sparc/pagetable.cc:
fix serialization for page table
src/arch/sparc/regfile.cc:
need to serialize nnpc
src/arch/sparc/tlb.cc:
write serialization code for tlb
src/cpu/base.cc:
provide a way to find the thread number a context is
serialize the instruction counter
src/cpu/base.hh:
provide a way to find the thread number a context is
and given a thread number find a context pointer
src/cpu/cpuevent.hh:
provide method to get thread context from a cpu event for serialization
src/dev/sparc/t1000.cc:
src/dev/sparc/t1000.hh:
nothing to serialize in t1000
src/sim/serialize.cc:
src/sim/serialize.hh:
Make findObj() work (it hasn't since we did the python conversion stuff)
--HG--
extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
2007-01-30 18:25:39 -05:00
Gabe Black
cf0ba1dfb0
Merge zizzer:/bk/newmem
...
into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : 7b332ee4c737206511d26db391117eb1fe5ea290
2007-01-30 16:12:47 -05:00
Gabe Black
efb14c585b
Implemented fbfss and fbpfcc instructions, and cleaned up branch code a little.
...
src/arch/sparc/isa/base.isa:
Added passesFpCondition function to help with fbfcc and fbpfcc instructions.
src/arch/sparc/isa/decoder.isa:
Added fbfcc and fbpfcc instructions, and cleaned up branch code slightly.
src/arch/sparc/isa/formats/branch.isa:
Minor cleanup.
--HG--
extra : convert_revision : 6586b46418f1f70bace41407f267fee30c657714
2007-01-30 16:12:38 -05:00
Ali Saidi
8bc4925775
change std::isnan() to a using namespace std and isnan(). We need a better way to do this.
...
--HG--
extra : convert_revision : 4f59ca8e6425db23f57a1f3f65a4874e483d0ecc
2007-01-30 14:43:25 -05:00
Ali Saidi
e82e5b5084
use std:: for isnan() and fix decoding of fcmpe*
...
--HG--
extra : convert_revision : 06be0f8572e26c3c7e761b482248304ce1afa038
2007-01-30 11:22:22 -05:00
Gabe Black
0cdcd207ac
sizeof with a pointer to dynamically allocated memory will return the size of the pointer, not the memory.
...
--HG--
extra : convert_revision : 04647d9fa0c464960d37797717f8171862cf48f8
2007-01-30 02:45:59 -05:00
Gabe Black
a4a87daad1
Make clearSingleStep in SPARC a warning, and rephrase the panic for setSingleStep
...
--HG--
extra : convert_revision : fde27a1faa6c03a24a4321a153dfa89a438f9a32
2007-01-30 02:44:24 -05:00
Gabe Black
e3fad2dcea
Make the FpUnimpl format actually write the Fsr.
...
--HG--
extra : convert_revision : 84717cd3a8fa9fb85bd0693304e05ef475b05d07
2007-01-30 00:21:18 -05:00
Gabe Black
230fc0a0d1
Added FpUnimpl format for quad precision and other purposefully unimplemented floating point ops.
...
--HG--
extra : convert_revision : 356fec86c35560b20ea8eee80844602bbcec145f
2007-01-30 00:08:42 -05:00
Gabe Black
a8b8962a4d
Merge zizzer:/bk/newmem
...
into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : 0e4a54c21f32fec13deaf00b5d61c258007f172b
2007-01-29 22:57:18 -05:00
Gabe Black
4a16ea95c1
Fix the Frs?s operands to use single width by default, rather than double width.
...
--HG--
extra : convert_revision : 36137ee025dc5c79665b041b43bd89505715ca70
2007-01-29 22:54:28 -05:00
Gabe Black
1f7db14dd4
Add implementation for the fcmp instructions. These don't behave -quite- right with respect to quite NaNs, but hopefully we don't need to worry about the distinction.
...
--HG--
extra : convert_revision : 67b6583a20530b7a393aa04d0b71031d3c72ecdd
2007-01-29 22:52:54 -05:00
Gabe Black
a5cb9b51be
Fix the FCMPCC bitfield.
...
--HG--
extra : convert_revision : d2c538e7f469bd12a80eb8585c78d5325d6e6141
2007-01-29 22:46:01 -05:00
Ali Saidi
d92f0d370b
timegm() is a gnuism... replace with the code from the timegm() man page
...
--HG--
extra : convert_revision : f2b80a0b7768edc370e3f07c45cb3bb9a46450a9
2007-01-29 19:04:06 -05:00
Ali Saidi
716a2dc180
fix some over sights in moving windowing and ccr registers to int reg file
...
--HG--
extra : convert_revision : 4e83e5163076aeef72ec5caf1e0d7adea11da875
2007-01-29 19:03:14 -05:00
Ali Saidi
7545b2b650
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 7b8b791815d1fb51cc7ad085307a640b2ee51642
2007-01-29 14:44:45 -05:00
Gabe Black
fc7e36553b
Cleaned up disassembly a little.
...
--HG--
extra : convert_revision : 4665ac7760c9b78a1d7699ceeb541b694211a947
2007-01-29 10:49:59 -05:00
Gabe Black
e176c7d1ff
A minor hack to get branch prediction to behave like before on Alpha.
...
--HG--
extra : convert_revision : 1eaabd13c72aa42c512a04d162a87491818bc621
2007-01-29 10:48:20 -05:00
Gabe Black
105c336743
Fixed a warning about an unused variable.
...
--HG--
extra : convert_revision : f9c78e86b60c3085cd95b1b4e132205e0ef584dd
2007-01-29 10:46:54 -05:00
Gabe Black
44c6ca84c6
Merge zizzer:/bk/newmem
...
into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : 7bea2cb13e2de527134d98d4ee21a55dc4a7d1ad
2007-01-28 18:28:34 -05:00
Ali Saidi
b37b6e1708
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : e302dc4d7a20646bb0ea363127b2658a6d6e810c
2007-01-28 16:18:44 -05:00
Ali Saidi
6619fcea4e
Merge zizzer:/bk/newmem
...
into pb15.local:/Users/ali/work/m5.newmem.head
--HG--
extra : convert_revision : b4db0b350c8a5b3452ede74e5b42eec8ed6685c3
2007-01-28 15:55:44 -05:00
Ali Saidi
7494aa8a14
make unimplemented ops fail
...
return correct traps for ua2005 fpops that aren't implemented in hw
--HG--
extra : convert_revision : 998fd43f77c5de7078bac1c6caab296b18c9366d
2007-01-28 15:42:01 -05:00
Ali Saidi
84c6463c3e
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : f25fd4855a1eaaecb29e6ccc3cee22cf07e4108b
2007-01-28 15:30:54 -05:00
Ali Saidi
a729e4d4b8
fix comparing fp registers between legion and m5
...
make fp writes also chatty with the Sparc traceflag
src/arch/sparc/floatregfile.cc:
make fp writes also chatty with the Sparc traceflag
src/cpu/exetrace.cc:
fix comparing fp registers between legion and m5
--HG--
extra : convert_revision : f3703afae56249f137451262bc1b6919d465e714
2007-01-28 15:30:14 -05:00
Gabe Black
91ca1b48e2
Merge zizzer:/bk/newmem
...
into zower.eecs.umich.edu:/eecshome/m5/newmem
--HG--
extra : convert_revision : 2398e48722dd71ddf270e93bd7b387078fb30e6b
2007-01-28 14:46:56 -05:00
Nathan Binkert
37795b104d
Stick the conversion of python to unix time with all of
...
the other param code so that other functions can use it
as well.
--HG--
extra : convert_revision : a8becdeadc70af0b64bff5b0770788dfba6e1857
2007-01-28 10:26:59 -08:00
Ali Saidi
f9a341f8e7
I missed a couple of things
...
--HG--
extra : convert_revision : 2fa44718e381ff743fa1cf12f4db2221dca87e4c
2007-01-27 15:47:18 -05:00
Ali Saidi
02bd40d552
While I'm waiting for legion to run make m5 compile with a few more compilers
...
SConstruct:
src/SConscript:
Add flags for Intel CC while i'm at it
src/base/compiler.hh:
the _Pragma stuff needst to be called this way unless someone happens to have a cleaner way
src/base/cprintf_formats.hh:
add std:: where appropriate
src/base/statistics.hh:
use this->map since icc was getting confused about std::map vs the locally defined map
src/cpu/static_inst.hh:
Add some more dummy returns where needed
src/mem/packet.hh:
add more dummy returns where needed
src/sim/host.hh:
use limits to come up with max tick
--HG--
extra : convert_revision : 08e9f7898b29fb9d063136529afb9b6abceab60c
2007-01-27 15:38:04 -05:00
Gabe Black
0358ccee23
Merge zizzer:/bk/newmem
...
into zower.eecs.umich.edu:/eecshome/m5/newmem
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
Hand Merge
--HG--
extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
2007-01-27 01:59:20 -05:00
Gabe Black
e41f54f97f
Got rid of some DPRINTFs that were printing raw pointers.
...
--HG--
extra : convert_revision : a79f5ee225208338594e7c4ecf0a71fef941918c
2007-01-27 01:49:21 -05:00
Gabe Black
f48b22f986
Fixed up printReg so that control registers are printed by name. This is possible now becauase Ctrl_Base_DepTag gets added into control register numbers.
...
--HG--
extra : convert_revision : d6de3be277127547cd942769cd34a54a4ec8db32
2007-01-27 01:47:07 -05:00
Ali Saidi
5c7bf74c07
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : ca6e616e64d4528478c1505dc7ce111b8888d389
2007-01-26 19:00:38 -05:00
Ali Saidi
de9ac2153e
forgot to include this file
...
--HG--
extra : convert_revision : 4b570a33a951e9286b38873b2be3651ffaee8532
2007-01-26 19:00:17 -05:00
Ali Saidi
5f51fe20de
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 53ee81b099930d4d827db99e2d944ffb8645c706
2007-01-26 18:57:35 -05:00
Ali Saidi
2939d7d061
Make Sparc traceflag even more chatty
...
some fixes to fp instructions to use the single precision registers
if this is an fp op emit fp check code
add fpregs to m5legion struct
src/arch/sparc/floatregfile.cc:
Make Sparc traceflag even more chatty
src/arch/sparc/isa/base.isa:
add code to check if the fpu is enabled
src/arch/sparc/isa/decoder.isa:
some fixes to fp instructions to use the single precision registers
fix smul again
fix subc/subcc/subccc condition code setting
src/arch/sparc/isa/formats/basic.isa:
src/arch/sparc/isa/formats/mem/util.isa:
if this is an fp op emit fp check code
src/cpu/exetrace.cc:
check fp regs as well as int regs
src/cpu/m5legion_interface.h:
add fpregs to m5legion struct
--HG--
extra : convert_revision : e7d26d10fb8ce88f96e3a51f84b48c3b3ad2f232
2007-01-26 18:57:16 -05:00
Ali Saidi
6d9d0c68b5
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.suncc
--HG--
extra : convert_revision : 1706f6218abec7eb575dcff3ad4aef83894f64ab
2007-01-26 18:50:28 -05:00
Ali Saidi
fd8a4ff5a8
Merge zeep.pool:/z/saidi/work/m5.newmem
...
into zeep.pool:/z/saidi/work/m5.suncc
--HG--
extra : convert_revision : 20f61a524a3b53fc0afcf53a24b5a1fe1d96f579
2007-01-26 18:49:40 -05:00
Ali Saidi
63fdabf191
make our code a little more standards compliant
...
pretty close to compiling w/ suns compiler
briefly:
add dummy return after panic()/fatal()
split out flags by compiler vendor
include cstring and cmath where appropriate
use std namespace for string ops
SConstruct:
Add code to detect compiler and choose cflags based on detected compiler
Fix zlib check to work with suncc
src/SConscript:
split out flags by compiler vendor
src/arch/sparc/isa/decoder.isa:
use correct namespace for sqrt
src/arch/sparc/isa/formats/basic.isa:
add dummy return around panic
src/arch/sparc/isa/formats/integerop.isa:
use correct namespace for stringops
src/arch/sparc/isa/includes.isa:
include cstring and cmath where appropriate
src/arch/sparc/isa_traits.hh:
remove dangling comma
src/arch/sparc/system.cc:
dummy return to make sun cc front end happy
src/arch/sparc/tlb.cc:
src/base/compression/lzss_compression.cc:
use std namespace for string ops
src/arch/sparc/utility.hh:
no reason to say something is unsigned unsigned int
src/base/compression/null_compression.hh:
dummy returns to for suncc front end
src/base/cprintf.hh:
use standard variadic argument syntax instead of gnuc specefic renaming
src/base/hashmap.hh:
don't need to define hash for suncc
src/base/hostinfo.cc:
need stdio.h for sprintf
src/base/loader/object_file.cc:
munmap is in std namespace not null
src/base/misc.hh:
use M5 generic noreturn macros
use standard variadic macro __VA_ARGS__
src/base/pollevent.cc:
we need file.h for file flags
src/base/random.cc:
mess with include files to make suncc happy
src/base/remote_gdb.cc:
malloc memory for function instead of having a non-constant in an array size
src/base/statistics.hh:
use std namespace for floor
src/base/stats/text.cc:
include math.h for rint (cmath won't work)
src/base/time.cc:
use suncc version of ctime_r
src/base/time.hh:
change macro to work with both gcc and suncc
src/base/timebuf.hh:
include cstring from memset and use std::
src/base/trace.hh:
change variadic macros to be normal format
src/cpu/SConscript:
add dummy returns where appropriate
src/cpu/activity.cc:
include cstring for memset
src/cpu/exetrace.hh:
include cstring fro memcpy
src/cpu/simple/base.hh:
add dummy return for panic
src/dev/baddev.cc:
src/dev/pciconfigall.cc:
src/dev/platform.cc:
src/dev/sparc/t1000.cc:
add dummy return where appropriate
src/dev/ide_atareg.h:
make define work for both gnuc and suncc
src/dev/io_device.hh:
add dummy returns where approirate
src/dev/pcidev.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.hh:
src/mem/dram.cc:
src/mem/packet.cc:
src/mem/port.cc:
include cstring for string ops
src/dev/sparc/mm_disk.cc:
add dummy return where appropriate
include cstring for string ops
src/mem/cache/miss/blocking_buffer.hh:
src/mem/port.hh:
Add dummy return where appropriate
src/mem/cache/tags/iic.cc:
cast hastSets to double for log() call
src/mem/physical.cc:
cast pmemAddr to char* for munmap
src/sim/byteswap.hh:
make define work for suncc and gnuc
--HG--
extra : convert_revision : ef8a1f1064e43b6c39838a85c01aee4f795497bd
2007-01-26 18:48:51 -05:00
Gabe Black
47b2aa6346
Fixed the number of integer registers. There are MaxGL+1 sets of globals, not just MaxGL.
...
--HG--
extra : convert_revision : 6fd090f112611db1e72a1f129dff03687d52930a
2007-01-26 16:38:29 -05:00
