AddrRange: Simplify AddrRange params Python hierarchy
This patch simplifies the Range object hierarchy in preparation for an address range class that also allows striping (e.g. selecting a few bits as matching in addition to the range). To extend the AddrRange class to an AddrRegion, the first step is to simplify the hierarchy such that we can make it as lean as possible before adding the new functionality. The only class using Range and MetaRange is AddrRange, and the three classes are now collapsed into one.
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9 changed files with 43 additions and 70 deletions
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@ -519,7 +519,9 @@ def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None, Ruby = False):
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# We assume below that there's at least 1MB of memory. We'll require 2
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# We assume below that there's at least 1MB of memory. We'll require 2
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# just to avoid corner cases.
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# just to avoid corner cases.
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assert(self.physmem.range.second.getValue() >= 0x200000)
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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self.memories.unproxy(self)))
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assert(phys_mem_size >= 0x200000)
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self.e820_table.entries = \
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self.e820_table.entries = \
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[
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[
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@ -527,7 +529,7 @@ def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None, Ruby = False):
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X86E820Entry(addr = 0, size = '1MB', range_type = 2),
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X86E820Entry(addr = 0, size = '1MB', range_type = 2),
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# Mark the rest as available
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# Mark the rest as available
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X86E820Entry(addr = 0x100000,
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X86E820Entry(addr = 0x100000,
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size = '%dB' % (self.physmem.range.second - 0x100000 + 1),
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size = '%dB' % (phys_mem_size - 0x100000),
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range_type = 1)
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range_type = 1)
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]
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]
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@ -133,10 +133,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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l2_cntrl_nodes.append(l2_cntrl)
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l2_cntrl_nodes.append(l2_cntrl)
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cntrl_count += 1
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cntrl_count += 1
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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mem_module_size = phys_mem_size / options.num_dirs
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mem_module_size = phys_mem_size / options.num_dirs
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for i in xrange(options.num_dirs):
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for i in xrange(options.num_dirs):
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@ -105,9 +105,8 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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cntrl_count += 1
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cntrl_count += 1
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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mem_module_size = phys_mem_size / options.num_dirs
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mem_module_size = phys_mem_size / options.num_dirs
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for i in xrange(options.num_dirs):
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for i in xrange(options.num_dirs):
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@ -132,10 +132,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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l2_cntrl_nodes.append(l2_cntrl)
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l2_cntrl_nodes.append(l2_cntrl)
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cntrl_count += 1
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cntrl_count += 1
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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mem_module_size = phys_mem_size / options.num_dirs
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mem_module_size = phys_mem_size / options.num_dirs
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for i in xrange(options.num_dirs):
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for i in xrange(options.num_dirs):
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@ -155,10 +155,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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l2_cntrl_nodes.append(l2_cntrl)
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l2_cntrl_nodes.append(l2_cntrl)
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cntrl_count += 1
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cntrl_count += 1
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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mem_module_size = phys_mem_size / options.num_dirs
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mem_module_size = phys_mem_size / options.num_dirs
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for i in xrange(options.num_dirs):
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for i in xrange(options.num_dirs):
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@ -131,9 +131,8 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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cntrl_count += 1
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cntrl_count += 1
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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mem_module_size = phys_mem_size / options.num_dirs
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mem_module_size = phys_mem_size / options.num_dirs
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#
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#
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@ -106,9 +106,8 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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cntrl_count += 1
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cntrl_count += 1
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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mem_module_size = phys_mem_size / options.num_dirs
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mem_module_size = phys_mem_size / options.num_dirs
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for i in xrange(options.num_dirs):
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for i in xrange(options.num_dirs):
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@ -188,9 +188,8 @@ def create_system(options, system, piobus = None, dma_ports = []):
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total_mem_size.value += dir_cntrl.directory.size.value
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total_mem_size.value += dir_cntrl.directory.size.value
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dir_cntrl.directory.numa_high_bit = numa_bit
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dir_cntrl.directory.numa_high_bit = numa_bit
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phys_mem_size = 0
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phys_mem_size = sum(map(lambda mem: mem.range.size(),
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for mem in system.memories.unproxy(system):
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system.memories.unproxy(system)))
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phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1
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assert(total_mem_size.value == phys_mem_size)
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assert(total_mem_size.value == phys_mem_size)
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ruby_profiler = RubyProfiler(ruby_system = ruby,
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ruby_profiler = RubyProfiler(ruby_system = ruby,
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@ -549,86 +549,64 @@ class Addr(CheckedInt):
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else:
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else:
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return self.value + other
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return self.value + other
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class AddrRange(ParamValue):
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cxx_type = 'Range<Addr>'
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class MetaRange(MetaParamValue):
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def __init__(cls, name, bases, dict):
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super(MetaRange, cls).__init__(name, bases, dict)
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if name == 'Range':
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return
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cls.cxx_type = 'Range< %s >' % cls.type.cxx_type
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class Range(ParamValue):
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__metaclass__ = MetaRange
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type = Int # default; can be overridden in subclasses
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def __init__(self, *args, **kwargs):
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def __init__(self, *args, **kwargs):
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def handle_kwargs(self, kwargs):
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def handle_kwargs(self, kwargs):
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if 'end' in kwargs:
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if 'end' in kwargs:
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self.second = self.type(kwargs.pop('end'))
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self.end = Addr(kwargs.pop('end'))
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elif 'size' in kwargs:
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elif 'size' in kwargs:
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self.second = self.first + self.type(kwargs.pop('size')) - 1
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self.end = self.start + Addr(kwargs.pop('size')) - 1
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else:
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else:
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raise TypeError, "Either end or size must be specified"
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raise TypeError, "Either end or size must be specified"
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if len(args) == 0:
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if len(args) == 0:
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self.first = self.type(kwargs.pop('start'))
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self.start = Addr(kwargs.pop('start'))
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handle_kwargs(self, kwargs)
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handle_kwargs(self, kwargs)
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elif len(args) == 1:
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elif len(args) == 1:
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if kwargs:
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if kwargs:
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self.first = self.type(args[0])
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self.start = Addr(args[0])
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handle_kwargs(self, kwargs)
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handle_kwargs(self, kwargs)
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elif isinstance(args[0], Range):
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self.first = self.type(args[0].first)
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self.second = self.type(args[0].second)
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elif isinstance(args[0], (list, tuple)):
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elif isinstance(args[0], (list, tuple)):
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self.first = self.type(args[0][0])
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self.start = Addr(args[0][0])
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self.second = self.type(args[0][1])
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self.end = Addr(args[0][1])
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else:
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else:
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self.first = self.type(0)
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self.start = Addr(0)
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self.second = self.type(args[0]) - 1
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self.end = Addr(args[0]) - 1
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elif len(args) == 2:
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elif len(args) == 2:
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self.first = self.type(args[0])
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self.start = Addr(args[0])
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self.second = self.type(args[1])
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self.end = Addr(args[1])
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else:
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else:
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raise TypeError, "Too many arguments specified"
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raise TypeError, "Too many arguments specified"
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if kwargs:
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if kwargs:
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raise TypeError, "too many keywords: %s" % kwargs.keys()
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raise TypeError, "Too many keywords: %s" % kwargs.keys()
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def __str__(self):
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def __str__(self):
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return '%s:%s' % (self.first, self.second)
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return '%s:%s' % (self.start, self.end)
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def size(self):
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return long(self.end) - long(self.start) + 1
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@classmethod
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@classmethod
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def cxx_predecls(cls, code):
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def cxx_predecls(cls, code):
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cls.type.cxx_predecls(code)
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Addr.cxx_predecls(code)
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code('#include "base/range.hh"')
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code('#include "base/range.hh"')
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@classmethod
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@classmethod
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def swig_predecls(cls, code):
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def swig_predecls(cls, code):
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cls.type.swig_predecls(code)
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Addr.swig_predecls(code)
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code('%import "python/swig/range.i"')
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code('%import "python/swig/range.i"')
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class AddrRange(Range):
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type = Addr
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def getValue(self):
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def getValue(self):
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from m5.internal.range import AddrRange
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from m5.internal.range import AddrRange
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value = AddrRange()
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value = AddrRange()
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value.start = long(self.first)
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value.start = long(self.start)
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value.end = long(self.second)
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value.end = long(self.end)
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return value
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class TickRange(Range):
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type = Tick
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def getValue(self):
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from m5.internal.range import TickRange
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value = TickRange()
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value.start = long(self.first)
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value.end = long(self.second)
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return value
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return value
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# Boolean parameter type. Python doesn't let you subclass bool, since
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# Boolean parameter type. Python doesn't let you subclass bool, since
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@ -1643,7 +1621,7 @@ __all__ = ['Param', 'VectorParam',
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'MemorySize', 'MemorySize32',
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'MemorySize', 'MemorySize32',
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'Latency', 'Frequency', 'Clock',
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'Latency', 'Frequency', 'Clock',
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'NetworkBandwidth', 'MemoryBandwidth',
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'NetworkBandwidth', 'MemoryBandwidth',
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'Range', 'AddrRange', 'TickRange',
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'AddrRange',
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'MaxAddr', 'MaxTick', 'AllMemory',
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'MaxAddr', 'MaxTick', 'AllMemory',
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'Time',
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'Time',
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'NextEthernetAddr', 'NULL',
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'NextEthernetAddr', 'NULL',
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