Started to add support for O3 for sparc.
--HG-- extra : convert_revision : 3f94bda14024a09b9fbd7a5d13284d4987349ddf
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2 changed files with 10 additions and 7 deletions
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@ -59,13 +59,12 @@ elif env['TARGET_ISA'] == 'mips':
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mips/cpu_builder.cc
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''')
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elif env['TARGET_ISA'] == 'sparc':
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sys.exit('O3 CPU does not support Sparc')
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#sources += Split('''
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# sparc/dyn_inst.cc
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# sparc/cpu.cc
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# sparc/thread_context.cc
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# sparc/cpu_builder.cc
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# ''')
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sources += Split('''
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sparc/dyn_inst.cc
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sparc/cpu.cc
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sparc/thread_context.cc
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sparc/cpu_builder.cc
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''')
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else:
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sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA'])
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@ -41,6 +41,10 @@
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template <class Impl> class MipsDynInst;
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struct MipsSimpleImpl;
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typedef MipsDynInst<MipsSimpleImpl> O3DynInst;
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#elif THE_ISA == SPARC_ISA
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template <class Impl> class SparcDynInst;
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struct SparcSimpleImpl;
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typedef SparcDynInst<SparcSimpleImpl> O3DynInst;
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#else
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#error "O3DynInst not defined for this ISA"
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#endif
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