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Started to add support for O3 for sparc.

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--HG--
extra : convert_revision : 3f94bda14024a09b9fbd7a5d13284d4987349ddf
This commit is contained in:
Gabe Black 2006-08-11 20:29:15 -04:00
parent 95dc8e4d57
commit fc8b4f5253
2 changed files with 10 additions and 7 deletions
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13
src/cpu/o3/SConscript
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@ -59,13 +59,12 @@ elif env['TARGET_ISA'] == 'mips':
mips/cpu_builder.cc mips/cpu_builder.cc
''') ''')
elif env['TARGET_ISA'] == 'sparc': elif env['TARGET_ISA'] == 'sparc':
sys.exit('O3 CPU does not support Sparc') sources += Split('''
#sources += Split(''' sparc/dyn_inst.cc
# sparc/dyn_inst.cc sparc/cpu.cc
# sparc/cpu.cc sparc/thread_context.cc
# sparc/thread_context.cc sparc/cpu_builder.cc
# sparc/cpu_builder.cc ''')
# ''')
else: else:
sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA']) sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA'])

4
src/cpu/o3/dyn_inst.hh
View file

@ -41,6 +41,10 @@
template <class Impl> class MipsDynInst; template <class Impl> class MipsDynInst;
struct MipsSimpleImpl; struct MipsSimpleImpl;
typedef MipsDynInst<MipsSimpleImpl> O3DynInst; typedef MipsDynInst<MipsSimpleImpl> O3DynInst;
#elif THE_ISA == SPARC_ISA
template <class Impl> class SparcDynInst;
struct SparcSimpleImpl;
typedef SparcDynInst<SparcSimpleImpl> O3DynInst;
#else #else
#error "O3DynInst not defined for this ISA" #error "O3DynInst not defined for this ISA"
#endif #endif