ARM: Make a base class for instructions that use only an immediate.
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3 changed files with 41 additions and 0 deletions
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@ -143,6 +143,15 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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return ss.str();
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}
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std::string
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ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss);
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ccprintf(ss, "#%d", imm);
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return ss.str();
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}
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std::string
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RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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@ -94,6 +94,19 @@ class MsrRegOp : public MsrBase
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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class ImmOp : public PredOp
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{
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protected:
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uint32_t imm;
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ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
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uint32_t _imm) :
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PredOp(mnem, _machInst, __opClass), imm(_imm)
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{}
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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class RegRegOp : public PredOp
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{
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protected:
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@ -99,6 +99,25 @@ def template MsrImmConstructor {{
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}
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}};
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def template ImmOpDeclare {{
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class %(class_name)s : public %(base_class)s
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{
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protected:
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public:
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// Constructor
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%(class_name)s(ExtMachInst machInst, uint32_t _imm);
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%(BasicExecDeclare)s
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};
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}};
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def template ImmOpConstructor {{
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _imm)
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
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{
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%(constructor)s;
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}
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}};
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def template RegRegOpDeclare {{
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class %(class_name)s : public %(base_class)s
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{
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