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Merge zizzer.eecs.umich.edu:/bk/m5

Browse source 
into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : cbe53e9404ac592b7c89bb35831e0d20539e0f9c
This commit is contained in:
Nathan Binkert 2004-09-21 01:42:10 -04:00
commit faece7a35a
2 changed files with 36 additions and 9 deletions
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4
arch/alpha/isa_desc
View file

@ -1842,7 +1842,7 @@ decode OPCODE default Unknown::unknown() {
0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED);
0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED);
0x20: copy_load({{EA = Ra;}},
{{ fault = xc->copySrcTranslate(EA);}},
{{fault = xc->copySrcTranslate(EA);}},
IsMemRef, IsLoad, IsCopy);
}
@ -1864,7 +1864,7 @@ decode OPCODE default Unknown::unknown() {
0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }});
0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }});
0x24: copy_store({{EA = Rb;}},
{{ fault = xc->copy(EA);}},
{{fault = xc->copy(EA);}},
IsMemRef, IsStore, IsCopy);
}

41
cpu/simple_cpu/simple_cpu.cc
View file

@ -338,16 +338,29 @@ change_thread_state(int thread_number, int activate, int priority)
Fault
SimpleCPU::copySrcTranslate(Addr src)
{
memReq->reset(src, (dcacheInterface) ?
dcacheInterface->getBlockSize()
: 64);
static bool no_warn = true;
int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
// Only support block sizes of 64 atm.
assert(blk_size == 64);
int offset = src & (blk_size - 1);
// Make sure block doesn't span page
if (no_warn && (src & (~8191)) == ((src + blk_size) & (~8191))) {
warn("Copied block source spans pages.");
no_warn = false;
}
memReq->reset(src & ~(blk_size - 1), blk_size);
// translate to physical address
Fault fault = xc->translateDataReadReq(memReq);
assert(fault != Alignment_Fault);
if (fault == No_Fault) {
xc->copySrcAddr = src;
xc->copySrcPhysAddr = memReq->paddr;
xc->copySrcPhysAddr = memReq->paddr + offset;
} else {
xc->copySrcAddr = 0;
xc->copySrcPhysAddr = 0;
@ -358,14 +371,28 @@ SimpleCPU::copySrcTranslate(Addr src)
Fault
SimpleCPU::copy(Addr dest)
{
static bool no_warn = true;
int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
// Only support block sizes of 64 atm.
assert(blk_size == 64);
uint8_t data[blk_size];
assert(xc->copySrcAddr);
memReq->reset(dest, blk_size);
//assert(xc->copySrcAddr);
int offset = dest & (blk_size - 1);
// Make sure block doesn't span page
if (no_warn && (dest & (~8191)) == ((dest + blk_size) & (~8191))) {
no_warn = false;
warn("Copied block destination spans pages. ");
}
memReq->reset(dest & ~(blk_size -1), blk_size);
// translate to physical address
Fault fault = xc->translateDataWriteReq(memReq);
assert(fault != Alignment_Fault);
if (fault == No_Fault) {
Addr dest_addr = memReq->paddr;
Addr dest_addr = memReq->paddr + offset;
// Need to read straight from memory since we have more than 8 bytes.
memReq->paddr = xc->copySrcPhysAddr;
xc->mem->read(memReq, data);