diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 2177e8c4f..dc30039b2 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -806,14 +806,15 @@ decode OPCODE default Unknown::unknown() {
             0x04: quiesceTime({{
                 R0 = PseudoInst::quiesceTime(xc->tcBase());
             }}, IsNonSpeculative, IsUnverifiable);
-            0x10: ivlb({{
-                warn_once("Obsolete M5 instruction ivlb encountered.\n");
+            0x10: deprecated_ivlb({{
+                warn_once("Obsolete M5 ivlb instruction encountered.\n");
             }});
-            0x11: ivle({{
-                warn_once("Obsolete M5 instruction ivlb encountered.\n");
+            0x11: deprecated_ivle({{
+                warn_once("Obsolete M5 ivlb instruction encountered.\n");
             }});
-            0x20: m5exit_old({{
-                PseudoInst::m5exit_old(xc->tcBase());
+            0x20: deprecated_exit ({{
+                warn_once("deprecated M5 exit instruction encountered.\n");
+                PseudoInst::m5exit(xc->tcBase(), 0);
             }}, No_OpClass, IsNonSpeculative);
             0x21: m5exit({{
                 PseudoInst::m5exit(xc->tcBase(), R16);
@@ -821,7 +822,9 @@ decode OPCODE default Unknown::unknown() {
             0x31: loadsymbol({{
                 PseudoInst::loadsymbol(xc->tcBase());
             }}, No_OpClass, IsNonSpeculative);
-            0x30: initparam({{ Ra = xc->tcBase()->getCpuPtr()->system->init_param; }});
+            0x30: initparam({{
+                Ra = xc->tcBase()->getCpuPtr()->system->init_param;
+            }});
             0x40: resetstats({{
                 PseudoInst::resetstats(xc->tcBase(), R16, R17);
             }}, IsNonSpeculative);
@@ -849,11 +852,20 @@ decode OPCODE default Unknown::unknown() {
             0x54: m5panic({{
                 panic("M5 panic instruction called at pc=%#x.", xc->readPC());
             }}, IsNonSpeculative);
-            0x55: m5anBegin({{
-                PseudoInst::anBegin(xc->tcBase(), R16);
+            0x55: m5reserved1({{
+                warn("M5 reserved opcode ignored");
             }}, IsNonSpeculative);
-            0x56: m5anWait({{
-                PseudoInst::anWait(xc->tcBase(), R16, R17);
+            0x56: m5reserved2({{
+                warn("M5 reserved opcode ignored");
+            }}, IsNonSpeculative);
+            0x57: m5reserved3({{
+                warn("M5 reserved opcode ignored");
+            }}, IsNonSpeculative);
+            0x58: m5reserved4({{
+                warn("M5 reserved opcode ignored");
+            }}, IsNonSpeculative);
+            0x59: m5reserved5({{
+                warn("M5 reserved opcode ignored");
             }}, IsNonSpeculative);
         }
     }
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index ec384a4c5..60a74b224 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -123,12 +123,6 @@ quiesceTime(ThreadContext *tc)
     return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
 }
 
-void
-m5exit_old(ThreadContext *tc)
-{
-    exitSimLoop("m5_exit_old instruction encountered");
-}
-
 void
 m5exit(ThreadContext *tc, Tick delay)
 {
@@ -222,21 +216,6 @@ addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
     tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
 }
 
-void
-anBegin(ThreadContext *tc, uint64_t cur)
-{
-    Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
-                              0xFFFFFFFF, 0,0);
-}
-
-void
-anWait(ThreadContext *tc, uint64_t cur, uint64_t wait)
-{
-    Annotate::annotations.add(tc->getSystemPtr(), 0, cur >> 32, cur &
-                              0xFFFFFFFF, wait >> 32, wait & 0xFFFFFFFF);
-}
-
-
 void
 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
 {
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index d94b358e5..40702fced 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -48,7 +48,6 @@ void quiesceNs(ThreadContext *tc, uint64_t ns);
 void quiesceCycles(ThreadContext *tc, uint64_t cycles);
 uint64_t quiesceTime(ThreadContext *tc);
 void m5exit(ThreadContext *tc, Tick delay);
-void m5exit_old(ThreadContext *tc);
 void loadsymbol(ThreadContext *xc);
 void resetstats(ThreadContext *tc, Tick delay, Tick period);
 void dumpstats(ThreadContext *tc, Tick delay, Tick period);
@@ -59,7 +58,5 @@ uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
 void debugbreak(ThreadContext *tc);
 void switchcpu(ThreadContext *tc);
 void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
-void anBegin(ThreadContext *tc, uint64_t cur);
-void anWait(ThreadContext *tc, uint64_t cur, uint64_t wait);
 
 /* namespace PsuedoInst */ }
diff --git a/util/m5/m5op_alpha.S b/util/m5/m5op_alpha.S
index c5d0e65f8..aa7d12aab 100644
--- a/util/m5/m5op_alpha.S
+++ b/util/m5/m5op_alpha.S
@@ -48,6 +48,12 @@ func:
 #define END(func)     \
         .end func
 
+#define SIMPLE_OP(_f, _o)	\
+        LEAF(_f)		\
+                _o;		\
+                RET;		\
+        END(_f)
+
 #define	ARM(reg) INST(m5_op, reg, 0, arm_func)
 #define QUIESCE INST(m5_op, 0, 0, quiesce_func)
 #define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
@@ -65,125 +71,24 @@ func:
 #define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
 #define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
 #define PANIC INST(m5_op, 0, 0, panic_func)
-#define AN_BEGIN(r1) INST(m5_op, r1, 0, anbegin_func)
-#define AN_WAIT(r1,r2) INST(m5_op, r1, r2, anwait_func)
 
         .set noreorder
 
-        .align 4
-LEAF(arm)
-        ARM(16)
-        RET
-END(arm)
-
-        .align 4
-LEAF(quiesce)
-        QUIESCE
-        RET
-END(quiesce)
-
-        .align 4
-LEAF(quiesceNs)
-        QUIESCENS(16)
-        RET
-END(quiesceNs)
-
-        .align 4
-LEAF(quiesceCycle)
-        QUIESCECYC(16)
-        RET
-END(quiesceCycle)
-
-        .align 4
-LEAF(quiesceTime)
-        QUIESCETIME
-        RET
-END(quiesceTime)
-
-        .align 4
-LEAF(m5_exit)
-        M5EXIT(16)
-        RET
-END(m5_exit)
-
-        .align 4
-LEAF(m5_initparam)
-        INITPARAM(0)
-        RET
-END(m5_initparam)
-
-        .align 4
-LEAF(m5_loadsymbol)
-        LOADSYMBOL(0)
-        RET
-END(m5_loadsymbol)
-
-        .align 4
-LEAF(m5_reset_stats)
-        RESET_STATS(16, 17)
-        RET
-END(m5_reset_stats)
-
-        .align 4
-LEAF(m5_dump_stats)
-        DUMP_STATS(16, 17)
-        RET
-END(m5_dump_stats)
-
-        .align 4
-LEAF(m5_dumpreset_stats)
-        DUMPRST_STATS(16, 17)
-        RET
-END(m5_dumpreset_stats)
-
-        .align 4
-LEAF(m5_checkpoint)
-        CHECKPOINT(16, 17)
-        RET
-END(m5_checkpoint)
-
-        .align 4
-LEAF(m5_readfile)
-        READFILE
-        RET
-END(m5_readfile)
-
-        .align 4
-LEAF(m5_debugbreak)
-        DEBUGBREAK
-        RET
-END(m5_debugbreak)
-
-        .align 4
-LEAF(m5_switchcpu)
-        SWITCHCPU
-        RET
-END(m5_switchcpu)
-
-        .align 4
-LEAF(m5_addsymbol)
-        ADDSYMBOL(16, 17)
-        RET
-END(m5_addsymbol)
-
-        .align 4
-LEAF(m5_panic)
-        PANIC
-        RET
-END(m5_panic)
-
-
-        .align 4
-LEAF(m5_anbegin)
-        AN_BEGIN(16)
-        RET
-END(m5_anbegin)
-
-
-        .align 4
-LEAF(m5_anwait)
-        AN_WAIT(16,17)
-        RET
-END(m5_anwait)
-
+SIMPLE_OP(arm, ARM(16))
+SIMPLE_OP(quiesce, QUIESCE)
+SIMPLE_OP(quiesceNs, QUIESCENS(16))
+SIMPLE_OP(quiesceCycle, QUIESCECYC(16))
+SIMPLE_OP(quiesceTime, QUIESCETIME)
+SIMPLE_OP(m5_exit, M5EXIT(16))
+SIMPLE_OP(m5_initparam, INITPARAM(0))
+SIMPLE_OP(m5_loadsymbol, LOADSYMBOL(0))
+SIMPLE_OP(m5_reset_stats, RESET_STATS(16, 17))
+SIMPLE_OP(m5_dump_stats, DUMP_STATS(16, 17))
+SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS(16, 17))
+SIMPLE_OP(m5_checkpoint, CHECKPOINT(16, 17))
+SIMPLE_OP(m5_readfile, READFILE)
+SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
+SIMPLE_OP(m5_switchcpu, SWITCHCPU)
+SIMPLE_OP(m5_addsymbol, ADDSYMBOL(16, 17))
+SIMPLE_OP(m5_panic, PANIC)
 
diff --git a/util/m5/m5ops.h b/util/m5/m5ops.h
index ce0b39b29..3fad6e7bf 100644
--- a/util/m5/m5ops.h
+++ b/util/m5/m5ops.h
@@ -29,26 +29,29 @@
  *          Ali Saidi
  */
 
-#define arm_func 0x00
-#define quiesce_func 0x01
-#define quiescens_func 0x02
-#define quiescecycle_func 0x03
-#define quiescetime_func 0x04
-#define ivlb 0x10 // obsolete
-#define ivle 0x11 // obsolete
-#define exit_old_func 0x20 // deprecated!
-#define exit_func 0x21
-#define initparam_func 0x30
-#define loadsymbol_func 0x31
-#define resetstats_func 0x40
-#define dumpstats_func 0x41
-#define dumprststats_func 0x42
-#define ckpt_func 0x43
-#define readfile_func 0x50
-#define debugbreak_func 0x51
-#define switchcpu_func 0x52
-#define addsymbol_func 0x53
-#define panic_func     0x54
-#define anbegin_func     0x55
-#define anwait_func     0x56
+#define arm_func		0x00
+#define quiesce_func		0x01
+#define quiescens_func		0x02
+#define quiescecycle_func	0x03
+#define quiescetime_func	0x04
+#define deprecated1_func	0x10 // obsolete ivlb
+#define deprecated2_func	0x11 // obsolete ivle
+#define deprecated3_func	0x20 // deprecated exit function
+#define exit_func		0x21
+#define initparam_func		0x30
+#define loadsymbol_func		0x31
+#define resetstats_func		0x40
+#define dumpstats_func		0x41
+#define dumprststats_func	0x42
+#define ckpt_func		0x43
+#define readfile_func		0x50
+#define debugbreak_func		0x51
+#define switchcpu_func		0x52
+#define addsymbol_func		0x53
+#define panic_func		0x54
 
+#define reserved1_func		0x55 // Reserved for user
+#define reserved2_func		0x56 // Reserved for user
+#define reserved3_func		0x57 // Reserved for user
+#define reserved4_func		0x58 // Reserved for user
+#define reserved5_func		0x59 // Reserved for user