memtest differences from Derek's changes
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@ -1,76 +1,74 @@
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["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "8", "-m", "1", "-s", "1024", "-C", "256", "-A", "2", "-D", "1"]
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print config: 1
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system.cpu7: completed 10000 read accesses @7023642
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system.cpu5: completed 10000 read accesses @7028438
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system.cpu3: completed 10000 read accesses @7034626
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system.cpu1: completed 10000 read accesses @7035790
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system.cpu2: completed 10000 read accesses @7062558
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system.cpu6: completed 10000 read accesses @7078882
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system.cpu0: completed 10000 read accesses @7080455
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system.cpu4: completed 10000 read accesses @7095500
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system.cpu1: completed 20000 read accesses @12915324
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system.cpu3: completed 20000 read accesses @12958052
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system.cpu5: completed 20000 read accesses @12993554
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system.cpu2: completed 20000 read accesses @13010879
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system.cpu4: completed 20000 read accesses @13014760
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system.cpu6: completed 20000 read accesses @13031684
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system.cpu7: completed 20000 read accesses @13051162
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system.cpu0: completed 20000 read accesses @13128234
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system.cpu3: completed 30000 read accesses @18784435
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system.cpu1: completed 30000 read accesses @18859194
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system.cpu5: completed 30000 read accesses @18903265
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system.cpu7: completed 30000 read accesses @18952860
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system.cpu4: completed 30000 read accesses @18981745
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system.cpu6: completed 30000 read accesses @18987772
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system.cpu0: completed 30000 read accesses @18993365
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system.cpu2: completed 30000 read accesses @18994061
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system.cpu3: completed 40000 read accesses @24748372
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system.cpu2: completed 40000 read accesses @24758090
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system.cpu1: completed 40000 read accesses @24768884
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system.cpu7: completed 40000 read accesses @24891866
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system.cpu0: completed 40000 read accesses @24907680
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system.cpu6: completed 40000 read accesses @24933908
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system.cpu5: completed 40000 read accesses @24949374
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system.cpu4: completed 40000 read accesses @24963853
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system.cpu3: completed 50000 read accesses @30655893
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system.cpu2: completed 50000 read accesses @30705287
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system.cpu1: completed 50000 read accesses @30752130
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system.cpu0: completed 50000 read accesses @30795942
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system.cpu5: completed 50000 read accesses @30809328
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system.cpu7: completed 50000 read accesses @30857254
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system.cpu6: completed 50000 read accesses @30935432
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system.cpu4: completed 50000 read accesses @30960853
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system.cpu3: completed 60000 read accesses @36647735
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system.cpu2: completed 60000 read accesses @36648110
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system.cpu1: completed 60000 read accesses @36690971
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system.cpu7: completed 60000 read accesses @36746000
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system.cpu5: completed 60000 read accesses @36746430
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system.cpu0: completed 60000 read accesses @36840602
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system.cpu6: completed 60000 read accesses @36900332
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system.cpu4: completed 60000 read accesses @36954562
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system.cpu2: completed 70000 read accesses @42614948
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system.cpu1: completed 70000 read accesses @42616200
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system.cpu5: completed 70000 read accesses @42679549
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system.cpu7: completed 70000 read accesses @42707038
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system.cpu3: completed 70000 read accesses @42725206
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system.cpu0: completed 70000 read accesses @42774272
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system.cpu6: completed 70000 read accesses @42850956
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system.cpu4: completed 70000 read accesses @42872700
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system.cpu5: completed 80000 read accesses @48577066
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system.cpu7: completed 80000 read accesses @48608169
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system.cpu2: completed 80000 read accesses @48616581
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system.cpu1: completed 80000 read accesses @48637808
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system.cpu0: completed 80000 read accesses @48726360
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system.cpu3: completed 80000 read accesses @48754087
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system.cpu4: completed 80000 read accesses @48848416
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system.cpu6: completed 80000 read accesses @48849321
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system.cpu5: completed 90000 read accesses @54536042
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system.cpu0: completed 90000 read accesses @54536954
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system.cpu7: completed 90000 read accesses @54554538
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system.cpu1: completed 90000 read accesses @54575168
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system.cpu2: completed 90000 read accesses @54648034
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system.cpu3: completed 90000 read accesses @54719200
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system.cpu6: completed 90000 read accesses @54807510
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system.cpu4: completed 90000 read accesses @54840954
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system.cpu1: completed 100000 read accesses @60455258
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["-c", "MOESI_CMP_directory", "-r", "tests/configs/../../src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb", "-p", "8", "-m", "1", "-s", "1024", "-C", "32768", "-A", "8", "-D", "1"]
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system.cpu0: completed 10000 read accesses @449430
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system.cpu4: completed 10000 read accesses @459465
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system.cpu7: completed 10000 read accesses @472231
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system.cpu1: completed 10000 read accesses @477652
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system.cpu2: completed 10000 read accesses @477942
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system.cpu5: completed 10000 read accesses @490692
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system.cpu6: completed 10000 read accesses @490860
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system.cpu3: completed 10000 read accesses @498830
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system.cpu0: completed 20000 read accesses @902454
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system.cpu4: completed 20000 read accesses @921903
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system.cpu7: completed 20000 read accesses @943132
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system.cpu2: completed 20000 read accesses @963224
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system.cpu1: completed 20000 read accesses @974292
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system.cpu5: completed 20000 read accesses @979817
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system.cpu6: completed 20000 read accesses @985156
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system.cpu3: completed 20000 read accesses @1004197
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system.cpu0: completed 30000 read accesses @1354388
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system.cpu4: completed 30000 read accesses @1389321
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system.cpu7: completed 30000 read accesses @1410714
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system.cpu2: completed 30000 read accesses @1450104
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system.cpu5: completed 30000 read accesses @1465068
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system.cpu1: completed 30000 read accesses @1470940
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system.cpu6: completed 30000 read accesses @1477854
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system.cpu3: completed 30000 read accesses @1508078
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system.cpu0: completed 40000 read accesses @1811799
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system.cpu4: completed 40000 read accesses @1844299
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system.cpu7: completed 40000 read accesses @1889814
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system.cpu2: completed 40000 read accesses @1927073
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system.cpu1: completed 40000 read accesses @1953874
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system.cpu5: completed 40000 read accesses @1957168
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system.cpu6: completed 40000 read accesses @1970748
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system.cpu3: completed 40000 read accesses @2016002
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system.cpu0: completed 50000 read accesses @2262162
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system.cpu4: completed 50000 read accesses @2303172
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system.cpu7: completed 50000 read accesses @2354840
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system.cpu2: completed 50000 read accesses @2408362
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system.cpu1: completed 50000 read accesses @2441228
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system.cpu5: completed 50000 read accesses @2451414
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system.cpu6: completed 50000 read accesses @2467657
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system.cpu3: completed 50000 read accesses @2528058
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system.cpu0: completed 60000 read accesses @2711396
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system.cpu4: completed 60000 read accesses @2767668
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system.cpu7: completed 60000 read accesses @2817212
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system.cpu2: completed 60000 read accesses @2897042
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system.cpu1: completed 60000 read accesses @2926178
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system.cpu5: completed 60000 read accesses @2935676
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system.cpu6: completed 60000 read accesses @2963110
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system.cpu3: completed 60000 read accesses @3030360
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system.cpu0: completed 70000 read accesses @3162444
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system.cpu4: completed 70000 read accesses @3222154
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system.cpu7: completed 70000 read accesses @3277574
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system.cpu2: completed 70000 read accesses @3381865
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system.cpu1: completed 70000 read accesses @3415612
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system.cpu5: completed 70000 read accesses @3416504
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system.cpu6: completed 70000 read accesses @3460152
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system.cpu3: completed 70000 read accesses @3529552
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system.cpu0: completed 80000 read accesses @3611998
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system.cpu4: completed 80000 read accesses @3676108
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system.cpu7: completed 80000 read accesses @3736694
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system.cpu2: completed 80000 read accesses @3853296
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system.cpu5: completed 80000 read accesses @3905416
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system.cpu1: completed 80000 read accesses @3907045
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system.cpu6: completed 80000 read accesses @3947118
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system.cpu3: completed 80000 read accesses @4038186
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system.cpu0: completed 90000 read accesses @4055478
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system.cpu4: completed 90000 read accesses @4135882
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system.cpu7: completed 90000 read accesses @4192986
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system.cpu2: completed 90000 read accesses @4335194
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system.cpu5: completed 90000 read accesses @4388557
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system.cpu1: completed 90000 read accesses @4398614
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system.cpu6: completed 90000 read accesses @4430678
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system.cpu0: completed 100000 read accesses @4504972
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hack: be nice to actually delete the event here
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@ -1,5 +1,3 @@
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Redirecting stdout to build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/simout
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Redirecting stderr to build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/simerr
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M5 Simulator System
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Copyright (c) 2001-2008
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@ -7,11 +5,11 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Nov 18 2009 16:36:52
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M5 revision c1d634e76817 6798 default qtip tip brad/ruby_memtest_refresh
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M5 started Nov 18 2009 16:37:05
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M5 executing on cabr0354
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M5 compiled Jan 19 2010 17:11:57
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M5 revision 21fbf0412e0d 6840 default tip
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M5 started Jan 19 2010 17:12:00
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M5 executing on bluedevil.cs.wisc.edu
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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Exiting @ tick 60455258 because maximum number of loads reached
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Exiting @ tick 4504972 because maximum number of loads reached
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@ -1,34 +1,34 @@
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---------- Begin Simulation Statistics ----------
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host_mem_usage 2438776 # Number of bytes of host memory used
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host_seconds 3924.24 # Real time elapsed on the host
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host_tick_rate 15406 # Simulator tick rate (ticks/s)
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host_mem_usage 1414304 # Number of bytes of host memory used
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host_seconds 219.48 # Real time elapsed on the host
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host_tick_rate 20525 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_seconds 0.000060 # Number of seconds simulated
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sim_ticks 60455258 # Number of ticks simulated
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sim_seconds 0.000005 # Number of seconds simulated
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sim_ticks 4504972 # Number of ticks simulated
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system.cpu0.num_copies 0 # number of copy accesses completed
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system.cpu0.num_reads 99982 # number of read accesses completed
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system.cpu0.num_writes 53168 # number of write accesses completed
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system.cpu0.num_reads 100000 # number of read accesses completed
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system.cpu0.num_writes 54115 # number of write accesses completed
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system.cpu1.num_copies 0 # number of copy accesses completed
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system.cpu1.num_reads 100000 # number of read accesses completed
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system.cpu1.num_writes 53657 # number of write accesses completed
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system.cpu1.num_reads 92132 # number of read accesses completed
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system.cpu1.num_writes 49991 # number of write accesses completed
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system.cpu2.num_copies 0 # number of copy accesses completed
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system.cpu2.num_reads 99758 # number of read accesses completed
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system.cpu2.num_writes 53630 # number of write accesses completed
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system.cpu2.num_reads 93521 # number of read accesses completed
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system.cpu2.num_writes 50418 # number of write accesses completed
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system.cpu3.num_copies 0 # number of copy accesses completed
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system.cpu3.num_reads 99707 # number of read accesses completed
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system.cpu3.num_writes 53628 # number of write accesses completed
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system.cpu3.num_reads 89205 # number of read accesses completed
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system.cpu3.num_writes 48106 # number of write accesses completed
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system.cpu4.num_copies 0 # number of copy accesses completed
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system.cpu4.num_reads 99425 # number of read accesses completed
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system.cpu4.num_writes 53969 # number of write accesses completed
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system.cpu4.num_reads 97961 # number of read accesses completed
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system.cpu4.num_writes 52598 # number of write accesses completed
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system.cpu5.num_copies 0 # number of copy accesses completed
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system.cpu5.num_reads 99810 # number of read accesses completed
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system.cpu5.num_writes 53444 # number of write accesses completed
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system.cpu5.num_reads 92452 # number of read accesses completed
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system.cpu5.num_writes 49744 # number of write accesses completed
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system.cpu6.num_copies 0 # number of copy accesses completed
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system.cpu6.num_reads 99532 # number of read accesses completed
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system.cpu6.num_writes 53907 # number of write accesses completed
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system.cpu6.num_reads 91570 # number of read accesses completed
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system.cpu6.num_writes 49935 # number of write accesses completed
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system.cpu7.num_copies 0 # number of copy accesses completed
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system.cpu7.num_reads 99819 # number of read accesses completed
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system.cpu7.num_writes 53668 # number of write accesses completed
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system.cpu7.num_reads 96862 # number of read accesses completed
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system.cpu7.num_writes 51935 # number of write accesses completed
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---------- End Simulation Statistics ----------
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