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dev, arm: Rewrite the HDLCD controller

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Rewrite the HDLCD controller to use the new DMA engine and pixel
pump. This fixes several bugs in the current implementation:

   * Broken/missing interrupt support (VSync, underrun, DMA end)
   * Fragile resolution changes (changing resolutions used
     to cause assertion errors).
   * Support for resolutions with a width that isn't divisible by 32.
   * The pixel clock can now be set dynamically.

This breaks checkpoint compatibility. Checkpoints can be upgraded with
the checkpoint conversion script. However, upgraded checkpoints won't
contain the state of the current frame. That means that HDLCD
controllers restoring from a converted checkpoint immediately start
drawing a new frame (i.e, expect timing differences).
This commit is contained in:
Andreas Sandberg 2015-09-11 15:55:46 +01:00
parent f611d4f22e
commit f7055e9215
4 changed files with 781 additions and 982 deletions
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18
src/dev/arm/RealView.py
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@ -54,6 +54,7 @@ from Uart import Uart
from SimpleMemory import SimpleMemory
from Gic import *
from EnergyCtrl import EnergyCtrl
from ClockDomain import SrcClockDomain
class AmbaPioDevice(BasicPioDevice):
type = 'AmbaPioDevice'
@ -218,23 +219,23 @@ class Pl111(AmbaDmaDevice):
amba_id = 0x00141111
enable_capture = Param.Bool(True, "capture frame to system.framebuffer.bmp")
class HDLcd(AmbaDmaDevice):
type = 'HDLcd'
cxx_header = "dev/arm/hdlcd.hh"
# For reference, 1024x768MR-16@60 ~= 56 MHz
# 1920x1080MR-16@60 ~= 137 MHz
# 3840x2160MR-16@60 ~= 533 MHz
# Match against the resolution selected in the Linux DTS/DTB file.
pixel_clock = Param.Clock('137MHz', "Clock frequency of the pixel clock "
"(i.e. PXLREFCLK / OSCCLK 5")
vnc = Param.VncInput(Parent.any, "Vnc server for remote frame buffer "
"display")
amba_id = 0x00141000
workaround_swap_rb = Param.Bool(True, "Workaround incorrect color "
"selector order in some kernels")
workaround_dma_line_count = Param.Bool(True, "Workaround incorrect "
"DMA line count (off by 1)")
enable_capture = Param.Bool(True, "capture frame to system.framebuffer.bmp")
pixel_buffer_size = Param.MemorySize32("2kB", "Size of address range")
pxl_clk = Param.ClockDomain("Pixel clock source")
pixel_chunk = Param.Unsigned(32, "Number of pixels to handle in one batch")
class RealView(Platform):
type = 'RealView'
cxx_header = "dev/arm/realview.hh"
@ -518,7 +519,8 @@ class VExpress_EMM(RealView):
timer0 = Sp804(int_num0=34, int_num1=34, pio_addr=0x1C110000, clock0='1MHz', clock1='1MHz')
timer1 = Sp804(int_num0=35, int_num1=35, pio_addr=0x1C120000, clock0='1MHz', clock1='1MHz')
clcd = Pl111(pio_addr=0x1c1f0000, int_num=46)
hdlcd = HDLcd(pio_addr=0x2b000000, int_num=117)
hdlcd = HDLcd(pxl_clk=realview_io.osc_pxl,
pio_addr=0x2b000000, int_num=117)
kmi0 = Pl050(pio_addr=0x1c060000, int_num=44)
kmi1 = Pl050(pio_addr=0x1c070000, int_num=45, is_mouse=True)
vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)

1172
src/dev/arm/hdlcd.cc
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File diff suppressed because it is too large Load diff

464
src/dev/arm/hdlcd.hh
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@ -35,6 +35,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chris Emmons
* Andreas Sandberg
*/
@ -61,22 +62,15 @@
* content of an underrun frame.
*
* KNOWN ISSUES
* 1. The default kernel driver used in testing sets the line count to one
* less than the expected 768. However, it also sets the v_count to 767.
* The controller specifies that 1 should be added to v_count but does not
* specify adding 1 to the line count. The driver is probably wrong.
* However, to sync these two numbers up, this model uses fb_line_count and
* fb_line_length rather than using v_data or h_data values to determine the
* width and height of the frame; those values are ignored.
* 2. The HDLcd is implemented here as an AmbaDmaDevice, but it doesn't have
* an AMBA ID as far as I know. That is the only bit of the AmbaDmaDevice
* interface that is irrelevant to it, so a fake AMBA ID is used for now.
* I didn't think inserting an extra layer of hierachy between AmbaDmaDevice
* and DmaDevice would be helpful to anyone else, but that may be the right
* answer.
* 3. The internal buffer size is either 1 or 2 KB depending on which
* specification is referenced for the different Versatile Express tiles.
* This implementation uses the larger 2 KB buffer by default.
* <ul>
* <li>The HDLcd is implemented here as an AmbaDmaDevice, but it
* doesn't have an AMBA ID as far as I know. That is the only
* bit of the AmbaDmaDevice interface that is irrelevant to it,
* so a fake AMBA ID is used for now. I didn't think inserting
* an extra layer of hierachy between AmbaDmaDevice and
* DmaDevice would be helpful to anyone else, but that may be
* the right answer.
* </ul>
*/
#ifndef __DEV_ARM_HDLCD_HH__
@ -88,17 +82,39 @@
#include "base/bitmap.hh"
#include "base/framebuffer.hh"
#include "dev/arm/amba_device.hh"
#include "params/HDLcd.hh"
#include "dev/pixelpump.hh"
#include "sim/serialize.hh"
class VncInput;
struct HDLcdParams;
class HDLcdPixelPump;
class HDLcd: public AmbaDmaDevice
{
protected:
/** fake AMBA ID -- unused */
static const uint64_t AMBA_ID = ULL(0xb105f00d00141000);
public:
HDLcd(const HDLcdParams *p);
~HDLcd();
void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
void drainResume() M5_ATTR_OVERRIDE;
public: // IO device interface
Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE;
Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE;
AddrRangeList getAddrRanges() const M5_ATTR_OVERRIDE { return addrRanges; }
protected: // Parameters
VncInput *vnc;
const bool workaroundSwapRB;
const bool workaroundDmaLineCount;
const AddrRangeList addrRanges;
const bool enableCapture;
const Addr pixelBufferSize;
protected: // Register handling
/** ARM HDLcd register offsets */
enum RegisterOffset {
Version = 0x0000,
@ -124,27 +140,23 @@ class HDLcd: public AmbaDmaDevice
Pixel_Format = 0x0240,
Red_Select = 0x0244,
Green_Select = 0x0248,
Blue_Select = 0x024C };
Blue_Select = 0x024C,
};
/** Reset value for Bus_Options register */
static const size_t BUS_OPTIONS_RESETV = 0x408;
static constexpr size_t BUS_OPTIONS_RESETV = 0x408;
/** Reset value for Version register */
static const size_t VERSION_RESETV = 0x1CDC0000;
/** max number of outstanding DMA requests possible */
static const size_t MAX_OUTSTANDING_DMA_REQ_CAPACITY = 16;
/** max number of beats delivered in one dma burst */
static const size_t MAX_BURST_LEN = 16;
/** size of internal buffer in bytes */
static const size_t PIXEL_BUFFER_CAPACITY = 2048;
static constexpr size_t VERSION_RESETV = 0x1CDC0000;
/** AXI port width in bytes */
static const size_t AXI_PORT_WIDTH = 8;
static constexpr size_t AXI_PORT_WIDTH = 8;
static const size_t MAX_BURST_SIZE = MAX_BURST_LEN * AXI_PORT_WIDTH;
/** max number of beats delivered in one dma burst */
static constexpr size_t MAX_BURST_LEN = 16;
/** Maximum number of bytes per pixel */
static constexpr size_t MAX_PIXEL_SIZE = 4;
/**
* @name RegisterFieldLayouts
@ -157,12 +169,10 @@ class HDLcd: public AmbaDmaDevice
Bitfield<31,16> product_id;
EndBitUnion(VersionReg)
BitUnion32(InterruptReg)
Bitfield<0> dma_end;
Bitfield<1> bus_error;
Bitfield<2> vsync;
Bitfield<3> underrun;
EndBitUnion(InterruptReg)
static constexpr uint32_t INT_DMA_END = (1UL << 0);
static constexpr uint32_t INT_BUS_ERROR = (1UL << 1);
static constexpr uint32_t INT_VSYNC = (1UL << 2);
static constexpr uint32_t INT_UNDERRUN = (1UL << 3);
BitUnion32(FbLineCountReg)
Bitfield<11,0> fb_line_count;
@ -217,15 +227,13 @@ class HDLcd: public AmbaDmaDevice
* HDLCD register contents.
*/
/**@{*/
VersionReg version; /**< Version register */
InterruptReg int_rawstat; /**< Interrupt raw status register */
InterruptReg int_clear; /**< Interrupt clear register */
InterruptReg int_mask; /**< Interrupt mask register */
InterruptReg int_status; /**< Interrupt status register */
const VersionReg version; /**< Version register */
uint32_t int_rawstat; /**< Interrupt raw status register */
uint32_t int_mask; /**< Interrupt mask register */
uint32_t fb_base; /**< Frame buffer base address register */
uint32_t fb_line_length; /**< Frame buffer Line length register */
FbLineCountReg fb_line_count; /**< Frame buffer Line count register */
uint32_t fb_line_pitch; /**< Frame buffer Line pitch register */
int32_t fb_line_pitch; /**< Frame buffer Line pitch register */
BusOptsReg bus_options; /**< Bus options register */
TimingReg v_sync; /**< Vertical sync width register */
TimingReg v_back_porch; /**< Vertical back porch width register */
@ -243,13 +251,95 @@ class HDLcd: public AmbaDmaDevice
ColorSelectReg blue_select; /**< Blue color select register */
/** @} */
/** Pixel clock period */
const Tick pixelClock;
uint32_t readReg(Addr offset);
void writeReg(Addr offset, uint32_t value);
FrameBuffer fb;
PixelConverter pixelConverter() const;
DisplayTimings displayTimings() const;
/** VNC server */
VncInput *vnc;
void createDmaEngine();
void cmdEnable();
void cmdDisable();
bool enabled() const { return command.enable; }
public: // Pixel pump callbacks
bool pxlNext(Pixel &p);
void pxlVSyncBegin();
void pxlVSyncEnd();
void pxlUnderrun();
void pxlFrameDone();
protected: // Interrupt handling
/**
* Assign new interrupt values and update interrupt signals
*
* A new interrupt is scheduled signalled if the set of unmasked
* interrupts goes empty to non-empty. Conversely, if the set of
* unmasked interrupts goes from non-empty to empty, the interrupt
* signal is cleared.
*
* @param ints New <i>raw</i> interrupt status
* @param mask New interrupt mask
*/
void setInterrupts(uint32_t ints, uint32_t mask);
/**
* Convenience function to update the interrupt mask
*
* @see setInterrupts
* @param mask New interrupt mask
*/
void intMask(uint32_t mask) { setInterrupts(int_rawstat, mask); }
/**
* Convenience function to raise a new interrupt
*
* @see setInterrupts
* @param ints Set of interrupts to raise
*/
void intRaise(uint32_t ints) {
setInterrupts(int_rawstat | ints, int_mask);
}
/**
* Convenience function to clear interrupts
*
* @see setInterrupts
* @param ints Set of interrupts to clear
*/
void intClear(uint32_t ints) {
setInterrupts(int_rawstat & ~ints, int_mask);
}
/** Masked interrupt status register */
const uint32_t intStatus() const { return int_rawstat & int_mask; }
protected: // Pixel output
class PixelPump : public BasePixelPump
{
public:
PixelPump(HDLcd &p, ClockDomain &pxl_clk, unsigned pixel_chunk)
: BasePixelPump(p, pxl_clk, pixel_chunk), parent(p) {}
void dumpSettings();
protected:
bool nextPixel(Pixel &p) M5_ATTR_OVERRIDE { return parent.pxlNext(p); }
void onVSyncBegin() M5_ATTR_OVERRIDE { return parent.pxlVSyncBegin(); }
void onVSyncEnd() M5_ATTR_OVERRIDE { return parent.pxlVSyncEnd(); }
void onUnderrun(unsigned x, unsigned y) M5_ATTR_OVERRIDE {
parent.pxlUnderrun();
}
void onFrameDone() M5_ATTR_OVERRIDE { parent.pxlFrameDone(); }
protected:
HDLcd &parent;
};
/** Helper to write out bitmaps */
Bitmap bmp;
@ -257,260 +347,40 @@ class HDLcd: public AmbaDmaDevice
/** Picture of what the current frame buffer looks like */
std::ostream *pic;
/**
* Event wrapper for dmaDone()
*
* This event call pushes its this pointer onto the freeDoneEvent vector
* and calls dmaDone() when triggered. While most of the time the burst
* length of a transaction will be the max burst length set by the driver,
* any trailing bytes must be handled with smaller lengths thus requiring
* the configurable burst length option.
*/
class DmaDoneEvent : public Event
/** Cached pixel converter, set when the converter is enabled. */
PixelConverter conv;
PixelPump pixelPump;
protected: // DMA handling
class DmaEngine : public DmaReadFifo
{
private:
/** Reference to HDLCD that issued the corresponding DMA transaction */
HDLcd &obj;
/** Transaction size */
size_t transSize;
public:
/**
* Constructor.
*
* @param _obj HDLCD that issued the corresponding DMA transaction
*/
DmaDoneEvent(HDLcd *_obj)
: Event(), obj(*_obj), transSize(0) {}
DmaEngine(HDLcd &_parent, size_t size,
unsigned request_size, unsigned max_pending,
size_t line_size, ssize_t line_pitch, unsigned num_lines);
/**
* Sets the size of this transaction.
*
* @param len size of the transaction in bytes
*/
void setTransactionSize(size_t len) {
transSize = len;
}
void startFrame(Addr fb_base);
void abortFrame();
void dumpSettings();
/**
* Gets the size of this transaction.
*
* @return size of this transaction in bytes
*/
size_t getTransactionSize() const {
return transSize;
}
void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
void process() {
obj.dmaDone(this);
}
protected:
void onEndOfBlock() M5_ATTR_OVERRIDE;
void onIdle() M5_ATTR_OVERRIDE;
const std::string name() const {
return obj.name() + ".DmaDoneEvent";
}
HDLcd &parent;
const size_t lineSize;
const ssize_t linePitch;
const unsigned numLines;
Addr nextLineAddr;
Addr frameEnd;
};
/** Start time for frame buffer dma read */
Tick frameReadStartTime;
/** Starting address for the current frame */
Addr dmaStartAddr;
/** Next address the dma should read from */
Addr dmaCurAddr;
/** One byte past the address of the last byte the dma should read
* from */
Addr dmaMaxAddr;
/** Number of pending dma reads */
size_t dmaPendingNum;
/** Flag indicating whether current frame has underrun */
bool frameUnderrun;
/** HDLcd virtual display buffer */
std::vector<uint8_t> virtualDisplayBuffer;
/** Size of the pixel buffer */
size_t pixelBufferSize;
/** Index of the next pixel to render */
size_t pixelIndex;
/** Flag indicating whether video parameters need updating */
bool doUpdateParams;
/** Flag indicating whether a frame read / display is in progress */
bool frameUnderway;
/**
* Number of bytes in flight from DMA that have not reached the pixel
* buffer yet
*/
uint32_t dmaBytesInFlight;
/**
* Gets the number of oustanding DMA transactions allowed on the bus at a
* time.
*
* @return gets the driver-specified number of outstanding DMA transactions
* from the hdlcd controller that are allowed on the bus at a time
*/
inline uint16_t maxOutstandingDma() const {
return bus_options.max_outstanding;
}
/**
* Gets the number of bytes free in the pixel buffer.
*
* @return number of bytes free in the internal pixel buffer
*/
inline uint32_t bytesFreeInPixelBuffer() const {
return PIXEL_BUFFER_CAPACITY - (pixelBufferSize + dmaBytesInFlight);
}
/**
* Gets the number of beats-per-burst for bus transactions.
*
* @return number of beats-per-burst per HDLcd DMA transaction
*/
inline size_t dmaBurstLength() const {
assert(bus_options.burst_len <= MAX_BURST_LEN);
return bus_options.burst_len;
}
/**
* Gets the number of bytes per pixel.
*
* @return bytes per pixel
*/
inline size_t bytesPerPixel() const {
return pixel_format.bytes_per_pixel + 1;
}
/**
* Gets frame buffer width.
*
* @return frame buffer width (pixels per line)
*/
inline size_t width() const {
return fb_line_length / bytesPerPixel();
}
/**
* Gets frame buffer height.
*
* @return frame buffer height (lines per panel)
*/
inline size_t height() const {
return fb_line_count.fb_line_count;
}
inline size_t area() const { return height() * width(); }
/**
* Gets the total number of pixel clocks per display line.
*
* @return number of pixel clocks per display line including porch delays
* and horizontal sync time
*/
inline uint64_t PClksPerLine() const {
return h_back_porch.val + 1 +
h_data.val + 1 +
h_front_porch.val + 1 +
h_sync.val + 1;
}
/** Send updated parameters to the vnc server */
void updateVideoParams(bool unserializing);
/** Generates an interrupt */
void generateInterrupt();
/** Start reading the next frame */
void startFrame();
/** End of frame reached */
void endFrame();
/** Generate DMA read requests from frame buffer into pixel buffer */
void fillPixelBuffer();
/** DMA done event */
void dmaDone(DmaDoneEvent *event);
/** Called when it is time to render a pixel */
void renderPixel();
PixelConverter pixelConverter() const;
/** Start of frame event */
EventWrapper<HDLcd, &HDLcd::startFrame> startFrameEvent;
/** End of frame event */
EventWrapper<HDLcd, &HDLcd::endFrame> endFrameEvent;
/** Pixel render event */
EventWrapper<HDLcd, &HDLcd::renderPixel> renderPixelEvent;
/** Fill fifo */
EventWrapper<HDLcd, &HDLcd::fillPixelBuffer> fillPixelBufferEvent;
/** Wrapper to create an event out of the interrupt */
EventWrapper<HDLcd, &HDLcd::generateInterrupt> intEvent;
/**@{*/
/**
* All pre-allocated DMA done events
*
* The HDLCD model preallocates maxOutstandingDma() number of
* DmaDoneEvents to avoid having to heap allocate every single
* event when it is needed. In order to keep track of which events
* are in flight and which are ready to be used, we use two
* different vectors. dmaDoneEventAll contains <i>all</i>
* DmaDoneEvents that the object may use, while dmaDoneEventFree
* contains a list of currently <i>unused</i> events. When an
* event needs to be scheduled, the last element of the
* dmaDoneEventFree is used and removed from the list. When an
* event fires, it is added to the end of the
* dmaEventFreeList. dmaDoneEventAll is never used except for in
* initialization and serialization.
*/
std::vector<DmaDoneEvent> dmaDoneEventAll;
/** Unused DMA done events that are ready to be scheduled */
std::vector<DmaDoneEvent *> dmaDoneEventFree;
/**@}*/
bool enableCapture;
const bool workaround_swap_rb;
public:
typedef HDLcdParams Params;
const Params *
params() const
{
return dynamic_cast<const Params *>(_params);
}
HDLcd(const Params *p);
~HDLcd();
virtual Tick read(PacketPtr pkt);
virtual Tick write(PacketPtr pkt);
void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
/**
* Determine the address ranges that this device responds to.
*
* @return a list of non-overlapping address ranges
*/
AddrRangeList getAddrRanges() const;
std::unique_ptr<DmaEngine> dmaEngine;
};
#endif

109
util/cpt_upgraders/arm-hdlcd-upgrade.py Normal file
View file

@ -0,0 +1,109 @@
# Copyright (c) 2015 ARM Limited
# All rights reserved
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Andreas Sandberg
#
def upgrader(cpt):
"""HDLCD controller rewrite. Converted checkpoints cause the HDLCD
model to start a new screen refresh and FIFO buffer fill immediately
after they are loaded. Expect some timing differences."""
import re
if cpt.get('root','isa') != 'arm':
return
option_names = {
"int_rawstat" : "int_rawstat_serial",
"int_mask" : "int_mask_serial",
"fb_base" : "fb_base",
"fb_line_length" : "fb_line_length",
"fb_line_count" : "fb_line_count_serial",
"fb_line_pitch" : "fb_line_pitch",
"bus_options" : "bus_options_serial",
"v_sync" : "v_sync_serial",
"v_back_porch" : "v_back_porch_serial",
"v_data" : "v_data_serial",
"v_front_porch" : "v_front_porch_serial",
"h_sync" : "h_sync_serial",
"h_back_porch" : "h_back_porch_serial",
"h_data" : "h_data_serial",
"h_front_porch" : "h_front_porch_serial",
"polarities" : "polarities_serial",
"command" : "command_serial",
"pixel_format" : "pixel_format_serial",
"red_select" : "red_select_serial",
"green_select" : "green_select_serial",
"blue_select" : "blue_select_serial",
}
for sec in cpt.sections():
if re.search('.*\.hdlcd$', sec):
options = {}
for new, old in option_names.items():
options[new] = cpt.get(sec, old)
cpt.remove_section(sec)
cpt.add_section(sec)
for key, value in options.items():
cpt.set(sec, key, value)
# Create a DMA engine section. The LCD controller will
# initialize the DMA it after the next VSync, so we don't
# care about the actual values
sec_dma = "%s.dmaEngine" % sec
cpt.add_section(sec_dma)
cpt.set(sec_dma, "nextLineAddr", "0")
cpt.set(sec_dma, "frameEnd", "0")
cpt.set(sec_dma, "startAddr", "0")
cpt.set(sec_dma, "endAddr", "0")
cpt.set(sec_dma, "nextAddr", "0")
cpt.set(sec_dma, "buffer", "")
print "Warning: Assuming that the HDLCD pixel clock and global frequency " \
"are still using their default values."
sec_osc = "system.realview.realview_io.osc_pxl"
global_tick = 1E12
pxl_freq = 137E6
pxl_ticks = global_tick / pxl_freq
if not cpt.has_section(sec_osc):
cpt.add_section(sec_osc)
cpt.set(sec_osc, "type", "RealViewOsc")
cpt.set(sec_osc, "_clockPeriod", "%i" % pxl_ticks)