sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

X86: Set the local APIC ID to something meaningful.

Browse source
This commit is contained in:
Gabe Black 2009-04-19 02:16:49 -07:00
parent 79a3a6aecb
commit f668340f2c
2 changed files with 54 additions and 35 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

51
src/arch/x86/interrupts.cc
View file

@ -286,10 +286,20 @@ X86ISA::Interrupts::requestInterrupt(uint8_t vector,
cpu->wakeup();
}
void
X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
{
cpu = newCPU;
assert(cpu);
regs[APIC_ID] = (cpu->cpuId() << 24);
}
Tick
X86ISA::Interrupts::recvMessage(PacketPtr pkt)
{
uint8_t id = 0;
uint8_t id = (regs[APIC_ID] >> 24);
Addr offset = pkt->getAddr() - x86InterruptAddress(id, 0);
assert(pkt->cmd == MemCmd::MessageReq);
switch(offset)
@ -319,6 +329,26 @@ X86ISA::Interrupts::recvMessage(PacketPtr pkt)
}
void
X86ISA::Interrupts::addressRanges(AddrRangeList &range_list)
{
uint8_t id = (regs[APIC_ID] >> 24);
range_list.clear();
range_list.push_back(RangeEx(x86LocalAPICAddress(id, 0),
x86LocalAPICAddress(id, 0) + PageBytes));
}
void
X86ISA::Interrupts::getIntAddrRange(AddrRangeList &range_list)
{
uint8_t id = (regs[APIC_ID] >> 24);
range_list.clear();
range_list.push_back(RangeEx(x86InterruptAddress(id, 0),
x86InterruptAddress(id, 0) + PhysAddrAPICRangeSize));
}
uint32_t
X86ISA::Interrupts::readReg(ApicRegIndex reg)
{
@ -479,6 +509,25 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val)
return;
}
X86ISA::Interrupts::Interrupts(Params * p) :
BasicPioDevice(p), IntDev(this), latency(p->pio_latency), clock(0),
apicTimerEvent(this),
pendingSmi(false), smiVector(0),
pendingNmi(false), nmiVector(0),
pendingExtInt(false), extIntVector(0),
pendingInit(false), initVector(0),
pendingUnmaskableInt(false)
{
pioSize = PageBytes;
memset(regs, 0, sizeof(regs));
//Set the local apic DFR to the flat model.
regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
ISRV = 0;
IRRV = 0;
}
bool
X86ISA::Interrupts::checkInterrupts(ThreadContext *tc) const
{

38
src/arch/x86/interrupts.hh
View file

@ -191,11 +191,7 @@ class Interrupts : public BasicPioDevice, IntDev
*/
typedef X86LocalApicParams Params;
void
setCPU(BaseCPU * newCPU)
{
cpu = newCPU;
}
void setCPU(BaseCPU * newCPU);
void
setClock(Tick newClock)
@ -225,19 +221,8 @@ class Interrupts : public BasicPioDevice, IntDev
return entry.periodic;
}
void addressRanges(AddrRangeList &range_list)
{
range_list.clear();
range_list.push_back(RangeEx(x86LocalAPICAddress(0, 0),
x86LocalAPICAddress(0, 0) + PageBytes));
}
void getIntAddrRange(AddrRangeList &range_list)
{
range_list.clear();
range_list.push_back(RangeEx(x86InterruptAddress(0, 0),
x86InterruptAddress(0, 0) + PhysAddrAPICRangeSize));
}
void addressRanges(AddrRangeList &range_list);
void getIntAddrRange(AddrRangeList &range_list);
Port *getPort(const std::string &if_name, int idx = -1)
{
@ -262,22 +247,7 @@ class Interrupts : public BasicPioDevice, IntDev
* Constructor.
*/
Interrupts(Params * p)
: BasicPioDevice(p), IntDev(this), latency(p->pio_latency), clock(0),
apicTimerEvent(this),
pendingSmi(false), smiVector(0),
pendingNmi(false), nmiVector(0),
pendingExtInt(false), extIntVector(0),
pendingInit(false), initVector(0),
pendingUnmaskableInt(false)
{
pioSize = PageBytes;
memset(regs, 0, sizeof(regs));
//Set the local apic DFR to the flat model.
regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
ISRV = 0;
IRRV = 0;
}
Interrupts(Params * p);
/*
* Functions for retrieving interrupts for the CPU to handle.