diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py
index 41d5435f9..44cbef976 100644
--- a/configs/common/Benchmarks.py
+++ b/configs/common/Benchmarks.py
@@ -56,7 +56,7 @@ class SysConfig:
         elif buildEnv['TARGET_ISA'] == 'x86':
             return env.get('LINUX_IMAGE', disk('x86root.img'))
         elif buildEnv['TARGET_ISA'] == 'arm':
-            return env.get('LINUX_IMAGE', disk('linux-arm-ael.img'))
+            return env.get('LINUX_IMAGE', disk('linux-aarch32-ael.img'))
         else:
             print "Don't know what default disk image to use for %s ISA" % \
                 buildEnv['TARGET_ISA']
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index ab8a9e8fa..b94a7394a 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -182,7 +182,7 @@ def makeSparcSystem(mem_mode, mdesc = None):
 
     return self
 
-def makeArmSystem(mem_mode, machine_type, mdesc = None,
+def makeArmSystem(mem_mode, machine_type, num_cpus = 1, mdesc = None,
                   dtb_filename = None, bare_metal=False):
     assert machine_type
 
@@ -209,12 +209,17 @@ def makeArmSystem(mem_mode, machine_type, mdesc = None,
         self.realview = RealViewPBX()
     elif machine_type == "RealView_EB":
         self.realview = RealViewEB()
-    elif machine_type == "VExpress_ELT":
-        self.realview = VExpress_ELT()
     elif machine_type == "VExpress_EMM":
         self.realview = VExpress_EMM()
+        if not dtb_filename:
+            dtb_filename = 'vexpress.aarch32.ll_20131205.0-gem5.%dcpu.dtb' % num_cpus
     elif machine_type == "VExpress_EMM64":
         self.realview = VExpress_EMM64()
+        if os.path.split(mdesc.disk())[-1] == 'linux-aarch32-ael.img':
+            print "Selected 64-bit ARM architecture, updating default disk image..."
+            mdesc.diskname = 'linaro-minimal-aarch64.img'
+        if not dtb_filename:
+            dtb_filename = 'vexpress.aarch64.20140821.dtb'
     else:
         print "Unknown Machine Type"
         sys.exit(1)
@@ -253,9 +258,9 @@ def makeArmSystem(mem_mode, machine_type, mdesc = None,
         self.realview.uart.end_on_eot = True
     else:
         if machine_type == "VExpress_EMM64":
-            self.kernel = binary('vmlinux-3.16-aarch64-vexpress-emm64-pcie')
+            self.kernel = binary('vmlinux.aarch64.20140821')
         elif machine_type == "VExpress_EMM":
-            self.kernel = binary('vmlinux-3.3-arm-vexpress-emm-pcie')
+            self.kernel = binary('vmlinux.aarch32.ll_20131205.0-gem5')
         else:
             self.kernel = binary('vmlinux.arm.smp.fb.2.6.38.8')
 
diff --git a/configs/common/Options.py b/configs/common/Options.py
index 39355293d..19c504d97 100644
--- a/configs/common/Options.py
+++ b/configs/common/Options.py
@@ -241,7 +241,7 @@ def addFSOptions(parser):
         parser.add_option("--bare-metal", action="store_true",
                    help="Provide the raw system without the linux specific bits")
         parser.add_option("--machine-type", action="store", type="choice",
-                choices=ArmMachineType.map.keys(), default="RealView_PBX")
+                choices=ArmMachineType.map.keys(), default="VExpress_EMM")
         parser.add_option("--dtb-filename", action="store", type="string",
               help="Specifies device tree blob file to use with device-tree-"\
               "enabled kernels")
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 584748299..19a2bd358 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -82,8 +82,8 @@ def build_test_system(np):
         test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0],
                 options.ruby)
     elif buildEnv['TARGET_ISA'] == "arm":
-        test_sys = makeArmSystem(test_mem_mode, options.machine_type, bm[0],
-                                 options.dtb_filename,
+        test_sys = makeArmSystem(test_mem_mode, options.machine_type,
+                                 options.num_cpus, bm[0], options.dtb_filename,
                                  bare_metal=options.bare_metal)
         if options.enable_context_switch_stats_dump:
             test_sys.enable_context_switch_stats_dump = True
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index a803a251b..ec9d8c848 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -42,8 +42,6 @@ from System import System
 class ArmMachineType(Enum):
     map = {'RealView_EB' : 827,
            'RealView_PBX' : 1901,
-           'VExpress_ELT' : 2272,
-           'VExpress_CA9' : 2272,
            'VExpress_EMM' : 2272,
            'VExpress_EMM64' : 2272}
 
@@ -77,7 +75,7 @@ class LinuxArmSystem(ArmSystem):
     type = 'LinuxArmSystem'
     cxx_header = "arch/arm/linux/system.hh"
     load_addr_mask = 0x0fffffff
-    machine_type = Param.ArmMachineType('RealView_PBX',
+    machine_type = Param.ArmMachineType('VExpress_EMM',
         "Machine id from http://www.arm.linux.org.uk/developer/machines/")
     atags_addr = Param.Addr("Address where default atags structure should " \
                                 "be written")
diff --git a/tests/SConscript b/tests/SConscript
index ec2b4b121..5c33e2956 100644
--- a/tests/SConscript
+++ b/tests/SConscript
@@ -332,7 +332,20 @@ if env['TARGET_ISA'] == 'arm':
                 'realview-switcheroo-atomic',
                 'realview-switcheroo-timing',
                 'realview-switcheroo-o3',
-                'realview-switcheroo-full']
+                'realview-switcheroo-full',
+                'realview64-simple-atomic',
+                'realview64-simple-atomic-dual',
+                'realview64-simple-timing',
+                'realview64-simple-timing-dual',
+                'realview64-o3',
+                'realview64-o3-checker',
+                'realview64-o3-dual',
+                'realview64-minor',
+                'realview64-minor-dual',
+                'realview64-switcheroo-atomic',
+                'realview64-switcheroo-timing',
+                'realview64-switcheroo-o3',
+                'realview64-switcheroo-full']
 if env['TARGET_ISA'] == 'x86':
     configs += ['pc-simple-atomic',
                 'pc-simple-timing',
diff --git a/tests/configs/arm_generic.py b/tests/configs/arm_generic.py
index b880919e6..04823973d 100644
--- a/tests/configs/arm_generic.py
+++ b/tests/configs/arm_generic.py
@@ -44,6 +44,7 @@ import FSConfig
 from Caches import *
 from base_config import *
 from O3_ARM_v7a import *
+from Benchmarks import SysConfig
 
 class ArmSESystemUniprocessor(BaseSESystemUniprocessor):
     """Syscall-emulation builder for ARM uniprocessor systems.
@@ -70,16 +71,21 @@ class LinuxArmSystemBuilder(object):
     ARM-specific create_system method to a class deriving from one of
     the generic base systems.
     """
-    def __init__(self, machine_type):
+    def __init__(self, machine_type, **kwargs):
         """
         Arguments:
           machine_type -- String describing the platform to simulate
+          num_cpus -- integer number of CPUs in the system
         """
         self.machine_type = machine_type
+        self.num_cpus = kwargs.get('num_cpus', 1)
+        self.mem_size = kwargs.get('mem_size', '256MB')
 
     def create_system(self):
+        sc = SysConfig(None, self.mem_size, None)
         system = FSConfig.makeArmSystem(self.mem_mode,
-                                        self.machine_type, None, False)
+                                        self.machine_type, self.num_cpus,
+                                        sc, False)
 
         # We typically want the simulator to panic if the kernel
         # panics or oopses. This prevents the simulator from running
@@ -94,7 +100,7 @@ class LinuxArmFSSystem(LinuxArmSystemBuilder,
                        BaseFSSystem):
     """Basic ARM full system builder."""
 
-    def __init__(self, machine_type='RealView_PBX', **kwargs):
+    def __init__(self, machine_type='VExpress_EMM', **kwargs):
         """Initialize an ARM system that supports full system simulation.
 
         Note: Keyword arguments that are not listed below will be
@@ -104,7 +110,7 @@ class LinuxArmFSSystem(LinuxArmSystemBuilder,
           machine_type -- String describing the platform to simulate
         """
         BaseSystem.__init__(self, **kwargs)
-        LinuxArmSystemBuilder.__init__(self, machine_type)
+        LinuxArmSystemBuilder.__init__(self, machine_type, **kwargs)
 
     def create_caches_private(self, cpu):
         # Use the more representative cache configuration
@@ -121,13 +127,13 @@ class LinuxArmFSSystemUniprocessor(LinuxArmSystemBuilder,
     test cases.
     """
 
-    def __init__(self, machine_type='RealView_PBX', **kwargs):
+    def __init__(self, machine_type='VExpress_EMM', **kwargs):
         BaseFSSystemUniprocessor.__init__(self, **kwargs)
-        LinuxArmSystemBuilder.__init__(self, machine_type)
+        LinuxArmSystemBuilder.__init__(self, machine_type, **kwargs)
 
 class LinuxArmFSSwitcheroo(LinuxArmSystemBuilder, BaseFSSwitcheroo):
     """Uniprocessor ARM system prepared for CPU switching"""
 
-    def __init__(self, machine_type='RealView_PBX', **kwargs):
+    def __init__(self, machine_type='VExpress_EMM', **kwargs):
         BaseFSSwitcheroo.__init__(self, **kwargs)
-        LinuxArmSystemBuilder.__init__(self, machine_type)
+        LinuxArmSystemBuilder.__init__(self, machine_type, **kwargs)
diff --git a/tests/configs/base_config.py b/tests/configs/base_config.py
index ccf1ea6f8..5637ca3f5 100644
--- a/tests/configs/base_config.py
+++ b/tests/configs/base_config.py
@@ -58,7 +58,8 @@ class BaseSystem(object):
     __metaclass__ = ABCMeta
 
     def __init__(self, mem_mode='timing', mem_class=SimpleMemory,
-                 cpu_class=TimingSimpleCPU, num_cpus=1, checker=False):
+                 cpu_class=TimingSimpleCPU, num_cpus=1, checker=False,
+                 mem_size=None):
         """Initialize a simple base system.
 
         Keyword Arguments:
@@ -67,6 +68,7 @@ class BaseSystem(object):
           cpu_class -- CPU class to use
           num_cpus -- Number of CPUs to instantiate
           checker -- Set to True to add checker CPUs
+          mem_size -- Override the default memory size
         """
         self.mem_mode = mem_mode
         self.mem_class = mem_class
diff --git a/tests/configs/realview64-minor-dual.py b/tests/configs/realview64-minor-dual.py
new file mode 100644
index 000000000..67d8a43f3
--- /dev/null
+++ b/tests/configs/realview64-minor-dual.py
@@ -0,0 +1,45 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+
+root = LinuxArmFSSystem(machine_type='VExpress_EMM64',
+                        mem_mode='timing',
+                        mem_class=DDR3_1600_x64,
+                        cpu_class=MinorCPU,
+                        num_cpus=2).create_root()
diff --git a/tests/configs/realview64-minor.py b/tests/configs/realview64-minor.py
new file mode 100644
index 000000000..4674ad59d
--- /dev/null
+++ b/tests/configs/realview64-minor.py
@@ -0,0 +1,44 @@
+# Copyright (c) 2014 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+
+root = LinuxArmFSSystemUniprocessor(machine_type='VExpress_EMM64',
+                                    mem_mode='timing',
+                                    mem_class=DDR3_1600_x64,
+                                    cpu_class=MinorCPU).create_root()
diff --git a/tests/configs/realview64-o3-checker.py b/tests/configs/realview64-o3-checker.py
new file mode 100644
index 000000000..0cd323b8a
--- /dev/null
+++ b/tests/configs/realview64-o3-checker.py
@@ -0,0 +1,46 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+from O3_ARM_v7a import O3_ARM_v7a_3
+
+root = LinuxArmFSSystemUniprocessor(machine_type='VExpress_EMM64',
+                                    mem_mode='timing',
+                                    mem_class=DDR3_1600_x64,
+                                    cpu_class=O3_ARM_v7a_3,
+                                    checker=True).create_root()
diff --git a/tests/configs/realview64-o3-dual.py b/tests/configs/realview64-o3-dual.py
new file mode 100644
index 000000000..55f923e96
--- /dev/null
+++ b/tests/configs/realview64-o3-dual.py
@@ -0,0 +1,46 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+from O3_ARM_v7a import O3_ARM_v7a_3
+
+root = LinuxArmFSSystem(machine_type='VExpress_EMM64',
+                        mem_mode='timing',
+                        mem_class=DDR3_1600_x64,
+                        cpu_class=O3_ARM_v7a_3,
+                        num_cpus=2).create_root()
diff --git a/tests/configs/realview64-o3.py b/tests/configs/realview64-o3.py
new file mode 100644
index 000000000..97f97dd65
--- /dev/null
+++ b/tests/configs/realview64-o3.py
@@ -0,0 +1,45 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+from O3_ARM_v7a import O3_ARM_v7a_3
+
+root = LinuxArmFSSystemUniprocessor(machine_type='VExpress_EMM64',
+                                    mem_mode='timing',
+                                    mem_class=DDR3_1600_x64,
+                                    cpu_class=O3_ARM_v7a_3).create_root()
diff --git a/tests/configs/realview64-simple-atomic-dual.py b/tests/configs/realview64-simple-atomic-dual.py
new file mode 100644
index 000000000..01b3edc6e
--- /dev/null
+++ b/tests/configs/realview64-simple-atomic-dual.py
@@ -0,0 +1,45 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+
+root = LinuxArmFSSystem(machine_type='VExpress_EMM64',
+                        mem_mode='atomic',
+                        mem_class=SimpleMemory,
+                        cpu_class=AtomicSimpleCPU,
+                        num_cpus=2).create_root()
diff --git a/tests/configs/realview64-simple-atomic.py b/tests/configs/realview64-simple-atomic.py
new file mode 100644
index 000000000..8d9fe0c06
--- /dev/null
+++ b/tests/configs/realview64-simple-atomic.py
@@ -0,0 +1,45 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+
+root = LinuxArmFSSystemUniprocessor(machine_type='VExpress_EMM64',
+                                    mem_mode='atomic',
+                                    mem_class=SimpleMemory,
+                                    cpu_class=AtomicSimpleCPU).create_root()
+
diff --git a/tests/configs/realview64-simple-timing-dual.py b/tests/configs/realview64-simple-timing-dual.py
new file mode 100644
index 000000000..34f1245e0
--- /dev/null
+++ b/tests/configs/realview64-simple-timing-dual.py
@@ -0,0 +1,45 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+
+root = LinuxArmFSSystem(machine_type='VExpress_EMM64',
+                        mem_mode='timing',
+                        mem_class=DDR3_1600_x64,
+                        cpu_class=TimingSimpleCPU,
+                        num_cpus=2).create_root()
diff --git a/tests/configs/realview64-simple-timing.py b/tests/configs/realview64-simple-timing.py
new file mode 100644
index 000000000..6d9068d92
--- /dev/null
+++ b/tests/configs/realview64-simple-timing.py
@@ -0,0 +1,44 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+
+root = LinuxArmFSSystemUniprocessor(machine_type='VExpress_EMM64',
+                                    mem_mode='timing',
+                                    mem_class=DDR3_1600_x64,
+                                    cpu_class=TimingSimpleCPU).create_root()
diff --git a/tests/configs/realview64-switcheroo-atomic.py b/tests/configs/realview64-switcheroo-atomic.py
new file mode 100644
index 000000000..5aa46998a
--- /dev/null
+++ b/tests/configs/realview64-switcheroo-atomic.py
@@ -0,0 +1,50 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+import switcheroo
+
+root = LinuxArmFSSwitcheroo(
+    machine_type='VExpress_EMM64',
+    mem_class=SimpleMemory,
+    cpu_classes=(AtomicSimpleCPU, AtomicSimpleCPU)
+    ).create_root()
+
+# Setup a custom test method that uses the switcheroo tester that
+# switches between CPU models.
+run_test = switcheroo.run_test
diff --git a/tests/configs/realview64-switcheroo-full.py b/tests/configs/realview64-switcheroo-full.py
new file mode 100644
index 000000000..fc4027927
--- /dev/null
+++ b/tests/configs/realview64-switcheroo-full.py
@@ -0,0 +1,50 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+import switcheroo
+
+root = LinuxArmFSSwitcheroo(
+    machine_type='VExpress_EMM64',
+    mem_class=DDR3_1600_x64,
+    cpu_classes=(AtomicSimpleCPU, TimingSimpleCPU, DerivO3CPU)
+    ).create_root()
+
+# Setup a custom test method that uses the switcheroo tester that
+# switches between CPU models.
+run_test = switcheroo.run_test
diff --git a/tests/configs/realview64-switcheroo-o3.py b/tests/configs/realview64-switcheroo-o3.py
new file mode 100644
index 000000000..7ed9dbf7a
--- /dev/null
+++ b/tests/configs/realview64-switcheroo-o3.py
@@ -0,0 +1,50 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+import switcheroo
+
+root = LinuxArmFSSwitcheroo(
+    machine_type='VExpress_EMM64',
+    mem_class=DDR3_1600_x64,
+    cpu_classes=(DerivO3CPU, DerivO3CPU)
+    ).create_root()
+
+# Setup a custom test method that uses the switcheroo tester that
+# switches between CPU models.
+run_test = switcheroo.run_test
diff --git a/tests/configs/realview64-switcheroo-timing.py b/tests/configs/realview64-switcheroo-timing.py
new file mode 100644
index 000000000..1dd481fe2
--- /dev/null
+++ b/tests/configs/realview64-switcheroo-timing.py
@@ -0,0 +1,50 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.objects import *
+from arm_generic import *
+import switcheroo
+
+root = LinuxArmFSSwitcheroo(
+    machine_type='VExpress_EMM64',
+    mem_class=DDR3_1600_x64,
+    cpu_classes=(TimingSimpleCPU, TimingSimpleCPU)
+    ).create_root()
+
+# Setup a custom test method that uses the switcheroo tester that
+# switches between CPU models.
+run_test = switcheroo.run_test