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MIPS: Take advantage of new PCState syntax.

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This commit is contained in:
Gabe Black 2010-12-08 10:45:14 -08:00
parent 7f3f90f71d
commit f26051eb1a
3 changed files with 27 additions and 45 deletions
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42
src/arch/mips/isa/decoder.isa
View file

@ -133,33 +133,29 @@ decode OPCODE_HI default Unknown::unknown() {
0x1: jr_hb({{
Config1Reg config1 = Config1;
if (config1.ca == 0) {
pc.nnpc(Rs);
NNPC = Rs;
} else {
panic("MIPS16e not supported\n");
}
PCS = pc;
}}, IsReturn, ClearHazards);
default: jr({{
Config1Reg config1 = Config1;
if (config1.ca == 0) {
pc.nnpc(Rs);
NNPC = Rs;
} else {
panic("MIPS16e not supported\n");
}
PCS = pc;
}}, IsReturn);
}
0x1: decode HINT {
0x1: jalr_hb({{
Rd = pc.nnpc();
pc.nnpc(Rs);
PCS = pc;
Rd = NNPC;
NNPC = Rs;
}}, IsCall, ClearHazards);
default: jalr({{
Rd = pc.nnpc();
pc.nnpc(Rs);
PCS = pc;
Rd = NNPC;
NNPC = Rs;
}}, IsCall);
}
}
@ -332,14 +328,9 @@ decode OPCODE_HI default Unknown::unknown() {
}
format Jump {
0x2: j({{
pc.nnpc((pc.npc() & 0xF0000000) | (JMPTARG << 2));
PCS = pc;
}});
0x3: jal({{
pc.nnpc((pc.npc() & 0xF0000000) | (JMPTARG << 2));
PCS = pc;
}}, IsCall, Link);
0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }});
0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }},
IsCall, Link);
}
format Branch {
@ -708,16 +699,15 @@ decode OPCODE_HI default Unknown::unknown() {
ConfigReg config = Config;
SRSCtlReg srsCtl = SRSCtl;
DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC);
MipsISA::PCState pc = PCS;
if (status.erl == 1) {
status.erl = 0;
pc.npc(ErrorEPC);
NPC = ErrorEPC;
// Need to adjust NNPC, otherwise things break
pc.nnpc(ErrorEPC + sizeof(MachInst));
NNPC = ErrorEPC + sizeof(MachInst);
} else {
pc.npc(EPC);
NPC = EPC;
// Need to adjust NNPC, otherwise things break
pc.nnpc(EPC + sizeof(MachInst));
NNPC = EPC + sizeof(MachInst);
status.exl = 0;
if (config.ar >=1 &&
srsCtl.hss > 0 &&
@ -726,7 +716,6 @@ decode OPCODE_HI default Unknown::unknown() {
//xc->setShadowSet(srsCtl.pss);
}
}
PCS = pc;
LLFlag = 0;
Status = status;
SRSCtl = srsCtl;
@ -734,15 +723,14 @@ decode OPCODE_HI default Unknown::unknown() {
0x1F: deret({{
DebugReg debug = Debug;
MipsISA::PCState pc = PCS;
if (debug.dm == 1) {
debug.dm = 1;
debug.iexi = 0;
pc.npc(DEPC);
NPC = DEPC;
} else {
NPC = NPC;
// Undefined;
}
PCS = pc;
Debug = debug;
}}, IsReturn, IsSerializing, IsERET);
}

26
src/arch/mips/isa/formats/branch.isa
View file

@ -225,16 +225,16 @@ output decoder {{
}};
def format Branch(code, *opt_flags) {{
not_taken_code = ''
not_taken_code = 'NNPC = NNPC; NPC = NPC;'
#Build Instruction Flags
#Use Link & Likely Flags to Add Link/Condition Code
inst_flags = ('IsDirectControl', )
for x in opt_flags:
if x == 'Link':
code += 'R31 = pc.nnpc();\n'
code += 'R31 = NNPC;\n'
elif x == 'Likely':
not_taken_code = 'pc.advance();'
not_taken_code = 'NNPC = NPC; NPC = PC;'
inst_flags += ('IsCondDelaySlot', )
else:
inst_flags += (x, )
@ -248,14 +248,12 @@ def format Branch(code, *opt_flags) {{
#Condition code
code = '''
bool cond;
MipsISA::PCState pc = PCS;
%(code)s
if (cond) {
pc.nnpc(pc.npc() + disp);
NNPC = NPC + disp;
} else {
%(not_taken_code)s
}
PCS = pc;
''' % { "code" : code, "not_taken_code" : not_taken_code }
iop = InstObjParams(name, Name, 'Branch', code, inst_flags)
@ -266,16 +264,16 @@ def format Branch(code, *opt_flags) {{
}};
def format DspBranch(code, *opt_flags) {{
not_taken_code = ''
not_taken_code = 'NNPC = NNPC; NPC = NPC;'
#Build Instruction Flags
#Use Link & Likely Flags to Add Link/Condition Code
inst_flags = ('IsDirectControl', )
for x in opt_flags:
if x == 'Link':
code += 'R32 = pc.nnpc();'
code += 'R32 = NNPC;'
elif x == 'Likely':
not_taken_code = 'pc.advance();'
not_taken_code = 'NNPC = NPC, NPC = PC;'
inst_flags += ('IsCondDelaySlot', )
else:
inst_flags += (x, )
@ -288,16 +286,14 @@ def format DspBranch(code, *opt_flags) {{
#Condition code
code = '''
MipsISA::PCState pc = PCS;
bool cond;
uint32_t dspctl = DSPControl;
%(code)s
if (cond) {
pc.nnpc(pc.npc() + disp);
NNPC = NPC + disp;
} else {
%(not_taken_code)s
}
PCS = pc;
''' % { "code" : code, "not_taken_code" : not_taken_code }
iop = InstObjParams(name, Name, 'Branch', code, inst_flags)
@ -314,17 +310,13 @@ def format Jump(code, *opt_flags) {{
for x in opt_flags:
if x == 'Link':
code = '''
R31 = pc.nnpc();
R31 = NNPC;
''' + code
elif x == 'ClearHazards':
code += '/* Code Needed to Clear Execute & Inst Hazards */\n'
else:
inst_flags += (x, )
code = '''
MipsISA::PCState pc = PCS;
''' + code
iop = InstObjParams(name, Name, 'Jump', code, inst_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)

4
src/arch/mips/isa/operands.isa
View file

@ -151,5 +151,7 @@ def operands {{
'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4),
#Program Counter Operands
'PCS': ('PCState', 'uw', None, (None, None, 'IsControl'), 4)
'PC': ('PCState', 'uw', 'pc', (None, None, 'IsControl'), 4),
'NPC': ('PCState', 'uw', 'npc', (None, None, 'IsControl'), 4),
'NNPC': ('PCState', 'uw', 'nnpc', (None, None, 'IsControl'), 4)
}};