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cf4a00ca41
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f255957b90
2 changed files with 63 additions and 47 deletions
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@ -40,11 +40,17 @@ StaticInst::DecodeCache StaticInst::decodeCache;
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StaticInst::AddrDecodeCache StaticInst::addrDecodeCache;
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StaticInst::cacheElement StaticInst::recentDecodes[2];
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using namespace std;
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StaticInst::~StaticInst()
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{
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if (cachedDisassembly)
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delete cachedDisassembly;
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}
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void
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StaticInst::dumpDecodeCacheStats()
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{
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using namespace std;
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cerr << "Decode hash table stats @ " << curTick << ":" << endl;
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cerr << "\tnum entries = " << decodeCache.size() << endl;
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cerr << "\tnum buckets = " << decodeCache.bucket_count() << endl;
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@ -84,3 +90,34 @@ StaticInst::fetchMicroop(MicroPC micropc)
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"that is not microcoded.");
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}
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Addr
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StaticInst::branchTarget(Addr branchPC) const
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{
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panic("StaticInst::branchTarget() called on instruction "
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"that is not a PC-relative branch.");
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M5_DUMMY_RETURN;
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}
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Addr
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StaticInst::branchTarget(ThreadContext *tc) const
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{
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panic("StaticInst::branchTarget() called on instruction "
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"that is not an indirect branch.");
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M5_DUMMY_RETURN;
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}
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Request::Flags
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StaticInst::memAccFlags()
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{
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panic("StaticInst::memAccFlags called on non-memory instruction");
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return 0;
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}
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const string &
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StaticInst::disassemble(Addr pc, const SymbolTable *symtab) const
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{
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if (!cachedDisassembly)
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cachedDisassembly = new string(generateDisassembly(pc, symtab));
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return *cachedDisassembly;
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}
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@ -382,12 +382,7 @@ class StaticInst : public StaticInstBase
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{ }
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public:
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virtual ~StaticInst()
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{
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if (cachedDisassembly)
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delete cachedDisassembly;
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}
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virtual ~StaticInst();
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/**
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* The execute() signatures are auto-generated by scons based on the
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@ -406,12 +401,7 @@ class StaticInst : public StaticInstBase
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* Invalid if not a PC-relative branch (i.e. isDirectCtrl()
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* should be true).
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*/
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virtual Addr branchTarget(Addr branchPC) const
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{
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panic("StaticInst::branchTarget() called on instruction "
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"that is not a PC-relative branch.");
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M5_DUMMY_RETURN
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}
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virtual Addr branchTarget(Addr branchPC) const;
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/**
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* Return the target address for an indirect branch (jump). The
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@ -420,12 +410,7 @@ class StaticInst : public StaticInstBase
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* execute the branch in question. Invalid if not an indirect
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* branch (i.e. isIndirectCtrl() should be true).
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*/
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virtual Addr branchTarget(ThreadContext *tc) const
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{
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panic("StaticInst::branchTarget() called on instruction "
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"that is not an indirect branch.");
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M5_DUMMY_RETURN
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}
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virtual Addr branchTarget(ThreadContext *tc) const;
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/**
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* Return true if the instruction is a control transfer, and if so,
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@ -433,11 +418,7 @@ class StaticInst : public StaticInstBase
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*/
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bool hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const;
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virtual Request::Flags memAccFlags()
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{
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panic("StaticInst::memAccFlags called on non-memory instruction");
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return 0;
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};
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virtual Request::Flags memAccFlags();
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/**
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* Return string representation of disassembled instruction.
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@ -447,14 +428,7 @@ class StaticInst : public StaticInstBase
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* should not be cached, this function should be overridden directly.
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*/
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virtual const std::string &disassemble(Addr pc,
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const SymbolTable *symtab = 0) const
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{
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if (!cachedDisassembly)
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cachedDisassembly =
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new std::string(generateDisassembly(pc, symtab));
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return *cachedDisassembly;
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}
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const SymbolTable *symtab = 0) const;
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/// Decoded instruction cache type.
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/// For now we're using a generic hash_map; this seems to work
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@ -486,13 +460,13 @@ class StaticInst : public StaticInstBase
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/// A cache of decoded instruction objects from addresses.
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static AddrDecodeCache addrDecodeCache;
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struct cacheElement {
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struct cacheElement
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{
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Addr page_addr;
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AddrDecodePage *decodePage;
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cacheElement()
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:decodePage(NULL) { }
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} ;
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cacheElement() : decodePage(NULL) { }
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};
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/// An array of recently decoded instructions.
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// might not use an array if there is only two elements
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@ -521,7 +495,7 @@ class StaticInst : public StaticInstBase
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/// @retval A pointer to the corresponding StaticInst object.
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//This is defined as inlined below.
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static StaticInstPtr searchCache(ExtMachInst mach_inst, Addr addr,
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AddrDecodePage * decodePage);
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AddrDecodePage *decodePage);
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};
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typedef RefCountingPtr<StaticInstBase> StaticInstBasePtr;
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@ -575,7 +549,8 @@ class AddrDecodePage
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public:
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/// Constructor
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AddrDecodePage() {
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AddrDecodePage()
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{
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lowerMask = TheISA::PageBytes - 1;
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memset(valid, 0, TheISA::PageBytes);
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}
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@ -585,7 +560,8 @@ class AddrDecodePage
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/// related to the address
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/// @param mach_inst The binary instruction to check
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/// @param addr The address containing the instruction
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inline bool decoded(ExtMachInst mach_inst, Addr addr)
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bool
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decoded(ExtMachInst mach_inst, Addr addr)
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{
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return (valid[addr & lowerMask] &&
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(instructions[addr & lowerMask]->machInst == mach_inst));
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@ -595,19 +571,22 @@ class AddrDecodePage
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/// to check if the instruction is valid.
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/// @param addr The address of the instruction.
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/// @retval A pointer to the corresponding StaticInst object.
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inline StaticInstPtr getInst(Addr addr)
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{ return instructions[addr & lowerMask]; }
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StaticInstPtr
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getInst(Addr addr)
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{
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return instructions[addr & lowerMask];
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}
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/// Inserts a pointer to a StaticInst object into the list of decoded
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/// instructions on the page.
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/// @param addr The address of the instruction.
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/// @param si A pointer to the corresponding StaticInst object.
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inline void insert(Addr addr, StaticInstPtr &si)
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void
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insert(Addr addr, StaticInstPtr &si)
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{
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instructions[addr & lowerMask] = si;
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valid[addr & lowerMask] = true;
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}
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};
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@ -656,7 +635,7 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
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}
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// creates a new object for a page of decoded instructions
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AddrDecodePage * decodePage = new AddrDecodePage;
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AddrDecodePage *decodePage = new AddrDecodePage;
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addrDecodeCache[page_addr] = decodePage;
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updateCache(page_addr, decodePage);
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return searchCache(mach_inst, addr, decodePage);
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@ -664,7 +643,7 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
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inline StaticInstPtr
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StaticInst::searchCache(ExtMachInst mach_inst, Addr addr,
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AddrDecodePage * decodePage)
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AddrDecodePage *decodePage)
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{
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DecodeCache::iterator iter = decodeCache.find(mach_inst);
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if (iter != decodeCache.end()) {
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