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cpu: Fix Checker register index use

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This patch fixes an issue in the checker CPU register indexing. The
code will not even compile using LTO as deep inlining causes the used
index to be outside the array bounds.
This commit is contained in:
Andreas Hansson 2013-11-15 03:47:10 -05:00
parent a2c21d47a8
commit f028da7af7
1 changed files with 4 additions and 4 deletions
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8
src/cpu/checker/cpu_impl.hh
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@ -607,10 +607,10 @@ Checker<Impl>::copyResult(DynInstPtr &inst, uint64_t mismatch_val,
thread->setIntReg(idx, mismatch_val);
break;
case FloatRegClass:
thread->setFloatRegBits(idx, mismatch_val);
thread->setFloatRegBits(idx - TheISA::FP_Reg_Base, mismatch_val);
break;
case CCRegClass:
thread->setCCReg(idx, mismatch_val);
thread->setCCReg(idx - TheISA::CC_Reg_Base, mismatch_val);
break;
case MiscRegClass:
thread->setMiscReg(idx - TheISA::Misc_Reg_Base,
@ -628,10 +628,10 @@ Checker<Impl>::copyResult(DynInstPtr &inst, uint64_t mismatch_val,
thread->setIntReg(idx, res);
break;
case FloatRegClass:
thread->setFloatRegBits(idx, res);
thread->setFloatRegBits(idx - TheISA::FP_Reg_Base, res);
break;
case CCRegClass:
thread->setCCReg(idx, res);
thread->setCCReg(idx - TheISA::CC_Reg_Base, res);
break;
case MiscRegClass:
// Try to get the proper misc register index for ARM here...